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authorGleb Natapov <gleb@redhat.com>2011-11-10 07:57:26 -0500
committerIngo Molnar <mingo@elte.hu>2011-12-06 14:41:05 -0500
commitffb871bc9156ee2e5cf442f61250c5bd6aad17e3 (patch)
treeb69b5201d5ad2e54dedbdc07d4b8de5ac1f22be8 /arch/x86/kernel/cpu/perf_event.h
parentac99b862fb98a36929831791da31714f709c2aa8 (diff)
x86, perf: Disable non available architectural events
Intel CPUs report non-available architectural events in cpuid leaf 0AH.EBX. Use it to disable events that are not available according to CPU. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1320929850-10480-7-git-send-email-gleb@redhat.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.h')
-rw-r--r--arch/x86/kernel/cpu/perf_event.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 51a985cbc12f..f49c5c21085c 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -285,6 +285,11 @@ struct x86_pmu {
285 int num_counters_fixed; 285 int num_counters_fixed;
286 int cntval_bits; 286 int cntval_bits;
287 u64 cntval_mask; 287 u64 cntval_mask;
288 union {
289 unsigned long events_maskl;
290 unsigned long events_mask[BITS_TO_LONGS(ARCH_PERFMON_EVENTS_COUNT)];
291 };
292 int events_mask_len;
288 int apic; 293 int apic;
289 u64 max_period; 294 u64 max_period;
290 struct event_constraint * 295 struct event_constraint *