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authorRobert Richter <robert.richter@amd.com>2012-06-20 14:46:33 -0400
committerIngo Molnar <mingo@kernel.org>2012-07-05 15:19:39 -0400
commit15c7ad51ad58cbd3b46112c1840bc7228bd354bf (patch)
tree010a876843be5a32d065618d8834c5acc101888c /arch/x86/kernel/cpu/perf_event.c
parent1070505d18534076bda8ca13b1bc1ab2e09546da (diff)
perf/x86: Rename Intel specific macros
There are macros that are Intel specific and not x86 generic. Rename them into INTEL_*. This patch removes X86_PMC_IDX_GENERIC and does: $ sed -i -e 's/X86_PMC_MAX_/INTEL_PMC_MAX_/g' \ arch/x86/include/asm/kvm_host.h \ arch/x86/include/asm/perf_event.h \ arch/x86/kernel/cpu/perf_event.c \ arch/x86/kernel/cpu/perf_event_p4.c \ arch/x86/kvm/pmu.c $ sed -i -e 's/X86_PMC_IDX_FIXED/INTEL_PMC_IDX_FIXED/g' \ arch/x86/include/asm/perf_event.h \ arch/x86/kernel/cpu/perf_event.c \ arch/x86/kernel/cpu/perf_event_intel.c \ arch/x86/kernel/cpu/perf_event_intel_ds.c \ arch/x86/kvm/pmu.c $ sed -i -e 's/X86_PMC_MSK_/INTEL_PMC_MSK_/g' \ arch/x86/include/asm/perf_event.h \ arch/x86/kernel/cpu/perf_event.c Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1340217996-2254-2-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index e677d9923f4f..668050002602 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -63,7 +63,7 @@ u64 x86_perf_event_update(struct perf_event *event)
63 int idx = hwc->idx; 63 int idx = hwc->idx;
64 s64 delta; 64 s64 delta;
65 65
66 if (idx == X86_PMC_IDX_FIXED_BTS) 66 if (idx == INTEL_PMC_IDX_FIXED_BTS)
67 return 0; 67 return 0;
68 68
69 /* 69 /*
@@ -626,8 +626,8 @@ static bool __perf_sched_find_counter(struct perf_sched *sched)
626 c = sched->constraints[sched->state.event]; 626 c = sched->constraints[sched->state.event];
627 627
628 /* Prefer fixed purpose counters */ 628 /* Prefer fixed purpose counters */
629 if (c->idxmsk64 & (~0ULL << X86_PMC_IDX_FIXED)) { 629 if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) {
630 idx = X86_PMC_IDX_FIXED; 630 idx = INTEL_PMC_IDX_FIXED;
631 for_each_set_bit_from(idx, c->idxmsk, X86_PMC_IDX_MAX) { 631 for_each_set_bit_from(idx, c->idxmsk, X86_PMC_IDX_MAX) {
632 if (!__test_and_set_bit(idx, sched->state.used)) 632 if (!__test_and_set_bit(idx, sched->state.used))
633 goto done; 633 goto done;
@@ -635,7 +635,7 @@ static bool __perf_sched_find_counter(struct perf_sched *sched)
635 } 635 }
636 /* Grab the first unused counter starting with idx */ 636 /* Grab the first unused counter starting with idx */
637 idx = sched->state.counter; 637 idx = sched->state.counter;
638 for_each_set_bit_from(idx, c->idxmsk, X86_PMC_IDX_FIXED) { 638 for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) {
639 if (!__test_and_set_bit(idx, sched->state.used)) 639 if (!__test_and_set_bit(idx, sched->state.used))
640 goto done; 640 goto done;
641 } 641 }
@@ -813,13 +813,13 @@ static inline void x86_assign_hw_event(struct perf_event *event,
813 hwc->last_cpu = smp_processor_id(); 813 hwc->last_cpu = smp_processor_id();
814 hwc->last_tag = ++cpuc->tags[i]; 814 hwc->last_tag = ++cpuc->tags[i];
815 815
816 if (hwc->idx == X86_PMC_IDX_FIXED_BTS) { 816 if (hwc->idx == INTEL_PMC_IDX_FIXED_BTS) {
817 hwc->config_base = 0; 817 hwc->config_base = 0;
818 hwc->event_base = 0; 818 hwc->event_base = 0;
819 } else if (hwc->idx >= X86_PMC_IDX_FIXED) { 819 } else if (hwc->idx >= INTEL_PMC_IDX_FIXED) {
820 hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL; 820 hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
821 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - X86_PMC_IDX_FIXED); 821 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - INTEL_PMC_IDX_FIXED);
822 hwc->event_base_rdpmc = (hwc->idx - X86_PMC_IDX_FIXED) | 1<<30; 822 hwc->event_base_rdpmc = (hwc->idx - INTEL_PMC_IDX_FIXED) | 1<<30;
823 } else { 823 } else {
824 hwc->config_base = x86_pmu_config_addr(hwc->idx); 824 hwc->config_base = x86_pmu_config_addr(hwc->idx);
825 hwc->event_base = x86_pmu_event_addr(hwc->idx); 825 hwc->event_base = x86_pmu_event_addr(hwc->idx);
@@ -921,7 +921,7 @@ int x86_perf_event_set_period(struct perf_event *event)
921 s64 period = hwc->sample_period; 921 s64 period = hwc->sample_period;
922 int ret = 0, idx = hwc->idx; 922 int ret = 0, idx = hwc->idx;
923 923
924 if (idx == X86_PMC_IDX_FIXED_BTS) 924 if (idx == INTEL_PMC_IDX_FIXED_BTS)
925 return 0; 925 return 0;
926 926
927 /* 927 /*
@@ -1338,21 +1338,21 @@ static int __init init_hw_perf_events(void)
1338 for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next) 1338 for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next)
1339 quirk->func(); 1339 quirk->func();
1340 1340
1341 if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) { 1341 if (x86_pmu.num_counters > INTEL_PMC_MAX_GENERIC) {
1342 WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!", 1342 WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
1343 x86_pmu.num_counters, X86_PMC_MAX_GENERIC); 1343 x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC);
1344 x86_pmu.num_counters = X86_PMC_MAX_GENERIC; 1344 x86_pmu.num_counters = INTEL_PMC_MAX_GENERIC;
1345 } 1345 }
1346 x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1; 1346 x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1;
1347 1347
1348 if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) { 1348 if (x86_pmu.num_counters_fixed > INTEL_PMC_MAX_FIXED) {
1349 WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!", 1349 WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
1350 x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED); 1350 x86_pmu.num_counters_fixed, INTEL_PMC_MAX_FIXED);
1351 x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED; 1351 x86_pmu.num_counters_fixed = INTEL_PMC_MAX_FIXED;
1352 } 1352 }
1353 1353
1354 x86_pmu.intel_ctrl |= 1354 x86_pmu.intel_ctrl |=
1355 ((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED; 1355 ((1LL << x86_pmu.num_counters_fixed)-1) << INTEL_PMC_IDX_FIXED;
1356 1356
1357 perf_events_lapic_init(); 1357 perf_events_lapic_init();
1358 register_nmi_handler(NMI_LOCAL, perf_event_nmi_handler, 0, "PMI"); 1358 register_nmi_handler(NMI_LOCAL, perf_event_nmi_handler, 0, "PMI");
@@ -1368,7 +1368,7 @@ static int __init init_hw_perf_events(void)
1368 */ 1368 */
1369 for_each_event_constraint(c, x86_pmu.event_constraints) { 1369 for_each_event_constraint(c, x86_pmu.event_constraints) {
1370 if (c->cmask != X86_RAW_EVENT_MASK 1370 if (c->cmask != X86_RAW_EVENT_MASK
1371 || c->idxmsk64 == X86_PMC_MSK_FIXED_REF_CYCLES) { 1371 || c->idxmsk64 == INTEL_PMC_MSK_FIXED_REF_CYCLES) {
1372 continue; 1372 continue;
1373 } 1373 }
1374 1374
@@ -1611,8 +1611,8 @@ static int x86_pmu_event_idx(struct perf_event *event)
1611 if (!x86_pmu.attr_rdpmc) 1611 if (!x86_pmu.attr_rdpmc)
1612 return 0; 1612 return 0;
1613 1613
1614 if (x86_pmu.num_counters_fixed && idx >= X86_PMC_IDX_FIXED) { 1614 if (x86_pmu.num_counters_fixed && idx >= INTEL_PMC_IDX_FIXED) {
1615 idx -= X86_PMC_IDX_FIXED; 1615 idx -= INTEL_PMC_IDX_FIXED;
1616 idx |= 1 << 30; 1616 idx |= 1 << 30;
1617 } 1617 }
1618 1618