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authormarkus.t.metzger@intel.com <markus.t.metzger@intel.com>2009-09-02 10:04:47 -0400
committerIngo Molnar <mingo@elte.hu>2009-09-04 03:26:39 -0400
commit596da17f94c103348ebe04129c00d536ea0e80e2 (patch)
treeac6366d311f403e400e6933d0ccc2b424f217080 /arch/x86/kernel/cpu/perf_counter.c
parent747b50aaf728987732e6ff3ba10aba4acc4e0277 (diff)
x86, perf_counter, bts: Correct pointer-to-u64 casts
On 32bit, pointers in the DS AREA configuration are cast to u64. The current (long) cast to avoid compiler warnings results in a signed 64bit address. Signed-off-by: Markus Metzger <markus.t.metzger@intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <20090902140615.305889000@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_counter.c')
-rw-r--r--arch/x86/kernel/cpu/perf_counter.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 2f41874ffb86..3776b0b630c8 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -726,7 +726,8 @@ static inline void init_debug_store_on_cpu(int cpu)
726 return; 726 return;
727 727
728 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 728 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA,
729 (u32)((u64)(long)ds), (u32)((u64)(long)ds >> 32)); 729 (u32)((u64)(unsigned long)ds),
730 (u32)((u64)(unsigned long)ds >> 32));
730} 731}
731 732
732static inline void fini_debug_store_on_cpu(int cpu) 733static inline void fini_debug_store_on_cpu(int cpu)
@@ -757,7 +758,7 @@ static void release_bts_hardware(void)
757 758
758 per_cpu(cpu_hw_counters, cpu).ds = NULL; 759 per_cpu(cpu_hw_counters, cpu).ds = NULL;
759 760
760 kfree((void *)(long)ds->bts_buffer_base); 761 kfree((void *)(unsigned long)ds->bts_buffer_base);
761 kfree(ds); 762 kfree(ds);
762 } 763 }
763 764
@@ -788,7 +789,7 @@ static int reserve_bts_hardware(void)
788 break; 789 break;
789 } 790 }
790 791
791 ds->bts_buffer_base = (u64)(long)buffer; 792 ds->bts_buffer_base = (u64)(unsigned long)buffer;
792 ds->bts_index = ds->bts_buffer_base; 793 ds->bts_index = ds->bts_buffer_base;
793 ds->bts_absolute_maximum = 794 ds->bts_absolute_maximum =
794 ds->bts_buffer_base + BTS_BUFFER_SIZE; 795 ds->bts_buffer_base + BTS_BUFFER_SIZE;
@@ -1491,7 +1492,7 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
1491 }; 1492 };
1492 struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS]; 1493 struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS];
1493 unsigned long orig_ip = data->regs->ip; 1494 unsigned long orig_ip = data->regs->ip;
1494 u64 at; 1495 struct bts_record *at, *top;
1495 1496
1496 if (!counter) 1497 if (!counter)
1497 return; 1498 return;
@@ -1499,19 +1500,18 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
1499 if (!ds) 1500 if (!ds)
1500 return; 1501 return;
1501 1502
1502 for (at = ds->bts_buffer_base; 1503 at = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
1503 at < ds->bts_index; 1504 top = (struct bts_record *)(unsigned long)ds->bts_index;
1504 at += sizeof(struct bts_record)) {
1505 struct bts_record *rec = (struct bts_record *)(long)at;
1506 1505
1507 data->regs->ip = rec->from; 1506 ds->bts_index = ds->bts_buffer_base;
1508 data->addr = rec->to; 1507
1508 for (; at < top; at++) {
1509 data->regs->ip = at->from;
1510 data->addr = at->to;
1509 1511
1510 perf_counter_output(counter, 1, data); 1512 perf_counter_output(counter, 1, data);
1511 } 1513 }
1512 1514
1513 ds->bts_index = ds->bts_buffer_base;
1514
1515 data->regs->ip = orig_ip; 1515 data->regs->ip = orig_ip;
1516 data->addr = 0; 1516 data->addr = 0;
1517 1517