diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-03-30 17:53:32 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-03-30 17:53:32 -0400 |
commit | 65fb0d23fcddd8697c871047b700c78817bdaa43 (patch) | |
tree | 119e6e5f276622c4c862f6c9b6d795264ba1603a /arch/x86/kernel/cpu/mtrr/generic.c | |
parent | 8c083f081d0014057901c68a0a3e0f8ca7ac8d23 (diff) | |
parent | dfbbe89e197a77f2c8046a51c74e33e35f878080 (diff) |
Merge branch 'linus' into cpumask-for-linus
Conflicts:
arch/x86/kernel/cpu/common.c
Diffstat (limited to 'arch/x86/kernel/cpu/mtrr/generic.c')
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/generic.c | 202 |
1 files changed, 132 insertions, 70 deletions
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 0c0a455fe95c..37f28fc7cf95 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c | |||
@@ -33,13 +33,31 @@ u64 mtrr_tom2; | |||
33 | struct mtrr_state_type mtrr_state = {}; | 33 | struct mtrr_state_type mtrr_state = {}; |
34 | EXPORT_SYMBOL_GPL(mtrr_state); | 34 | EXPORT_SYMBOL_GPL(mtrr_state); |
35 | 35 | ||
36 | static int __initdata mtrr_show; | 36 | /** |
37 | static int __init mtrr_debug(char *opt) | 37 | * BIOS is expected to clear MtrrFixDramModEn bit, see for example |
38 | * "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD | ||
39 | * Opteron Processors" (26094 Rev. 3.30 February 2006), section | ||
40 | * "13.2.1.2 SYSCFG Register": "The MtrrFixDramModEn bit should be set | ||
41 | * to 1 during BIOS initalization of the fixed MTRRs, then cleared to | ||
42 | * 0 for operation." | ||
43 | */ | ||
44 | static inline void k8_check_syscfg_dram_mod_en(void) | ||
38 | { | 45 | { |
39 | mtrr_show = 1; | 46 | u32 lo, hi; |
40 | return 0; | 47 | |
48 | if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && | ||
49 | (boot_cpu_data.x86 >= 0x0f))) | ||
50 | return; | ||
51 | |||
52 | rdmsr(MSR_K8_SYSCFG, lo, hi); | ||
53 | if (lo & K8_MTRRFIXRANGE_DRAM_MODIFY) { | ||
54 | printk(KERN_ERR FW_WARN "MTRR: CPU %u: SYSCFG[MtrrFixDramModEn]" | ||
55 | " not cleared by BIOS, clearing this bit\n", | ||
56 | smp_processor_id()); | ||
57 | lo &= ~K8_MTRRFIXRANGE_DRAM_MODIFY; | ||
58 | mtrr_wrmsr(MSR_K8_SYSCFG, lo, hi); | ||
59 | } | ||
41 | } | 60 | } |
42 | early_param("mtrr.show", mtrr_debug); | ||
43 | 61 | ||
44 | /* | 62 | /* |
45 | * Returns the effective MTRR type for the region | 63 | * Returns the effective MTRR type for the region |
@@ -174,6 +192,8 @@ get_fixed_ranges(mtrr_type * frs) | |||
174 | unsigned int *p = (unsigned int *) frs; | 192 | unsigned int *p = (unsigned int *) frs; |
175 | int i; | 193 | int i; |
176 | 194 | ||
195 | k8_check_syscfg_dram_mod_en(); | ||
196 | |||
177 | rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]); | 197 | rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]); |
178 | 198 | ||
179 | for (i = 0; i < 2; i++) | 199 | for (i = 0; i < 2; i++) |
@@ -188,18 +208,94 @@ void mtrr_save_fixed_ranges(void *info) | |||
188 | get_fixed_ranges(mtrr_state.fixed_ranges); | 208 | get_fixed_ranges(mtrr_state.fixed_ranges); |
189 | } | 209 | } |
190 | 210 | ||
191 | static void print_fixed(unsigned base, unsigned step, const mtrr_type*types) | 211 | static unsigned __initdata last_fixed_start; |
212 | static unsigned __initdata last_fixed_end; | ||
213 | static mtrr_type __initdata last_fixed_type; | ||
214 | |||
215 | static void __init print_fixed_last(void) | ||
216 | { | ||
217 | if (!last_fixed_end) | ||
218 | return; | ||
219 | |||
220 | printk(KERN_DEBUG " %05X-%05X %s\n", last_fixed_start, | ||
221 | last_fixed_end - 1, mtrr_attrib_to_str(last_fixed_type)); | ||
222 | |||
223 | last_fixed_end = 0; | ||
224 | } | ||
225 | |||
226 | static void __init update_fixed_last(unsigned base, unsigned end, | ||
227 | mtrr_type type) | ||
228 | { | ||
229 | last_fixed_start = base; | ||
230 | last_fixed_end = end; | ||
231 | last_fixed_type = type; | ||
232 | } | ||
233 | |||
234 | static void __init print_fixed(unsigned base, unsigned step, | ||
235 | const mtrr_type *types) | ||
192 | { | 236 | { |
193 | unsigned i; | 237 | unsigned i; |
194 | 238 | ||
195 | for (i = 0; i < 8; ++i, ++types, base += step) | 239 | for (i = 0; i < 8; ++i, ++types, base += step) { |
196 | printk(KERN_INFO "MTRR %05X-%05X %s\n", | 240 | if (last_fixed_end == 0) { |
197 | base, base + step - 1, mtrr_attrib_to_str(*types)); | 241 | update_fixed_last(base, base + step, *types); |
242 | continue; | ||
243 | } | ||
244 | if (last_fixed_end == base && last_fixed_type == *types) { | ||
245 | last_fixed_end = base + step; | ||
246 | continue; | ||
247 | } | ||
248 | /* new segments: gap or different type */ | ||
249 | print_fixed_last(); | ||
250 | update_fixed_last(base, base + step, *types); | ||
251 | } | ||
198 | } | 252 | } |
199 | 253 | ||
200 | static void prepare_set(void); | 254 | static void prepare_set(void); |
201 | static void post_set(void); | 255 | static void post_set(void); |
202 | 256 | ||
257 | static void __init print_mtrr_state(void) | ||
258 | { | ||
259 | unsigned int i; | ||
260 | int high_width; | ||
261 | |||
262 | printk(KERN_DEBUG "MTRR default type: %s\n", | ||
263 | mtrr_attrib_to_str(mtrr_state.def_type)); | ||
264 | if (mtrr_state.have_fixed) { | ||
265 | printk(KERN_DEBUG "MTRR fixed ranges %sabled:\n", | ||
266 | mtrr_state.enabled & 1 ? "en" : "dis"); | ||
267 | print_fixed(0x00000, 0x10000, mtrr_state.fixed_ranges + 0); | ||
268 | for (i = 0; i < 2; ++i) | ||
269 | print_fixed(0x80000 + i * 0x20000, 0x04000, mtrr_state.fixed_ranges + (i + 1) * 8); | ||
270 | for (i = 0; i < 8; ++i) | ||
271 | print_fixed(0xC0000 + i * 0x08000, 0x01000, mtrr_state.fixed_ranges + (i + 3) * 8); | ||
272 | |||
273 | /* tail */ | ||
274 | print_fixed_last(); | ||
275 | } | ||
276 | printk(KERN_DEBUG "MTRR variable ranges %sabled:\n", | ||
277 | mtrr_state.enabled & 2 ? "en" : "dis"); | ||
278 | high_width = ((size_or_mask ? ffs(size_or_mask) - 1 : 32) - (32 - PAGE_SHIFT) + 3) / 4; | ||
279 | for (i = 0; i < num_var_ranges; ++i) { | ||
280 | if (mtrr_state.var_ranges[i].mask_lo & (1 << 11)) | ||
281 | printk(KERN_DEBUG " %u base %0*X%05X000 mask %0*X%05X000 %s\n", | ||
282 | i, | ||
283 | high_width, | ||
284 | mtrr_state.var_ranges[i].base_hi, | ||
285 | mtrr_state.var_ranges[i].base_lo >> 12, | ||
286 | high_width, | ||
287 | mtrr_state.var_ranges[i].mask_hi, | ||
288 | mtrr_state.var_ranges[i].mask_lo >> 12, | ||
289 | mtrr_attrib_to_str(mtrr_state.var_ranges[i].base_lo & 0xff)); | ||
290 | else | ||
291 | printk(KERN_DEBUG " %u disabled\n", i); | ||
292 | } | ||
293 | if (mtrr_tom2) { | ||
294 | printk(KERN_DEBUG "TOM2: %016llx aka %lldM\n", | ||
295 | mtrr_tom2, mtrr_tom2>>20); | ||
296 | } | ||
297 | } | ||
298 | |||
203 | /* Grab all of the MTRR state for this CPU into *state */ | 299 | /* Grab all of the MTRR state for this CPU into *state */ |
204 | void __init get_mtrr_state(void) | 300 | void __init get_mtrr_state(void) |
205 | { | 301 | { |
@@ -231,41 +327,9 @@ void __init get_mtrr_state(void) | |||
231 | mtrr_tom2 |= low; | 327 | mtrr_tom2 |= low; |
232 | mtrr_tom2 &= 0xffffff800000ULL; | 328 | mtrr_tom2 &= 0xffffff800000ULL; |
233 | } | 329 | } |
234 | if (mtrr_show) { | 330 | |
235 | int high_width; | 331 | print_mtrr_state(); |
236 | 332 | ||
237 | printk(KERN_INFO "MTRR default type: %s\n", mtrr_attrib_to_str(mtrr_state.def_type)); | ||
238 | if (mtrr_state.have_fixed) { | ||
239 | printk(KERN_INFO "MTRR fixed ranges %sabled:\n", | ||
240 | mtrr_state.enabled & 1 ? "en" : "dis"); | ||
241 | print_fixed(0x00000, 0x10000, mtrr_state.fixed_ranges + 0); | ||
242 | for (i = 0; i < 2; ++i) | ||
243 | print_fixed(0x80000 + i * 0x20000, 0x04000, mtrr_state.fixed_ranges + (i + 1) * 8); | ||
244 | for (i = 0; i < 8; ++i) | ||
245 | print_fixed(0xC0000 + i * 0x08000, 0x01000, mtrr_state.fixed_ranges + (i + 3) * 8); | ||
246 | } | ||
247 | printk(KERN_INFO "MTRR variable ranges %sabled:\n", | ||
248 | mtrr_state.enabled & 2 ? "en" : "dis"); | ||
249 | high_width = ((size_or_mask ? ffs(size_or_mask) - 1 : 32) - (32 - PAGE_SHIFT) + 3) / 4; | ||
250 | for (i = 0; i < num_var_ranges; ++i) { | ||
251 | if (mtrr_state.var_ranges[i].mask_lo & (1 << 11)) | ||
252 | printk(KERN_INFO "MTRR %u base %0*X%05X000 mask %0*X%05X000 %s\n", | ||
253 | i, | ||
254 | high_width, | ||
255 | mtrr_state.var_ranges[i].base_hi, | ||
256 | mtrr_state.var_ranges[i].base_lo >> 12, | ||
257 | high_width, | ||
258 | mtrr_state.var_ranges[i].mask_hi, | ||
259 | mtrr_state.var_ranges[i].mask_lo >> 12, | ||
260 | mtrr_attrib_to_str(mtrr_state.var_ranges[i].base_lo & 0xff)); | ||
261 | else | ||
262 | printk(KERN_INFO "MTRR %u disabled\n", i); | ||
263 | } | ||
264 | if (mtrr_tom2) { | ||
265 | printk(KERN_INFO "TOM2: %016llx aka %lldM\n", | ||
266 | mtrr_tom2, mtrr_tom2>>20); | ||
267 | } | ||
268 | } | ||
269 | mtrr_state_set = 1; | 333 | mtrr_state_set = 1; |
270 | 334 | ||
271 | /* PAT setup for BP. We need to go through sync steps here */ | 335 | /* PAT setup for BP. We need to go through sync steps here */ |
@@ -308,27 +372,10 @@ void mtrr_wrmsr(unsigned msr, unsigned a, unsigned b) | |||
308 | } | 372 | } |
309 | 373 | ||
310 | /** | 374 | /** |
311 | * Enable and allow read/write of extended fixed-range MTRR bits on K8 CPUs | ||
312 | * see AMD publication no. 24593, chapter 3.2.1 for more information | ||
313 | */ | ||
314 | static inline void k8_enable_fixed_iorrs(void) | ||
315 | { | ||
316 | unsigned lo, hi; | ||
317 | |||
318 | rdmsr(MSR_K8_SYSCFG, lo, hi); | ||
319 | mtrr_wrmsr(MSR_K8_SYSCFG, lo | ||
320 | | K8_MTRRFIXRANGE_DRAM_ENABLE | ||
321 | | K8_MTRRFIXRANGE_DRAM_MODIFY, hi); | ||
322 | } | ||
323 | |||
324 | /** | ||
325 | * set_fixed_range - checks & updates a fixed-range MTRR if it differs from the value it should have | 375 | * set_fixed_range - checks & updates a fixed-range MTRR if it differs from the value it should have |
326 | * @msr: MSR address of the MTTR which should be checked and updated | 376 | * @msr: MSR address of the MTTR which should be checked and updated |
327 | * @changed: pointer which indicates whether the MTRR needed to be changed | 377 | * @changed: pointer which indicates whether the MTRR needed to be changed |
328 | * @msrwords: pointer to the MSR values which the MSR should have | 378 | * @msrwords: pointer to the MSR values which the MSR should have |
329 | * | ||
330 | * If K8 extentions are wanted, update the K8 SYSCFG MSR also. | ||
331 | * See AMD publication no. 24593, chapter 7.8.1, page 233 for more information. | ||
332 | */ | 379 | */ |
333 | static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords) | 380 | static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords) |
334 | { | 381 | { |
@@ -337,10 +384,6 @@ static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords) | |||
337 | rdmsr(msr, lo, hi); | 384 | rdmsr(msr, lo, hi); |
338 | 385 | ||
339 | if (lo != msrwords[0] || hi != msrwords[1]) { | 386 | if (lo != msrwords[0] || hi != msrwords[1]) { |
340 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && | ||
341 | (boot_cpu_data.x86 >= 0x0f && boot_cpu_data.x86 <= 0x11) && | ||
342 | ((msrwords[0] | msrwords[1]) & K8_MTRR_RDMEM_WRMEM_MASK)) | ||
343 | k8_enable_fixed_iorrs(); | ||
344 | mtrr_wrmsr(msr, msrwords[0], msrwords[1]); | 387 | mtrr_wrmsr(msr, msrwords[0], msrwords[1]); |
345 | *changed = true; | 388 | *changed = true; |
346 | } | 389 | } |
@@ -376,22 +419,31 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base, | |||
376 | { | 419 | { |
377 | unsigned int mask_lo, mask_hi, base_lo, base_hi; | 420 | unsigned int mask_lo, mask_hi, base_lo, base_hi; |
378 | unsigned int tmp, hi; | 421 | unsigned int tmp, hi; |
422 | int cpu; | ||
423 | |||
424 | /* | ||
425 | * get_mtrr doesn't need to update mtrr_state, also it could be called | ||
426 | * from any cpu, so try to print it out directly. | ||
427 | */ | ||
428 | cpu = get_cpu(); | ||
379 | 429 | ||
380 | rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi); | 430 | rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi); |
431 | |||
381 | if ((mask_lo & 0x800) == 0) { | 432 | if ((mask_lo & 0x800) == 0) { |
382 | /* Invalid (i.e. free) range */ | 433 | /* Invalid (i.e. free) range */ |
383 | *base = 0; | 434 | *base = 0; |
384 | *size = 0; | 435 | *size = 0; |
385 | *type = 0; | 436 | *type = 0; |
386 | return; | 437 | goto out_put_cpu; |
387 | } | 438 | } |
388 | 439 | ||
389 | rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi); | 440 | rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi); |
390 | 441 | ||
391 | /* Work out the shifted address mask. */ | 442 | /* Work out the shifted address mask: */ |
392 | tmp = mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT; | 443 | tmp = mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT; |
393 | mask_lo = size_or_mask | tmp; | 444 | mask_lo = size_or_mask | tmp; |
394 | /* Expand tmp with high bits to all 1s*/ | 445 | |
446 | /* Expand tmp with high bits to all 1s: */ | ||
395 | hi = fls(tmp); | 447 | hi = fls(tmp); |
396 | if (hi > 0) { | 448 | if (hi > 0) { |
397 | tmp |= ~((1<<(hi - 1)) - 1); | 449 | tmp |= ~((1<<(hi - 1)) - 1); |
@@ -402,11 +454,19 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base, | |||
402 | } | 454 | } |
403 | } | 455 | } |
404 | 456 | ||
405 | /* This works correctly if size is a power of two, i.e. a | 457 | /* |
406 | contiguous range. */ | 458 | * This works correctly if size is a power of two, i.e. a |
459 | * contiguous range: | ||
460 | */ | ||
407 | *size = -mask_lo; | 461 | *size = -mask_lo; |
408 | *base = base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT; | 462 | *base = base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT; |
409 | *type = base_lo & 0xff; | 463 | *type = base_lo & 0xff; |
464 | |||
465 | printk(KERN_DEBUG " get_mtrr: cpu%d reg%02d base=%010lx size=%010lx %s\n", | ||
466 | cpu, reg, *base, *size, | ||
467 | mtrr_attrib_to_str(*type & 0xff)); | ||
468 | out_put_cpu: | ||
469 | put_cpu(); | ||
410 | } | 470 | } |
411 | 471 | ||
412 | /** | 472 | /** |
@@ -419,6 +479,8 @@ static int set_fixed_ranges(mtrr_type * frs) | |||
419 | bool changed = false; | 479 | bool changed = false; |
420 | int block=-1, range; | 480 | int block=-1, range; |
421 | 481 | ||
482 | k8_check_syscfg_dram_mod_en(); | ||
483 | |||
422 | while (fixed_range_blocks[++block].ranges) | 484 | while (fixed_range_blocks[++block].ranges) |
423 | for (range=0; range < fixed_range_blocks[block].ranges; range++) | 485 | for (range=0; range < fixed_range_blocks[block].ranges; range++) |
424 | set_fixed_range(fixed_range_blocks[block].base_msr + range, | 486 | set_fixed_range(fixed_range_blocks[block].base_msr + range, |