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authorAlex Shi <alex.shi@intel.com>2012-06-27 21:02:16 -0400
committerH. Peter Anvin <hpa@zytor.com>2012-06-27 22:28:24 -0400
commite0ba94f14f747c2661c4d21f8c44e5b0b8cd8e48 (patch)
treee866601640e2622aa2b1a1d349abff17a65b9230 /arch/x86/kernel/cpu/common.c
parent0816b0f0365539c8f6280634d2c1778d0108d8f5 (diff)
x86/tlb_info: get last level TLB entry number of CPU
For 4KB pages, x86 CPU has 2 or 1 level TLB, first level is data TLB and instruction TLB, second level is shared TLB for both data and instructions. For hupe page TLB, usually there is just one level and seperated by 2MB/4MB and 1GB. Although each levels TLB size is important for performance tuning, but for genernal and rude optimizing, last level TLB entry number is suitable. And in fact, last level TLB always has the biggest entry number. This patch will get the biggest TLB entry number and use it in furture TLB optimizing. Accroding Borislav's suggestion, except tlb_ll[i/d]_* array, other function and data will be released after system boot up. For all kinds of x86 vendor friendly, vendor specific code was moved to its specific files. Signed-off-by: Alex Shi <alex.shi@intel.com> Link: http://lkml.kernel.org/r/1340845344-27557-2-git-send-email-alex.shi@intel.com Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/kernel/cpu/common.c')
-rw-r--r--arch/x86/kernel/cpu/common.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6b9333b429ba..b2016df00813 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -452,6 +452,25 @@ void __cpuinit cpu_detect_cache_sizes(struct cpuinfo_x86 *c)
452 c->x86_cache_size = l2size; 452 c->x86_cache_size = l2size;
453} 453}
454 454
455u16 __read_mostly tlb_lli_4k[NR_INFO];
456u16 __read_mostly tlb_lli_2m[NR_INFO];
457u16 __read_mostly tlb_lli_4m[NR_INFO];
458u16 __read_mostly tlb_lld_4k[NR_INFO];
459u16 __read_mostly tlb_lld_2m[NR_INFO];
460u16 __read_mostly tlb_lld_4m[NR_INFO];
461
462void __cpuinit cpu_detect_tlb(struct cpuinfo_x86 *c)
463{
464 if (this_cpu->c_detect_tlb)
465 this_cpu->c_detect_tlb(c);
466
467 printk(KERN_INFO "Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n" \
468 "Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d\n",
469 tlb_lli_4k[ENTRIES], tlb_lli_2m[ENTRIES],
470 tlb_lli_4m[ENTRIES], tlb_lld_4k[ENTRIES],
471 tlb_lld_2m[ENTRIES], tlb_lld_4m[ENTRIES]);
472}
473
455void __cpuinit detect_ht(struct cpuinfo_x86 *c) 474void __cpuinit detect_ht(struct cpuinfo_x86 *c)
456{ 475{
457#ifdef CONFIG_X86_HT 476#ifdef CONFIG_X86_HT
@@ -911,6 +930,8 @@ void __init identify_boot_cpu(void)
911#else 930#else
912 vgetcpu_set_mode(); 931 vgetcpu_set_mode();
913#endif 932#endif
933 if (boot_cpu_data.cpuid_level >= 2)
934 cpu_detect_tlb(&boot_cpu_data);
914} 935}
915 936
916void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) 937void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)