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authorIngo Molnar <mingo@elte.hu>2008-02-26 02:51:22 -0500
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:40:51 -0400
commite1a94a974c2aa3c0a7c1a915c805211fb6773de1 (patch)
treeca7f8ca86aa3b2e913c5facd1ede047b3dbb96c4 /arch/x86/kernel/cpu/centaur.c
parent16282a8e25f1783f296e5116dcef810a8e68d1a0 (diff)
x86: clean up cpu capabilities accesses, centaur.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/centaur.c')
-rw-r--r--arch/x86/kernel/cpu/centaur.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index efe8da88da53..e0f45edd6a55 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -282,12 +282,12 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
282 rdmsr(MSR_VIA_FCR, lo, hi); 282 rdmsr(MSR_VIA_FCR, lo, hi);
283 lo |= (1<<1 | 1<<7); 283 lo |= (1<<1 | 1<<7);
284 wrmsr(MSR_VIA_FCR, lo, hi); 284 wrmsr(MSR_VIA_FCR, lo, hi);
285 set_bit(X86_FEATURE_CX8, c->x86_capability); 285 set_cpu_cap(c, X86_FEATURE_CX8);
286 } 286 }
287 287
288 /* Before Nehemiah, the C3's had 3dNOW! */ 288 /* Before Nehemiah, the C3's had 3dNOW! */
289 if (c->x86_model >= 6 && c->x86_model < 9) 289 if (c->x86_model >= 6 && c->x86_model < 9)
290 set_bit(X86_FEATURE_3DNOW, c->x86_capability); 290 set_cpu_cap(c, X86_FEATURE_3DNOW);
291 291
292 get_model_name(c); 292 get_model_name(c);
293 display_cacheinfo(c); 293 display_cacheinfo(c);
@@ -327,7 +327,7 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
327 * Bit 31 in normal CPUID used for nonstandard 3DNow ID; 327 * Bit 31 in normal CPUID used for nonstandard 3DNow ID;
328 * 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway 328 * 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway
329 */ 329 */
330 clear_bit(0*32+31, c->x86_capability); 330 clear_cpu_cap(c, 0*32+31);
331 331
332 switch (c->x86) { 332 switch (c->x86) {
333 case 5: 333 case 5:
@@ -337,7 +337,7 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
337 fcr_set = ECX8|DSMC|EDCTLB|EMMX|ERETSTK; 337 fcr_set = ECX8|DSMC|EDCTLB|EMMX|ERETSTK;
338 fcr_clr = DPDC; 338 fcr_clr = DPDC;
339 printk(KERN_NOTICE "Disabling bugged TSC.\n"); 339 printk(KERN_NOTICE "Disabling bugged TSC.\n");
340 clear_bit(X86_FEATURE_TSC, c->x86_capability); 340 clear_cpu_cap(c, X86_FEATURE_TSC);
341#ifdef CONFIG_X86_OOSTORE 341#ifdef CONFIG_X86_OOSTORE
342 centaur_create_optimal_mcr(); 342 centaur_create_optimal_mcr();
343 /* 343 /*
@@ -418,12 +418,12 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
418 printk(KERN_INFO "Centaur FCR is 0x%X\n", lo); 418 printk(KERN_INFO "Centaur FCR is 0x%X\n", lo);
419 } 419 }
420 /* Emulate MTRRs using Centaur's MCR. */ 420 /* Emulate MTRRs using Centaur's MCR. */
421 set_bit(X86_FEATURE_CENTAUR_MCR, c->x86_capability); 421 set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);
422 /* Report CX8 */ 422 /* Report CX8 */
423 set_bit(X86_FEATURE_CX8, c->x86_capability); 423 set_cpu_cap(c, X86_FEATURE_CX8);
424 /* Set 3DNow! on Winchip 2 and above. */ 424 /* Set 3DNow! on Winchip 2 and above. */
425 if (c->x86_model >= 8) 425 if (c->x86_model >= 8)
426 set_bit(X86_FEATURE_3DNOW, c->x86_capability); 426 set_cpu_cap(c, X86_FEATURE_3DNOW);
427 /* See if we can find out some more. */ 427 /* See if we can find out some more. */
428 if (cpuid_eax(0x80000000) >= 0x80000005) { 428 if (cpuid_eax(0x80000000) >= 0x80000005) {
429 /* Yes, we can. */ 429 /* Yes, we can. */