diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 05:16:58 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 05:16:58 -0400 |
commit | f7627e2513987bb5d4e8cb13c4e0a478352141ac (patch) | |
tree | 46ef70a107285c1dfe8161a57f433d30252d285a /arch/x86/kernel/cpu/bugs.c | |
parent | 4ac24f63fd203bc12a841a88a2034dccd358d0d1 (diff) |
i386: move kernel/cpu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/bugs.c')
-rw-r--r-- | arch/x86/kernel/cpu/bugs.c | 192 |
1 files changed, 192 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c new file mode 100644 index 000000000000..59266f03d1cd --- /dev/null +++ b/arch/x86/kernel/cpu/bugs.c | |||
@@ -0,0 +1,192 @@ | |||
1 | /* | ||
2 | * arch/i386/cpu/bugs.c | ||
3 | * | ||
4 | * Copyright (C) 1994 Linus Torvalds | ||
5 | * | ||
6 | * Cyrix stuff, June 1998 by: | ||
7 | * - Rafael R. Reilova (moved everything from head.S), | ||
8 | * <rreilova@ececs.uc.edu> | ||
9 | * - Channing Corn (tests & fixes), | ||
10 | * - Andrew D. Balsa (code cleanup). | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/utsname.h> | ||
14 | #include <asm/bugs.h> | ||
15 | #include <asm/processor.h> | ||
16 | #include <asm/i387.h> | ||
17 | #include <asm/msr.h> | ||
18 | #include <asm/paravirt.h> | ||
19 | #include <asm/alternative.h> | ||
20 | |||
21 | static int __init no_halt(char *s) | ||
22 | { | ||
23 | boot_cpu_data.hlt_works_ok = 0; | ||
24 | return 1; | ||
25 | } | ||
26 | |||
27 | __setup("no-hlt", no_halt); | ||
28 | |||
29 | static int __init mca_pentium(char *s) | ||
30 | { | ||
31 | mca_pentium_flag = 1; | ||
32 | return 1; | ||
33 | } | ||
34 | |||
35 | __setup("mca-pentium", mca_pentium); | ||
36 | |||
37 | static int __init no_387(char *s) | ||
38 | { | ||
39 | boot_cpu_data.hard_math = 0; | ||
40 | write_cr0(0xE | read_cr0()); | ||
41 | return 1; | ||
42 | } | ||
43 | |||
44 | __setup("no387", no_387); | ||
45 | |||
46 | static double __initdata x = 4195835.0; | ||
47 | static double __initdata y = 3145727.0; | ||
48 | |||
49 | /* | ||
50 | * This used to check for exceptions.. | ||
51 | * However, it turns out that to support that, | ||
52 | * the XMM trap handlers basically had to | ||
53 | * be buggy. So let's have a correct XMM trap | ||
54 | * handler, and forget about printing out | ||
55 | * some status at boot. | ||
56 | * | ||
57 | * We should really only care about bugs here | ||
58 | * anyway. Not features. | ||
59 | */ | ||
60 | static void __init check_fpu(void) | ||
61 | { | ||
62 | if (!boot_cpu_data.hard_math) { | ||
63 | #ifndef CONFIG_MATH_EMULATION | ||
64 | printk(KERN_EMERG "No coprocessor found and no math emulation present.\n"); | ||
65 | printk(KERN_EMERG "Giving up.\n"); | ||
66 | for (;;) ; | ||
67 | #endif | ||
68 | return; | ||
69 | } | ||
70 | |||
71 | /* trap_init() enabled FXSR and company _before_ testing for FP problems here. */ | ||
72 | /* Test for the divl bug.. */ | ||
73 | __asm__("fninit\n\t" | ||
74 | "fldl %1\n\t" | ||
75 | "fdivl %2\n\t" | ||
76 | "fmull %2\n\t" | ||
77 | "fldl %1\n\t" | ||
78 | "fsubp %%st,%%st(1)\n\t" | ||
79 | "fistpl %0\n\t" | ||
80 | "fwait\n\t" | ||
81 | "fninit" | ||
82 | : "=m" (*&boot_cpu_data.fdiv_bug) | ||
83 | : "m" (*&x), "m" (*&y)); | ||
84 | if (boot_cpu_data.fdiv_bug) | ||
85 | printk("Hmm, FPU with FDIV bug.\n"); | ||
86 | } | ||
87 | |||
88 | static void __init check_hlt(void) | ||
89 | { | ||
90 | if (paravirt_enabled()) | ||
91 | return; | ||
92 | |||
93 | printk(KERN_INFO "Checking 'hlt' instruction... "); | ||
94 | if (!boot_cpu_data.hlt_works_ok) { | ||
95 | printk("disabled\n"); | ||
96 | return; | ||
97 | } | ||
98 | halt(); | ||
99 | halt(); | ||
100 | halt(); | ||
101 | halt(); | ||
102 | printk("OK.\n"); | ||
103 | } | ||
104 | |||
105 | /* | ||
106 | * Most 386 processors have a bug where a POPAD can lock the | ||
107 | * machine even from user space. | ||
108 | */ | ||
109 | |||
110 | static void __init check_popad(void) | ||
111 | { | ||
112 | #ifndef CONFIG_X86_POPAD_OK | ||
113 | int res, inp = (int) &res; | ||
114 | |||
115 | printk(KERN_INFO "Checking for popad bug... "); | ||
116 | __asm__ __volatile__( | ||
117 | "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx " | ||
118 | : "=&a" (res) | ||
119 | : "d" (inp) | ||
120 | : "ecx", "edi" ); | ||
121 | /* If this fails, it means that any user program may lock the CPU hard. Too bad. */ | ||
122 | if (res != 12345678) printk( "Buggy.\n" ); | ||
123 | else printk( "OK.\n" ); | ||
124 | #endif | ||
125 | } | ||
126 | |||
127 | /* | ||
128 | * Check whether we are able to run this kernel safely on SMP. | ||
129 | * | ||
130 | * - In order to run on a i386, we need to be compiled for i386 | ||
131 | * (for due to lack of "invlpg" and working WP on a i386) | ||
132 | * - In order to run on anything without a TSC, we need to be | ||
133 | * compiled for a i486. | ||
134 | * - In order to support the local APIC on a buggy Pentium machine, | ||
135 | * we need to be compiled with CONFIG_X86_GOOD_APIC disabled, | ||
136 | * which happens implicitly if compiled for a Pentium or lower | ||
137 | * (unless an advanced selection of CPU features is used) as an | ||
138 | * otherwise config implies a properly working local APIC without | ||
139 | * the need to do extra reads from the APIC. | ||
140 | */ | ||
141 | |||
142 | static void __init check_config(void) | ||
143 | { | ||
144 | /* | ||
145 | * We'd better not be a i386 if we're configured to use some | ||
146 | * i486+ only features! (WP works in supervisor mode and the | ||
147 | * new "invlpg" and "bswap" instructions) | ||
148 | */ | ||
149 | #if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP) | ||
150 | if (boot_cpu_data.x86 == 3) | ||
151 | panic("Kernel requires i486+ for 'invlpg' and other features"); | ||
152 | #endif | ||
153 | |||
154 | /* | ||
155 | * If we configured ourselves for a TSC, we'd better have one! | ||
156 | */ | ||
157 | #ifdef CONFIG_X86_TSC | ||
158 | if (!cpu_has_tsc && !tsc_disable) | ||
159 | panic("Kernel compiled for Pentium+, requires TSC feature!"); | ||
160 | #endif | ||
161 | |||
162 | /* | ||
163 | * If we were told we had a good local APIC, check for buggy Pentia, | ||
164 | * i.e. all B steppings and the C2 stepping of P54C when using their | ||
165 | * integrated APIC (see 11AP erratum in "Pentium Processor | ||
166 | * Specification Update"). | ||
167 | */ | ||
168 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC) | ||
169 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL | ||
170 | && cpu_has_apic | ||
171 | && boot_cpu_data.x86 == 5 | ||
172 | && boot_cpu_data.x86_model == 2 | ||
173 | && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11)) | ||
174 | panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!"); | ||
175 | #endif | ||
176 | } | ||
177 | |||
178 | |||
179 | void __init check_bugs(void) | ||
180 | { | ||
181 | identify_boot_cpu(); | ||
182 | #ifndef CONFIG_SMP | ||
183 | printk("CPU: "); | ||
184 | print_cpu_info(&boot_cpu_data); | ||
185 | #endif | ||
186 | check_config(); | ||
187 | check_fpu(); | ||
188 | check_hlt(); | ||
189 | check_popad(); | ||
190 | init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); | ||
191 | alternative_instructions(); | ||
192 | } | ||