diff options
author | Cyrill Gorcunov <gorcunov@gmail.com> | 2008-08-18 12:45:54 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-08-18 20:07:15 -0400 |
commit | c43da2f5e92fe3bcc256f0c0d6cb858368da5bd9 (patch) | |
tree | b58c1716b6758a25d96cfa933cdc5da2369f6c95 /arch/x86/kernel/apic_64.c | |
parent | 36c9d6742897fa414f51c4e9d0f20ab4e6bf942c (diff) |
x86: apic - unify lapic_setup_esr
We use 32bit code former for 64bit
mode since it's much better implementation
and easier to merge.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic_64.c')
-rw-r--r-- | arch/x86/kernel/apic_64.c | 51 |
1 files changed, 39 insertions, 12 deletions
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c index 5579e213b5d2..d74abf7e92f7 100644 --- a/arch/x86/kernel/apic_64.c +++ b/arch/x86/kernel/apic_64.c | |||
@@ -863,6 +863,45 @@ void __init init_bsp_APIC(void) | |||
863 | apic_write(APIC_LVT1, value); | 863 | apic_write(APIC_LVT1, value); |
864 | } | 864 | } |
865 | 865 | ||
866 | static void __cpuinit lapic_setup_esr(void) | ||
867 | { | ||
868 | unsigned long oldvalue, value, maxlvt; | ||
869 | if (lapic_is_integrated() && !esr_disable) { | ||
870 | if (esr_disable) { | ||
871 | /* | ||
872 | * Something untraceable is creating bad interrupts on | ||
873 | * secondary quads ... for the moment, just leave the | ||
874 | * ESR disabled - we can't do anything useful with the | ||
875 | * errors anyway - mbligh | ||
876 | */ | ||
877 | printk(KERN_INFO "Leaving ESR disabled.\n"); | ||
878 | return; | ||
879 | } | ||
880 | /* !82489DX */ | ||
881 | maxlvt = lapic_get_maxlvt(); | ||
882 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ | ||
883 | apic_write(APIC_ESR, 0); | ||
884 | oldvalue = apic_read(APIC_ESR); | ||
885 | |||
886 | /* enables sending errors */ | ||
887 | value = ERROR_APIC_VECTOR; | ||
888 | apic_write(APIC_LVTERR, value); | ||
889 | /* | ||
890 | * spec says clear errors after enabling vector. | ||
891 | */ | ||
892 | if (maxlvt > 3) | ||
893 | apic_write(APIC_ESR, 0); | ||
894 | value = apic_read(APIC_ESR); | ||
895 | if (value != oldvalue) | ||
896 | apic_printk(APIC_VERBOSE, "ESR value before enabling " | ||
897 | "vector: 0x%08lx after: 0x%08lx\n", | ||
898 | oldvalue, value); | ||
899 | } else { | ||
900 | printk(KERN_INFO "No ESR for 82489DX.\n"); | ||
901 | } | ||
902 | } | ||
903 | |||
904 | |||
866 | /** | 905 | /** |
867 | * setup_local_APIC - setup the local APIC | 906 | * setup_local_APIC - setup the local APIC |
868 | */ | 907 | */ |
@@ -968,18 +1007,6 @@ void __cpuinit setup_local_APIC(void) | |||
968 | preempt_enable(); | 1007 | preempt_enable(); |
969 | } | 1008 | } |
970 | 1009 | ||
971 | static void __cpuinit lapic_setup_esr(void) | ||
972 | { | ||
973 | unsigned maxlvt = lapic_get_maxlvt(); | ||
974 | |||
975 | apic_write(APIC_LVTERR, ERROR_APIC_VECTOR); | ||
976 | /* | ||
977 | * spec says clear errors after enabling vector. | ||
978 | */ | ||
979 | if (maxlvt > 3) | ||
980 | apic_write(APIC_ESR, 0); | ||
981 | } | ||
982 | |||
983 | void __cpuinit end_local_APIC_setup(void) | 1010 | void __cpuinit end_local_APIC_setup(void) |
984 | { | 1011 | { |
985 | lapic_setup_esr(); | 1012 | lapic_setup_esr(); |