diff options
author | Cyrill Gorcunov <gorcunov@gmail.com> | 2008-08-24 05:01:43 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-10-16 10:53:01 -0400 |
commit | 89c38c2867ebe37c4c5aee23e7fa1bffb025b171 (patch) | |
tree | c0f9fbc1b4cf58e3431b0fb5ab26f3cb9b5c7330 /arch/x86/kernel/apic_32.c | |
parent | 80e5609cabd7e4321769701a70297f819a15b08d (diff) |
x86: apic - unify setup_local_APIC
- remove useless read of APIC_LVR
- wrap with preempt_disable/enable
- check for integrated APIC just in place
v2: fix by Yinghai Lu.
fix lapic_is_integrated using
let 64-bit too have pic_mode
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic_32.c')
-rw-r--r-- | arch/x86/kernel/apic_32.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c index df6ed603e547..f8c1251984e2 100644 --- a/arch/x86/kernel/apic_32.c +++ b/arch/x86/kernel/apic_32.c | |||
@@ -1033,9 +1033,10 @@ static void __cpuinit lapic_setup_esr(void) | |||
1033 | */ | 1033 | */ |
1034 | void __cpuinit setup_local_APIC(void) | 1034 | void __cpuinit setup_local_APIC(void) |
1035 | { | 1035 | { |
1036 | unsigned long value, integrated; | 1036 | unsigned int value; |
1037 | int i, j; | 1037 | int i, j; |
1038 | 1038 | ||
1039 | #ifdef CONFIG_X86_32 | ||
1039 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ | 1040 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ |
1040 | if (esr_disable) { | 1041 | if (esr_disable) { |
1041 | apic_write(APIC_ESR, 0); | 1042 | apic_write(APIC_ESR, 0); |
@@ -1043,14 +1044,16 @@ void __cpuinit setup_local_APIC(void) | |||
1043 | apic_write(APIC_ESR, 0); | 1044 | apic_write(APIC_ESR, 0); |
1044 | apic_write(APIC_ESR, 0); | 1045 | apic_write(APIC_ESR, 0); |
1045 | } | 1046 | } |
1047 | #endif | ||
1046 | 1048 | ||
1047 | integrated = lapic_is_integrated(); | 1049 | preempt_disable(); |
1048 | 1050 | ||
1049 | /* | 1051 | /* |
1050 | * Double-check whether this APIC is really registered. | 1052 | * Double-check whether this APIC is really registered. |
1053 | * This is meaningless in clustered apic mode, so we skip it. | ||
1051 | */ | 1054 | */ |
1052 | if (!apic_id_registered()) | 1055 | if (!apic_id_registered()) |
1053 | WARN_ON_ONCE(1); | 1056 | BUG(); |
1054 | 1057 | ||
1055 | /* | 1058 | /* |
1056 | * Intel recommends to set DFR, LDR and TPR before enabling | 1059 | * Intel recommends to set DFR, LDR and TPR before enabling |
@@ -1096,6 +1099,7 @@ void __cpuinit setup_local_APIC(void) | |||
1096 | */ | 1099 | */ |
1097 | value |= APIC_SPIV_APIC_ENABLED; | 1100 | value |= APIC_SPIV_APIC_ENABLED; |
1098 | 1101 | ||
1102 | #ifdef CONFIG_X86_32 | ||
1099 | /* | 1103 | /* |
1100 | * Some unknown Intel IO/APIC (or APIC) errata is biting us with | 1104 | * Some unknown Intel IO/APIC (or APIC) errata is biting us with |
1101 | * certain networking cards. If high frequency interrupts are | 1105 | * certain networking cards. If high frequency interrupts are |
@@ -1116,8 +1120,13 @@ void __cpuinit setup_local_APIC(void) | |||
1116 | * See also the comment in end_level_ioapic_irq(). --macro | 1120 | * See also the comment in end_level_ioapic_irq(). --macro |
1117 | */ | 1121 | */ |
1118 | 1122 | ||
1119 | /* Enable focus processor (bit==0) */ | 1123 | /* |
1124 | * - enable focus processor (bit==0) | ||
1125 | * - 64bit mode always use processor focus | ||
1126 | * so no need to set it | ||
1127 | */ | ||
1120 | value &= ~APIC_SPIV_FOCUS_DISABLED; | 1128 | value &= ~APIC_SPIV_FOCUS_DISABLED; |
1129 | #endif | ||
1121 | 1130 | ||
1122 | /* | 1131 | /* |
1123 | * Set spurious IRQ vector | 1132 | * Set spurious IRQ vector |
@@ -1154,9 +1163,11 @@ void __cpuinit setup_local_APIC(void) | |||
1154 | value = APIC_DM_NMI; | 1163 | value = APIC_DM_NMI; |
1155 | else | 1164 | else |
1156 | value = APIC_DM_NMI | APIC_LVT_MASKED; | 1165 | value = APIC_DM_NMI | APIC_LVT_MASKED; |
1157 | if (!integrated) /* 82489DX */ | 1166 | if (!lapic_is_integrated()) /* 82489DX */ |
1158 | value |= APIC_LVT_LEVEL_TRIGGER; | 1167 | value |= APIC_LVT_LEVEL_TRIGGER; |
1159 | apic_write(APIC_LVT1, value); | 1168 | apic_write(APIC_LVT1, value); |
1169 | |||
1170 | preempt_enable(); | ||
1160 | } | 1171 | } |
1161 | 1172 | ||
1162 | void __cpuinit end_local_APIC_setup(void) | 1173 | void __cpuinit end_local_APIC_setup(void) |