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authorHiroshi Shimamoto <h-shimamoto@ct.jp.nec.com>2008-01-30 07:32:36 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:32:36 -0500
commitff8a03a623d8e9a7431b4236a901c02634cd5d43 (patch)
tree5ec2420fcf6ba6db4a90c294111589245d3b89d6 /arch/x86/kernel/apic_32.c
parentf2633105cd92b793dd6a6f623b4140287d46160a (diff)
x86: clean up apic_32.c, take 2
More white space and coding style clean up. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/apic_32.c')
-rw-r--r--arch/x86/kernel/apic_32.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index ffbad74e5be0..cbcf72cde956 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -46,7 +46,7 @@
46/* 46/*
47 * Sanity check 47 * Sanity check
48 */ 48 */
49#if (SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F 49#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
50# error SPURIOUS_APIC_VECTOR definition error 50# error SPURIOUS_APIC_VECTOR definition error
51#endif 51#endif
52 52
@@ -55,7 +55,7 @@
55 * 55 *
56 * -1=force-disable, +1=force-enable 56 * -1=force-disable, +1=force-enable
57 */ 57 */
58static int enable_local_apic __initdata = 0; 58static int enable_local_apic __initdata;
59 59
60/* Local APIC timer verification ok */ 60/* Local APIC timer verification ok */
61static int local_apic_timer_verify_ok; 61static int local_apic_timer_verify_ok;
@@ -432,7 +432,7 @@ void __init setup_boot_APIC_clock(void)
432 "with PM Timer: %ldms instead of 100ms\n", 432 "with PM Timer: %ldms instead of 100ms\n",
433 (long)res); 433 (long)res);
434 /* Correct the lapic counter value */ 434 /* Correct the lapic counter value */
435 res = (((u64) delta ) * pm_100ms); 435 res = (((u64) delta) * pm_100ms);
436 do_div(res, deltapm); 436 do_div(res, deltapm);
437 printk(KERN_INFO "APIC delta adjusted to PM-Timer: " 437 printk(KERN_INFO "APIC delta adjusted to PM-Timer: "
438 "%lu (%ld)\n", (unsigned long) res, delta); 438 "%lu (%ld)\n", (unsigned long) res, delta);
@@ -976,7 +976,8 @@ void __cpuinit setup_local_APIC(void)
976 value |= APIC_LVT_LEVEL_TRIGGER; 976 value |= APIC_LVT_LEVEL_TRIGGER;
977 apic_write_around(APIC_LVT1, value); 977 apic_write_around(APIC_LVT1, value);
978 978
979 if (integrated && !esr_disable) { /* !82489DX */ 979 if (integrated && !esr_disable) {
980 /* !82489DX */
980 maxlvt = lapic_get_maxlvt(); 981 maxlvt = lapic_get_maxlvt();
981 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 982 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
982 apic_write(APIC_ESR, 0); 983 apic_write(APIC_ESR, 0);
@@ -1262,7 +1263,7 @@ void smp_error_interrupt(struct pt_regs *regs)
1262 6: Received illegal vector 1263 6: Received illegal vector
1263 7: Illegal register address 1264 7: Illegal register address
1264 */ 1265 */
1265 printk (KERN_DEBUG "APIC error on CPU%d: %02lx(%02lx)\n", 1266 printk(KERN_DEBUG "APIC error on CPU%d: %02lx(%02lx)\n",
1266 smp_processor_id(), v , v1); 1267 smp_processor_id(), v , v1);
1267 irq_exit(); 1268 irq_exit();
1268} 1269}
@@ -1349,7 +1350,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
1349 value = apic_read(APIC_LVT0); 1350 value = apic_read(APIC_LVT0);
1350 value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING | 1351 value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
1351 APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | 1352 APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
1352 APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED ); 1353 APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
1353 value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING; 1354 value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
1354 value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT); 1355 value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
1355 apic_write_around(APIC_LVT0, value); 1356 apic_write_around(APIC_LVT0, value);