diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-02-26 07:02:23 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-02-26 07:02:23 -0500 |
commit | 8e818179eb9e8f9e44d8410dd2a25077d026a08e (patch) | |
tree | 7d08afd30c95c04129c20693d974a18799caeb5a /arch/x86/kernel/apic | |
parent | 742bd95ba96e19b3f7196c3a0834ebc17c8ba006 (diff) | |
parent | ecc25fbd6b9e07b33895c61ddf84006b00f55d99 (diff) |
Merge branch 'x86/core' into perfcounters/core
Conflicts:
arch/x86/kernel/apic/apic.c
arch/x86/kernel/irqinit_32.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 12 | ||||
-rw-r--r-- | arch/x86/kernel/apic/probe_32.c | 1 | ||||
-rw-r--r-- | arch/x86/kernel/apic/probe_64.c | 13 | ||||
-rw-r--r-- | arch/x86/kernel/apic/summit_32.c | 57 | ||||
-rw-r--r-- | arch/x86/kernel/apic/x2apic_cluster.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/apic/x2apic_phys.c | 10 |
6 files changed, 42 insertions, 56 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index d1bf032ba26f..4732768c5348 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <linux/mm.h> | 35 | #include <linux/mm.h> |
36 | 36 | ||
37 | #include <asm/perf_counter.h> | 37 | #include <asm/perf_counter.h> |
38 | #include <asm/arch_hooks.h> | ||
39 | #include <asm/pgalloc.h> | 38 | #include <asm/pgalloc.h> |
40 | #include <asm/atomic.h> | 39 | #include <asm/atomic.h> |
41 | #include <asm/mpspec.h> | 40 | #include <asm/mpspec.h> |
@@ -840,7 +839,7 @@ void clear_local_APIC(void) | |||
840 | } | 839 | } |
841 | 840 | ||
842 | /* lets not touch this if we didn't frob it */ | 841 | /* lets not touch this if we didn't frob it */ |
843 | #if defined(CONFIG_X86_MCE_P4THERMAL) || defined(X86_MCE_INTEL) | 842 | #if defined(CONFIG_X86_MCE_P4THERMAL) || defined(CONFIG_X86_MCE_INTEL) |
844 | if (maxlvt >= 5) { | 843 | if (maxlvt >= 5) { |
845 | v = apic_read(APIC_LVTTHMR); | 844 | v = apic_read(APIC_LVTTHMR); |
846 | apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); | 845 | apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); |
@@ -1269,14 +1268,7 @@ void __cpuinit end_local_APIC_setup(void) | |||
1269 | #ifdef CONFIG_X86_X2APIC | 1268 | #ifdef CONFIG_X86_X2APIC |
1270 | void check_x2apic(void) | 1269 | void check_x2apic(void) |
1271 | { | 1270 | { |
1272 | int msr, msr2; | 1271 | if (x2apic_enabled()) { |
1273 | |||
1274 | if (!cpu_has_x2apic) | ||
1275 | return; | ||
1276 | |||
1277 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | ||
1278 | |||
1279 | if (msr & X2APIC_ENABLE) { | ||
1280 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); | 1272 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); |
1281 | x2apic_preenabled = x2apic = 1; | 1273 | x2apic_preenabled = x2apic = 1; |
1282 | } | 1274 | } |
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c index c9ec90742e9f..3a730fa574bb 100644 --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | #include <linux/interrupt.h> | 36 | #include <linux/interrupt.h> |
37 | #include <asm/acpi.h> | 37 | #include <asm/acpi.h> |
38 | #include <asm/arch_hooks.h> | ||
39 | #include <asm/e820.h> | 38 | #include <asm/e820.h> |
40 | #include <asm/setup.h> | 39 | #include <asm/setup.h> |
41 | 40 | ||
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c index 70935dd904db..e7c163661c77 100644 --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c | |||
@@ -50,9 +50,16 @@ static struct apic *apic_probe[] __initdata = { | |||
50 | void __init default_setup_apic_routing(void) | 50 | void __init default_setup_apic_routing(void) |
51 | { | 51 | { |
52 | #ifdef CONFIG_X86_X2APIC | 52 | #ifdef CONFIG_X86_X2APIC |
53 | if (apic == &apic_x2apic_phys || apic == &apic_x2apic_cluster) { | 53 | if (x2apic && (apic != &apic_x2apic_phys && |
54 | if (!intr_remapping_enabled) | 54 | #ifdef CONFIG_X86_UV |
55 | apic = &apic_flat; | 55 | apic != &apic_x2apic_uv_x && |
56 | #endif | ||
57 | apic != &apic_x2apic_cluster)) { | ||
58 | if (x2apic_phys) | ||
59 | apic = &apic_x2apic_phys; | ||
60 | else | ||
61 | apic = &apic_x2apic_cluster; | ||
62 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | ||
56 | } | 63 | } |
57 | #endif | 64 | #endif |
58 | 65 | ||
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c index cfe7b09015d8..32838b57a945 100644 --- a/arch/x86/kernel/apic/summit_32.c +++ b/arch/x86/kernel/apic/summit_32.c | |||
@@ -48,7 +48,7 @@ | |||
48 | #include <linux/gfp.h> | 48 | #include <linux/gfp.h> |
49 | #include <linux/smp.h> | 49 | #include <linux/smp.h> |
50 | 50 | ||
51 | static inline unsigned summit_get_apic_id(unsigned long x) | 51 | static unsigned summit_get_apic_id(unsigned long x) |
52 | { | 52 | { |
53 | return (x >> 24) & 0xFF; | 53 | return (x >> 24) & 0xFF; |
54 | } | 54 | } |
@@ -58,7 +58,7 @@ static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector) | |||
58 | default_send_IPI_mask_sequence_logical(mask, vector); | 58 | default_send_IPI_mask_sequence_logical(mask, vector); |
59 | } | 59 | } |
60 | 60 | ||
61 | static inline void summit_send_IPI_allbutself(int vector) | 61 | static void summit_send_IPI_allbutself(int vector) |
62 | { | 62 | { |
63 | cpumask_t mask = cpu_online_map; | 63 | cpumask_t mask = cpu_online_map; |
64 | cpu_clear(smp_processor_id(), mask); | 64 | cpu_clear(smp_processor_id(), mask); |
@@ -67,7 +67,7 @@ static inline void summit_send_IPI_allbutself(int vector) | |||
67 | summit_send_IPI_mask(&mask, vector); | 67 | summit_send_IPI_mask(&mask, vector); |
68 | } | 68 | } |
69 | 69 | ||
70 | static inline void summit_send_IPI_all(int vector) | 70 | static void summit_send_IPI_all(int vector) |
71 | { | 71 | { |
72 | summit_send_IPI_mask(&cpu_online_map, vector); | 72 | summit_send_IPI_mask(&cpu_online_map, vector); |
73 | } | 73 | } |
@@ -82,8 +82,8 @@ extern void setup_summit(void); | |||
82 | #define setup_summit() {} | 82 | #define setup_summit() {} |
83 | #endif | 83 | #endif |
84 | 84 | ||
85 | static inline int | 85 | static int summit_mps_oem_check(struct mpc_table *mpc, char *oem, |
86 | summit_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | 86 | char *productid) |
87 | { | 87 | { |
88 | if (!strncmp(oem, "IBM ENSW", 8) && | 88 | if (!strncmp(oem, "IBM ENSW", 8) && |
89 | (!strncmp(productid, "VIGIL SMP", 9) | 89 | (!strncmp(productid, "VIGIL SMP", 9) |
@@ -98,7 +98,7 @@ summit_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | |||
98 | } | 98 | } |
99 | 99 | ||
100 | /* Hook from generic ACPI tables.c */ | 100 | /* Hook from generic ACPI tables.c */ |
101 | static inline int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 101 | static int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
102 | { | 102 | { |
103 | if (!strncmp(oem_id, "IBM", 3) && | 103 | if (!strncmp(oem_id, "IBM", 3) && |
104 | (!strncmp(oem_table_id, "SERVIGIL", 8) | 104 | (!strncmp(oem_table_id, "SERVIGIL", 8) |
@@ -186,7 +186,7 @@ static inline int is_WPEG(struct rio_detail *rio){ | |||
186 | 186 | ||
187 | #define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER) | 187 | #define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
188 | 188 | ||
189 | static inline const cpumask_t *summit_target_cpus(void) | 189 | static const cpumask_t *summit_target_cpus(void) |
190 | { | 190 | { |
191 | /* CPU_MASK_ALL (0xff) has undefined behaviour with | 191 | /* CPU_MASK_ALL (0xff) has undefined behaviour with |
192 | * dest_LowestPrio mode logical clustered apic interrupt routing | 192 | * dest_LowestPrio mode logical clustered apic interrupt routing |
@@ -195,19 +195,18 @@ static inline const cpumask_t *summit_target_cpus(void) | |||
195 | return &cpumask_of_cpu(0); | 195 | return &cpumask_of_cpu(0); |
196 | } | 196 | } |
197 | 197 | ||
198 | static inline unsigned long | 198 | static unsigned long summit_check_apicid_used(physid_mask_t bitmap, int apicid) |
199 | summit_check_apicid_used(physid_mask_t bitmap, int apicid) | ||
200 | { | 199 | { |
201 | return 0; | 200 | return 0; |
202 | } | 201 | } |
203 | 202 | ||
204 | /* we don't use the phys_cpu_present_map to indicate apicid presence */ | 203 | /* we don't use the phys_cpu_present_map to indicate apicid presence */ |
205 | static inline unsigned long summit_check_apicid_present(int bit) | 204 | static unsigned long summit_check_apicid_present(int bit) |
206 | { | 205 | { |
207 | return 1; | 206 | return 1; |
208 | } | 207 | } |
209 | 208 | ||
210 | static inline void summit_init_apic_ldr(void) | 209 | static void summit_init_apic_ldr(void) |
211 | { | 210 | { |
212 | unsigned long val, id; | 211 | unsigned long val, id; |
213 | int count = 0; | 212 | int count = 0; |
@@ -234,18 +233,18 @@ static inline void summit_init_apic_ldr(void) | |||
234 | apic_write(APIC_LDR, val); | 233 | apic_write(APIC_LDR, val); |
235 | } | 234 | } |
236 | 235 | ||
237 | static inline int summit_apic_id_registered(void) | 236 | static int summit_apic_id_registered(void) |
238 | { | 237 | { |
239 | return 1; | 238 | return 1; |
240 | } | 239 | } |
241 | 240 | ||
242 | static inline void summit_setup_apic_routing(void) | 241 | static void summit_setup_apic_routing(void) |
243 | { | 242 | { |
244 | printk("Enabling APIC mode: Summit. Using %d I/O APICs\n", | 243 | printk("Enabling APIC mode: Summit. Using %d I/O APICs\n", |
245 | nr_ioapics); | 244 | nr_ioapics); |
246 | } | 245 | } |
247 | 246 | ||
248 | static inline int summit_apicid_to_node(int logical_apicid) | 247 | static int summit_apicid_to_node(int logical_apicid) |
249 | { | 248 | { |
250 | #ifdef CONFIG_SMP | 249 | #ifdef CONFIG_SMP |
251 | return apicid_2_node[hard_smp_processor_id()]; | 250 | return apicid_2_node[hard_smp_processor_id()]; |
@@ -266,7 +265,7 @@ static inline int summit_cpu_to_logical_apicid(int cpu) | |||
266 | #endif | 265 | #endif |
267 | } | 266 | } |
268 | 267 | ||
269 | static inline int summit_cpu_present_to_apicid(int mps_cpu) | 268 | static int summit_cpu_present_to_apicid(int mps_cpu) |
270 | { | 269 | { |
271 | if (mps_cpu < nr_cpu_ids) | 270 | if (mps_cpu < nr_cpu_ids) |
272 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); | 271 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); |
@@ -274,28 +273,23 @@ static inline int summit_cpu_present_to_apicid(int mps_cpu) | |||
274 | return BAD_APICID; | 273 | return BAD_APICID; |
275 | } | 274 | } |
276 | 275 | ||
277 | static inline physid_mask_t | 276 | static physid_mask_t summit_ioapic_phys_id_map(physid_mask_t phys_id_map) |
278 | summit_ioapic_phys_id_map(physid_mask_t phys_id_map) | ||
279 | { | 277 | { |
280 | /* For clustered we don't have a good way to do this yet - hack */ | 278 | /* For clustered we don't have a good way to do this yet - hack */ |
281 | return physids_promote(0x0F); | 279 | return physids_promote(0x0F); |
282 | } | 280 | } |
283 | 281 | ||
284 | static inline physid_mask_t summit_apicid_to_cpu_present(int apicid) | 282 | static physid_mask_t summit_apicid_to_cpu_present(int apicid) |
285 | { | 283 | { |
286 | return physid_mask_of_physid(0); | 284 | return physid_mask_of_physid(0); |
287 | } | 285 | } |
288 | 286 | ||
289 | static inline void summit_setup_portio_remap(void) | 287 | static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid) |
290 | { | ||
291 | } | ||
292 | |||
293 | static inline int summit_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
294 | { | 288 | { |
295 | return 1; | 289 | return 1; |
296 | } | 290 | } |
297 | 291 | ||
298 | static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask) | 292 | static unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask) |
299 | { | 293 | { |
300 | int cpus_found = 0; | 294 | int cpus_found = 0; |
301 | int num_bits_set; | 295 | int num_bits_set; |
@@ -303,12 +297,10 @@ static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
303 | int cpu; | 297 | int cpu; |
304 | 298 | ||
305 | num_bits_set = cpus_weight(*cpumask); | 299 | num_bits_set = cpus_weight(*cpumask); |
306 | /* Return id to all */ | ||
307 | if (num_bits_set >= nr_cpu_ids) | 300 | if (num_bits_set >= nr_cpu_ids) |
308 | return 0xFF; | 301 | return BAD_APICID; |
309 | /* | 302 | /* |
310 | * The cpus in the mask must all be on the apic cluster. If are not | 303 | * The cpus in the mask must all be on the apic cluster. |
311 | * on the same apicid cluster return default value of target_cpus(): | ||
312 | */ | 304 | */ |
313 | cpu = first_cpu(*cpumask); | 305 | cpu = first_cpu(*cpumask); |
314 | apicid = summit_cpu_to_logical_apicid(cpu); | 306 | apicid = summit_cpu_to_logical_apicid(cpu); |
@@ -318,9 +310,9 @@ static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
318 | int new_apicid = summit_cpu_to_logical_apicid(cpu); | 310 | int new_apicid = summit_cpu_to_logical_apicid(cpu); |
319 | 311 | ||
320 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { | 312 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
321 | printk ("%s: Not a valid mask!\n", __func__); | 313 | printk("%s: Not a valid mask!\n", __func__); |
322 | 314 | ||
323 | return 0xFF; | 315 | return BAD_APICID; |
324 | } | 316 | } |
325 | apicid = apicid | new_apicid; | 317 | apicid = apicid | new_apicid; |
326 | cpus_found++; | 318 | cpus_found++; |
@@ -330,8 +322,7 @@ static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
330 | return apicid; | 322 | return apicid; |
331 | } | 323 | } |
332 | 324 | ||
333 | static inline unsigned int | 325 | static unsigned int summit_cpu_mask_to_apicid_and(const struct cpumask *inmask, |
334 | summit_cpu_mask_to_apicid_and(const struct cpumask *inmask, | ||
335 | const struct cpumask *andmask) | 326 | const struct cpumask *andmask) |
336 | { | 327 | { |
337 | int apicid = summit_cpu_to_logical_apicid(0); | 328 | int apicid = summit_cpu_to_logical_apicid(0); |
@@ -356,7 +347,7 @@ summit_cpu_mask_to_apicid_and(const struct cpumask *inmask, | |||
356 | * | 347 | * |
357 | * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID. | 348 | * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID. |
358 | */ | 349 | */ |
359 | static inline int summit_phys_pkg_id(int cpuid_apic, int index_msb) | 350 | static int summit_phys_pkg_id(int cpuid_apic, int index_msb) |
360 | { | 351 | { |
361 | return hard_smp_processor_id() >> index_msb; | 352 | return hard_smp_processor_id() >> index_msb; |
362 | } | 353 | } |
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index 4e39d9ad4d52..354b9c45601d 100644 --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c | |||
@@ -14,10 +14,7 @@ DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | |||
14 | 14 | ||
15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
16 | { | 16 | { |
17 | if (cpu_has_x2apic) | 17 | return x2apic_enabled(); |
18 | return 1; | ||
19 | |||
20 | return 0; | ||
21 | } | 18 | } |
22 | 19 | ||
23 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ | 20 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c index d2d52eb9f7ea..5bcb174409bc 100644 --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c | |||
@@ -10,7 +10,7 @@ | |||
10 | #include <asm/apic.h> | 10 | #include <asm/apic.h> |
11 | #include <asm/ipi.h> | 11 | #include <asm/ipi.h> |
12 | 12 | ||
13 | static int x2apic_phys; | 13 | int x2apic_phys; |
14 | 14 | ||
15 | static int set_x2apic_phys_mode(char *arg) | 15 | static int set_x2apic_phys_mode(char *arg) |
16 | { | 16 | { |
@@ -21,10 +21,10 @@ early_param("x2apic_phys", set_x2apic_phys_mode); | |||
21 | 21 | ||
22 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 22 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
23 | { | 23 | { |
24 | if (cpu_has_x2apic && x2apic_phys) | 24 | if (x2apic_phys) |
25 | return 1; | 25 | return x2apic_enabled(); |
26 | 26 | else | |
27 | return 0; | 27 | return 0; |
28 | } | 28 | } |
29 | 29 | ||
30 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ | 30 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |