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authorThomas Gleixner <tglx@linutronix.de>2010-09-24 06:26:18 -0400
committerThomas Gleixner <tglx@linutronix.de>2010-10-12 10:53:36 -0400
commitd4eba29770244e7cc5e60c0977d73d84148a3d6d (patch)
treea12a7a15e36b6dc82eae07530cfcd443c88fc5b7 /arch/x86/kernel/apic/io_apic.c
parent4305df947ca1fd52867c8d56837a4e6b1e33167c (diff)
x86: Cleanup access to irq_data
Fixup the open coded access to irq_desc->[handler_data|chip_data|msi-desc] Use the macros and inline functions for it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic/io_apic.c')
-rw-r--r--arch/x86/kernel/apic/io_apic.c63
1 files changed, 32 insertions, 31 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index e5ae2a222620..fa0d92a6db59 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -190,7 +190,7 @@ struct irq_cfg *irq_cfg(unsigned int irq)
190 190
191 desc = irq_to_desc(irq); 191 desc = irq_to_desc(irq);
192 if (desc) 192 if (desc)
193 cfg = desc->chip_data; 193 cfg = get_irq_desc_chip_data(desc);
194 194
195 return cfg; 195 return cfg;
196} 196}
@@ -219,10 +219,11 @@ int arch_init_chip_data(struct irq_desc *desc, int node)
219{ 219{
220 struct irq_cfg *cfg; 220 struct irq_cfg *cfg;
221 221
222 cfg = desc->chip_data; 222 cfg = get_irq_desc_chip_data(desc);
223 if (!cfg) { 223 if (!cfg) {
224 desc->chip_data = get_one_free_irq_cfg(node); 224 cfg = get_one_free_irq_cfg(node);
225 if (!desc->chip_data) { 225 desc->chip_data = cfg;
226 if (!cfg) {
226 printk(KERN_ERR "can not alloc irq_cfg\n"); 227 printk(KERN_ERR "can not alloc irq_cfg\n");
227 BUG_ON(1); 228 BUG_ON(1);
228 } 229 }
@@ -325,8 +326,8 @@ void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc)
325{ 326{
326 struct irq_cfg *old_cfg, *cfg; 327 struct irq_cfg *old_cfg, *cfg;
327 328
328 old_cfg = old_desc->chip_data; 329 old_cfg = get_irq_desc_chip_data(old_desc);
329 cfg = desc->chip_data; 330 cfg = get_irq_desc_chip_data(desc);
330 331
331 if (old_cfg == cfg) 332 if (old_cfg == cfg)
332 return; 333 return;
@@ -594,7 +595,7 @@ static void __mask_IO_APIC_irq(struct irq_cfg *cfg)
594 595
595static void mask_IO_APIC_irq_desc(struct irq_desc *desc) 596static void mask_IO_APIC_irq_desc(struct irq_desc *desc)
596{ 597{
597 struct irq_cfg *cfg = desc->chip_data; 598 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
598 unsigned long flags; 599 unsigned long flags;
599 600
600 BUG_ON(!cfg); 601 BUG_ON(!cfg);
@@ -606,7 +607,7 @@ static void mask_IO_APIC_irq_desc(struct irq_desc *desc)
606 607
607static void unmask_IO_APIC_irq_desc(struct irq_desc *desc) 608static void unmask_IO_APIC_irq_desc(struct irq_desc *desc)
608{ 609{
609 struct irq_cfg *cfg = desc->chip_data; 610 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
610 unsigned long flags; 611 unsigned long flags;
611 612
612 raw_spin_lock_irqsave(&ioapic_lock, flags); 613 raw_spin_lock_irqsave(&ioapic_lock, flags);
@@ -1269,7 +1270,7 @@ void __setup_vector_irq(int cpu)
1269 raw_spin_lock(&vector_lock); 1270 raw_spin_lock(&vector_lock);
1270 /* Mark the inuse vectors */ 1271 /* Mark the inuse vectors */
1271 for_each_irq_desc(irq, desc) { 1272 for_each_irq_desc(irq, desc) {
1272 cfg = desc->chip_data; 1273 cfg = get_irq_desc_chip_data(desc);
1273 1274
1274 /* 1275 /*
1275 * If it is a legacy IRQ handled by the legacy PIC, this cpu 1276 * If it is a legacy IRQ handled by the legacy PIC, this cpu
@@ -1427,7 +1428,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
1427 if (!IO_APIC_IRQ(irq)) 1428 if (!IO_APIC_IRQ(irq))
1428 return; 1429 return;
1429 1430
1430 cfg = desc->chip_data; 1431 cfg = get_irq_desc_chip_data(desc);
1431 1432
1432 /* 1433 /*
1433 * For legacy irqs, cfg->domain starts with cpu 0 for legacy 1434 * For legacy irqs, cfg->domain starts with cpu 0 for legacy
@@ -1516,7 +1517,7 @@ static void __init setup_IO_APIC_irqs(void)
1516 printk(KERN_INFO "can not get irq_desc for %d\n", irq); 1517 printk(KERN_INFO "can not get irq_desc for %d\n", irq);
1517 continue; 1518 continue;
1518 } 1519 }
1519 cfg = desc->chip_data; 1520 cfg = get_irq_desc_chip_data(desc);
1520 add_pin_to_irq_node(cfg, node, apic_id, pin); 1521 add_pin_to_irq_node(cfg, node, apic_id, pin);
1521 /* 1522 /*
1522 * don't mark it in pin_programmed, so later acpi could 1523 * don't mark it in pin_programmed, so later acpi could
@@ -1567,7 +1568,7 @@ void setup_IO_APIC_irq_extra(u32 gsi)
1567 return; 1568 return;
1568 } 1569 }
1569 1570
1570 cfg = desc->chip_data; 1571 cfg = get_irq_desc_chip_data(desc);
1571 add_pin_to_irq_node(cfg, node, apic_id, pin); 1572 add_pin_to_irq_node(cfg, node, apic_id, pin);
1572 1573
1573 if (test_bit(pin, mp_ioapic_routing[apic_id].pin_programmed)) { 1574 if (test_bit(pin, mp_ioapic_routing[apic_id].pin_programmed)) {
@@ -1718,7 +1719,7 @@ __apicdebuginit(void) print_IO_APIC(void)
1718 for_each_irq_desc(irq, desc) { 1719 for_each_irq_desc(irq, desc) {
1719 struct irq_pin_list *entry; 1720 struct irq_pin_list *entry;
1720 1721
1721 cfg = desc->chip_data; 1722 cfg = get_irq_desc_chip_data(desc);
1722 if (!cfg) 1723 if (!cfg)
1723 continue; 1724 continue;
1724 entry = cfg->irq_2_pin; 1725 entry = cfg->irq_2_pin;
@@ -2323,7 +2324,7 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask,
2323 return -1; 2324 return -1;
2324 2325
2325 irq = desc->irq; 2326 irq = desc->irq;
2326 cfg = desc->chip_data; 2327 cfg = get_irq_desc_chip_data(desc);
2327 if (assign_irq_vector(irq, cfg, mask)) 2328 if (assign_irq_vector(irq, cfg, mask))
2328 return -1; 2329 return -1;
2329 2330
@@ -2343,7 +2344,7 @@ set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
2343 int ret = -1; 2344 int ret = -1;
2344 2345
2345 irq = desc->irq; 2346 irq = desc->irq;
2346 cfg = desc->chip_data; 2347 cfg = get_irq_desc_chip_data(desc);
2347 2348
2348 raw_spin_lock_irqsave(&ioapic_lock, flags); 2349 raw_spin_lock_irqsave(&ioapic_lock, flags);
2349 ret = set_desc_affinity(desc, mask, &dest); 2350 ret = set_desc_affinity(desc, mask, &dest);
@@ -2396,7 +2397,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
2396 if (get_irte(irq, &irte)) 2397 if (get_irte(irq, &irte))
2397 return ret; 2398 return ret;
2398 2399
2399 cfg = desc->chip_data; 2400 cfg = get_irq_desc_chip_data(desc);
2400 if (assign_irq_vector(irq, cfg, mask)) 2401 if (assign_irq_vector(irq, cfg, mask))
2401 return ret; 2402 return ret;
2402 2403
@@ -2500,7 +2501,7 @@ unlock:
2500static void __irq_complete_move(struct irq_desc **descp, unsigned vector) 2501static void __irq_complete_move(struct irq_desc **descp, unsigned vector)
2501{ 2502{
2502 struct irq_desc *desc = *descp; 2503 struct irq_desc *desc = *descp;
2503 struct irq_cfg *cfg = desc->chip_data; 2504 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
2504 unsigned me; 2505 unsigned me;
2505 2506
2506 if (likely(!cfg->move_in_progress)) 2507 if (likely(!cfg->move_in_progress))
@@ -2520,7 +2521,7 @@ static void irq_complete_move(struct irq_desc **descp)
2520void irq_force_complete_move(int irq) 2521void irq_force_complete_move(int irq)
2521{ 2522{
2522 struct irq_desc *desc = irq_to_desc(irq); 2523 struct irq_desc *desc = irq_to_desc(irq);
2523 struct irq_cfg *cfg = desc->chip_data; 2524 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
2524 2525
2525 if (!cfg) 2526 if (!cfg)
2526 return; 2527 return;
@@ -2588,7 +2589,7 @@ static void eoi_ioapic_irq(struct irq_desc *desc)
2588 unsigned int irq; 2589 unsigned int irq;
2589 2590
2590 irq = desc->irq; 2591 irq = desc->irq;
2591 cfg = desc->chip_data; 2592 cfg = get_irq_desc_chip_data(desc);
2592 2593
2593 raw_spin_lock_irqsave(&ioapic_lock, flags); 2594 raw_spin_lock_irqsave(&ioapic_lock, flags);
2594 __eoi_ioapic_irq(irq, cfg); 2595 __eoi_ioapic_irq(irq, cfg);
@@ -2644,7 +2645,7 @@ static void ack_apic_level(unsigned int irq)
2644 * we use the above logic (mask+edge followed by unmask+level) from 2645 * we use the above logic (mask+edge followed by unmask+level) from
2645 * Manfred Spraul to clear the remote IRR. 2646 * Manfred Spraul to clear the remote IRR.
2646 */ 2647 */
2647 cfg = desc->chip_data; 2648 cfg = get_irq_desc_chip_data(desc);
2648 i = cfg->vector; 2649 i = cfg->vector;
2649 v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); 2650 v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1));
2650 2651
@@ -2695,7 +2696,7 @@ static void ack_apic_level(unsigned int irq)
2695 * accurate and is causing problems then it is a hardware bug 2696 * accurate and is causing problems then it is a hardware bug
2696 * and you can go talk to the chipset vendor about it. 2697 * and you can go talk to the chipset vendor about it.
2697 */ 2698 */
2698 cfg = desc->chip_data; 2699 cfg = get_irq_desc_chip_data(desc);
2699 if (!io_apic_level_ack_pending(cfg)) 2700 if (!io_apic_level_ack_pending(cfg))
2700 move_masked_irq(irq); 2701 move_masked_irq(irq);
2701 unmask_IO_APIC_irq_desc(desc); 2702 unmask_IO_APIC_irq_desc(desc);
@@ -2763,7 +2764,7 @@ static inline void init_IO_APIC_traps(void)
2763 * 0x80, because int 0x80 is hm, kind of importantish. ;) 2764 * 0x80, because int 0x80 is hm, kind of importantish. ;)
2764 */ 2765 */
2765 for_each_irq_desc(irq, desc) { 2766 for_each_irq_desc(irq, desc) {
2766 cfg = desc->chip_data; 2767 cfg = get_irq_desc_chip_data(desc);
2767 if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) { 2768 if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) {
2768 /* 2769 /*
2769 * Hmm.. We don't have an entry for this, 2770 * Hmm.. We don't have an entry for this,
@@ -2917,7 +2918,7 @@ int timer_through_8259 __initdata;
2917static inline void __init check_timer(void) 2918static inline void __init check_timer(void)
2918{ 2919{
2919 struct irq_desc *desc = irq_to_desc(0); 2920 struct irq_desc *desc = irq_to_desc(0);
2920 struct irq_cfg *cfg = desc->chip_data; 2921 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
2921 int node = cpu_to_node(0); 2922 int node = cpu_to_node(0);
2922 int apic1, pin1, apic2, pin2; 2923 int apic1, pin1, apic2, pin2;
2923 unsigned long flags; 2924 unsigned long flags;
@@ -3250,13 +3251,13 @@ unsigned int create_irq_nr(unsigned int irq_want, int node)
3250 printk(KERN_INFO "can not get irq_desc for %d\n", new); 3251 printk(KERN_INFO "can not get irq_desc for %d\n", new);
3251 continue; 3252 continue;
3252 } 3253 }
3253 cfg_new = desc_new->chip_data; 3254 cfg_new = get_irq_desc_chip_data(desc_new);
3254 3255
3255 if (cfg_new->vector != 0) 3256 if (cfg_new->vector != 0)
3256 continue; 3257 continue;
3257 3258
3258 desc_new = move_irq_desc(desc_new, node); 3259 desc_new = move_irq_desc(desc_new, node);
3259 cfg_new = desc_new->chip_data; 3260 cfg_new = get_irq_desc_chip_data(desc_new);
3260 3261
3261 if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) 3262 if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
3262 irq = new; 3263 irq = new;
@@ -3381,7 +3382,7 @@ static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
3381 if (set_desc_affinity(desc, mask, &dest)) 3382 if (set_desc_affinity(desc, mask, &dest))
3382 return -1; 3383 return -1;
3383 3384
3384 cfg = desc->chip_data; 3385 cfg = get_irq_desc_chip_data(desc);
3385 3386
3386 __get_cached_msi_msg(desc->irq_data.msi_desc, &msg); 3387 __get_cached_msi_msg(desc->irq_data.msi_desc, &msg);
3387 3388
@@ -3403,7 +3404,7 @@ static int
3403ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) 3404ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
3404{ 3405{
3405 struct irq_desc *desc = irq_to_desc(irq); 3406 struct irq_desc *desc = irq_to_desc(irq);
3406 struct irq_cfg *cfg = desc->chip_data; 3407 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
3407 unsigned int dest; 3408 unsigned int dest;
3408 struct irte irte; 3409 struct irte irte;
3409 3410
@@ -3595,7 +3596,7 @@ static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
3595 if (set_desc_affinity(desc, mask, &dest)) 3596 if (set_desc_affinity(desc, mask, &dest))
3596 return -1; 3597 return -1;
3597 3598
3598 cfg = desc->chip_data; 3599 cfg = get_irq_desc_chip_data(desc);
3599 3600
3600 dmar_msi_read(irq, &msg); 3601 dmar_msi_read(irq, &msg);
3601 3602
@@ -3650,7 +3651,7 @@ static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
3650 if (set_desc_affinity(desc, mask, &dest)) 3651 if (set_desc_affinity(desc, mask, &dest))
3651 return -1; 3652 return -1;
3652 3653
3653 cfg = desc->chip_data; 3654 cfg = get_irq_desc_chip_data(desc);
3654 3655
3655 hpet_msi_read(irq, &msg); 3656 hpet_msi_read(irq, &msg);
3656 3657
@@ -3756,7 +3757,7 @@ static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
3756 if (set_desc_affinity(desc, mask, &dest)) 3757 if (set_desc_affinity(desc, mask, &dest))
3757 return -1; 3758 return -1;
3758 3759
3759 cfg = desc->chip_data; 3760 cfg = get_irq_desc_chip_data(desc);
3760 3761
3761 target_ht_irq(irq, dest, cfg->vector); 3762 target_ht_irq(irq, dest, cfg->vector);
3762 3763
@@ -3903,7 +3904,7 @@ static int __io_apic_set_pci_routing(struct device *dev, int irq,
3903 * IRQs < 16 are already in the irq_2_pin[] map 3904 * IRQs < 16 are already in the irq_2_pin[] map
3904 */ 3905 */
3905 if (irq >= legacy_pic->nr_legacy_irqs) { 3906 if (irq >= legacy_pic->nr_legacy_irqs) {
3906 cfg = desc->chip_data; 3907 cfg = get_irq_desc_chip_data(desc);
3907 if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) { 3908 if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) {
3908 printk(KERN_INFO "can not add pin %d for irq %d\n", 3909 printk(KERN_INFO "can not add pin %d for irq %d\n",
3909 pin, irq); 3910 pin, irq);