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authorRobert Richter <robert.richter@amd.com>2010-10-06 06:27:54 -0400
committerIngo Molnar <mingo@elte.hu>2010-10-19 22:42:13 -0400
commit27afdf2008da0b8878a73e32e4eb12381b84e224 (patch)
tree84aaf8c200f597553a2874b30d9589718d937878 /arch/x86/kernel/apic/apic.c
parenta68c439b1966c91f0ef474e2bf275d6792312726 (diff)
apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets
We want the BIOS to setup the EILVT APIC registers. The offsets were hardcoded and BIOS settings were overwritten by the OS. Now, the subsystems for MCE threshold and IBS determine the LVT offset from the registers the BIOS has setup. If the BIOS setup is buggy on a family 10h system, a workaround enables IBS. If the OS determines an invalid register setup, a "[Firmware Bug]: " error message is reported. We need this change also for upcomming cpu families. Signed-off-by: Robert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-3-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic/apic.c')
-rw-r--r--arch/x86/kernel/apic/apic.c19
1 files changed, 2 insertions, 17 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 2bfeafd24f5c..850657d1b0ed 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -390,9 +390,6 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
390 * necessarily a BIOS bug. 390 * necessarily a BIOS bug.
391 */ 391 */
392 392
393#define APIC_EILVT_LVTOFF_MCE 0
394#define APIC_EILVT_LVTOFF_IBS 1
395
396static atomic_t eilvt_offsets[APIC_EILVT_NR_MAX]; 393static atomic_t eilvt_offsets[APIC_EILVT_NR_MAX];
397 394
398static inline int eilvt_entry_is_changeable(unsigned int old, unsigned int new) 395static inline int eilvt_entry_is_changeable(unsigned int old, unsigned int new)
@@ -426,7 +423,7 @@ static unsigned int reserve_eilvt_offset(int offset, unsigned int new)
426 * enables the vector. See also the BKDGs. 423 * enables the vector. See also the BKDGs.
427 */ 424 */
428 425
429static int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask) 426int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask)
430{ 427{
431 unsigned long reg = APIC_EILVTn(offset); 428 unsigned long reg = APIC_EILVTn(offset);
432 unsigned int new, old, reserved; 429 unsigned int new, old, reserved;
@@ -454,19 +451,7 @@ static int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask)
454 451
455 return 0; 452 return 0;
456} 453}
457 454EXPORT_SYMBOL_GPL(setup_APIC_eilvt);
458u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask)
459{
460 setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type, mask);
461 return APIC_EILVT_LVTOFF_MCE;
462}
463
464u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask)
465{
466 setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type, mask);
467 return APIC_EILVT_LVTOFF_IBS;
468}
469EXPORT_SYMBOL_GPL(setup_APIC_eilvt_ibs);
470 455
471/* 456/*
472 * Program the next event, relative to now 457 * Program the next event, relative to now