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authorCyrill Gorcunov <gorcunov@gmail.com>2008-09-14 03:55:37 -0400
committerIngo Molnar <mingo@elte.hu>2008-10-16 10:53:10 -0400
commit9df08f109572e88fbdab9a61d5cb0f0eae4ac9fa (patch)
treecb1668a6d81db813c8e0d050cbe1f06d6fc33e99 /arch/x86/kernel/apic.c
parentc87695ea74f21d180e1df3a1d00ac3dd432ea03b (diff)
x86: apic - lapic_setup_esr does not handle esr_disable - fix it
lapic_setup_esr doesn't handle esr_disable inquire. The error brought in during unification process. Fix it. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic.c')
-rw-r--r--arch/x86/kernel/apic.c63
1 files changed, 33 insertions, 30 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 11cb18639581..59550cc017dc 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -1081,40 +1081,43 @@ void __init init_bsp_APIC(void)
1081 1081
1082static void __cpuinit lapic_setup_esr(void) 1082static void __cpuinit lapic_setup_esr(void)
1083{ 1083{
1084 unsigned long oldvalue, value, maxlvt; 1084 unsigned int oldvalue, value, maxlvt;
1085 if (lapic_is_integrated() && !esr_disable) { 1085
1086 if (esr_disable) { 1086 if (!lapic_is_integrated()) {
1087 /* 1087 printk(KERN_INFO "No ESR for 82489DX.\n");
1088 * Something untraceable is creating bad interrupts on 1088 return;
1089 * secondary quads ... for the moment, just leave the 1089 }
1090 * ESR disabled - we can't do anything useful with the
1091 * errors anyway - mbligh
1092 */
1093 printk(KERN_INFO "Leaving ESR disabled.\n");
1094 return;
1095 }
1096 /* !82489DX */
1097 maxlvt = lapic_get_maxlvt();
1098 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
1099 apic_write(APIC_ESR, 0);
1100 oldvalue = apic_read(APIC_ESR);
1101 1090
1102 /* enables sending errors */ 1091 if (esr_disable) {
1103 value = ERROR_APIC_VECTOR;
1104 apic_write(APIC_LVTERR, value);
1105 /* 1092 /*
1106 * spec says clear errors after enabling vector. 1093 * Something untraceable is creating bad interrupts on
1094 * secondary quads ... for the moment, just leave the
1095 * ESR disabled - we can't do anything useful with the
1096 * errors anyway - mbligh
1107 */ 1097 */
1108 if (maxlvt > 3) 1098 printk(KERN_INFO "Leaving ESR disabled.\n");
1109 apic_write(APIC_ESR, 0); 1099 return;
1110 value = apic_read(APIC_ESR);
1111 if (value != oldvalue)
1112 apic_printk(APIC_VERBOSE, "ESR value before enabling "
1113 "vector: 0x%08lx after: 0x%08lx\n",
1114 oldvalue, value);
1115 } else {
1116 printk(KERN_INFO "No ESR for 82489DX.\n");
1117 } 1100 }
1101
1102 maxlvt = lapic_get_maxlvt();
1103 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
1104 apic_write(APIC_ESR, 0);
1105 oldvalue = apic_read(APIC_ESR);
1106
1107 /* enables sending errors */
1108 value = ERROR_APIC_VECTOR;
1109 apic_write(APIC_LVTERR, value);
1110
1111 /*
1112 * spec says clear errors after enabling vector.
1113 */
1114 if (maxlvt > 3)
1115 apic_write(APIC_ESR, 0);
1116 value = apic_read(APIC_ESR);
1117 if (value != oldvalue)
1118 apic_printk(APIC_VERBOSE, "ESR value before enabling "
1119 "vector: 0x%08x after: 0x%08x\n",
1120 oldvalue, value);
1118} 1121}
1119 1122
1120 1123