x86: disable the GART early, 64-bit

For K8 system: 4G RAM with memory hole remapping enabled, or more than
4G RAM installed.

when try to use kexec second kernel, and the first doesn't include
gart_shutdown. the second kernel could have different aper position than
the first kernel. and second kernel could use that hole as RAM that is
still used by GART set by the first kernel. esp. when try to kexec
2.6.24 with sparse mem enable from previous kernel (from RHEL 5 or SLES
10). the new kernel will use aper by GART (set by first kernel) for
vmemmap. and after new kernel setting one new GART. the position will be
real RAM. the _mapcount set is lost.

Bad page state in process 'swapper'
page:ffffe2000e600020 flags:0x0000000000000000 mapping:0000000000000000 mapcount:1 count:0
Trying to fix it up, but a reboot is needed
Backtrace:
Pid: 0, comm: swapper Not tainted 2.6.24-rc7-smp-gcdf71a10-dirty #13

Call Trace:
 [<ffffffff8026401f>] bad_page+0x63/0x8d
 [<ffffffff80264169>] __free_pages_ok+0x7c/0x2a5
 [<ffffffff80ba75d1>] free_all_bootmem_core+0xd0/0x198
 [<ffffffff80ba3a42>] numa_free_all_bootmem+0x3b/0x76
 [<ffffffff80ba3461>] mem_init+0x3b/0x152
 [<ffffffff80b959d3>] start_kernel+0x236/0x2c2
 [<ffffffff80b9511a>] _sinittext+0x11a/0x121

and
 [ffffe2000e600000-ffffe2000e7fffff] PMD ->ffff81001c200000 on node 0
phys addr is : 0x1c200000

RHEL 5.1 kernel -53 said:
PCI-DMA: aperture base @ 1c000000 size 65536 KB

new kernel said:
Mapping aperture over 65536 KB of RAM @ 3c000000

So could try to disable that GART if possible.

According to Ingo

> hm, i'm wondering, instead of modifying the GART, why dont we simply
> _detect_ whatever GART settings we have inherited, and propagate that
> into our e820 maps? I.e. if there's inconsistency, then punch that out
> from the memory maps and just dont use that memory.
>
> that way it would not matter whether the GART settings came from a [old
> or crashing] Linux kernel that has not called gart_iommu_shutdown(), or
> whether it's a BIOS that has set up an aperture hole inconsistent with
> the memory map it passed. (or the memory map we _think_ i tried to pass
> us)
>
> it would also be more robust to only read and do a memory map quirk
> based on that, than actively trying to change the GART so early in the
> bootup. Later on we have to re-enable the GART _anyway_ and have to
> punch a hole for it.
>
> and as a bonus, we would have shored up our defenses against crappy
> BIOSes as well.

add e820 modification for gart inconsistent setting.

gart_fix_e820=off could be used to disable e820 fix.

Signed-off-by: Yinghai Lu <yinghai.lu@sun.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

1 files changed, 89 insertions, 0 deletions

diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 52d2beac4556..bf1b469d5847 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -218,6 +218,95 @@ static __u32 __init search_agp_bridge(u32 *order, int *valid_agp)
         return 0;
 }
 
+static int gart_fix_e820 __initdata = 1;
+
+static int __init parse_gart_mem(char *p)
+{
+        if (!p)
+                return -EINVAL;
+
+        if (!strncmp(p, "off", 3))
+                gart_fix_e820 = 0;
+        else if (!strncmp(p, "on", 2))
+                gart_fix_e820 = 1;
+
+        return 0;
+}
+early_param("gart_fix_e820", parse_gart_mem);
+
+void __init early_gart_iommu_check(void)
+{
+        /*
+         * in case it is enabled before, esp for kexec/kdump,
+         * previous kernel already enable that. memset called
+         * by allocate_aperture/__alloc_bootmem_nopanic cause restart.
+         * or second kernel have different position for GART hole. and new
+         * kernel could use hole as RAM that is still used by GART set by
+         * first kernel
+         * or BIOS forget to put that in reserved.
+         * try to update e820 to make that region as reserved.
+         */
+        int fix, num;
+        u32 ctl;
+        u32 aper_size = 0, aper_order = 0, last_aper_order = 0;
+        u64 aper_base = 0, last_aper_base = 0;
+        int aper_enabled = 0, last_aper_enabled = 0;
+
+        if (!early_pci_allowed())
+                return;
+
+        fix = 0;
+        for (num = 24; num < 32; num++) {
+                if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00)))
+                        continue;
+
+                ctl = read_pci_config(0, num, 3, 0x90);
+                aper_enabled = ctl & 1;
+                aper_order = (ctl >> 1) & 7;
+                aper_size = (32 * 1024 * 1024) << aper_order;
+                aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff;
+                aper_base <<= 25;
+
+                if ((last_aper_order && aper_order != last_aper_order) ||
+                    (last_aper_base && aper_base != last_aper_base) ||
+                    (last_aper_enabled && aper_enabled != last_aper_enabled)) {
+                        fix = 1;
+                        break;
+                }
+                last_aper_order = aper_order;
+                last_aper_base = aper_base;
+                last_aper_enabled = aper_enabled;
+        }
+
+        if (!fix && !aper_enabled)
+                return;
+
+        if (!aper_base || !aper_size || aper_base + aper_size > 0x100000000UL)
+                fix = 1;
+
+        if (gart_fix_e820 && !fix && aper_enabled) {
+                if (e820_any_mapped(aper_base, aper_base + aper_size,
+                                    E820_RAM)) {
+                        /* reserved it, so we can resuse it in second kernel */
+                        printk(KERN_INFO "update e820 for GART\n");
+                        add_memory_region(aper_base, aper_size, E820_RESERVED);
+                        update_e820();
+                }
+                return;
+        }
+
+        /* different nodes have different setting, disable them all at first*/
+        for (num = 24; num < 32; num++) {
+                if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00)))
+                        continue;
+
+                ctl = read_pci_config(0, num, 3, 0x90);
+                ctl &= ~1;
+                write_pci_config(0, num, 3, 0x90, ctl);
+        }
+
+}
+
 void __init gart_iommu_hole_init(void)
 {
         u32 aper_size, aper_alloc = 0, aper_order = 0, last_aper_order = 0;