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authorRobert Richter <robert.richter@amd.com>2010-02-25 13:43:07 -0500
committerRobert Richter <robert.richter@amd.com>2010-03-01 05:23:15 -0500
commita163b1099dc7016704043c7fc572ae42519f08f7 (patch)
tree3ef749366e7a8a3bf94468ff7230f701fa2a49c8 /arch/x86/include
parent1d6040f17d12a65b9f7ab4cb9fd6d721206b79ec (diff)
perf, x86: add some IBS macros to perf_event.h
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/perf_event.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 4933ccde96c4..c7f60e1297ab 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -121,12 +121,14 @@ union cpuid10_edx {
121#define IBS_FETCH_RAND_EN (1ULL<<57) 121#define IBS_FETCH_RAND_EN (1ULL<<57)
122#define IBS_FETCH_VAL (1ULL<<49) 122#define IBS_FETCH_VAL (1ULL<<49)
123#define IBS_FETCH_ENABLE (1ULL<<48) 123#define IBS_FETCH_ENABLE (1ULL<<48)
124#define IBS_FETCH_CNT_MASK 0xFFFF0000ULL 124#define IBS_FETCH_CNT 0xFFFF0000ULL
125#define IBS_FETCH_MAX_CNT 0x0000FFFFULL
125 126
126/* IbsOpCtl bits */ 127/* IbsOpCtl bits */
127#define IBS_OP_CNT_CTL (1ULL<<19) 128#define IBS_OP_CNT_CTL (1ULL<<19)
128#define IBS_OP_VAL (1ULL<<18) 129#define IBS_OP_VAL (1ULL<<18)
129#define IBS_OP_ENABLE (1ULL<<17) 130#define IBS_OP_ENABLE (1ULL<<17)
131#define IBS_OP_MAX_CNT 0x0000FFFFULL
130 132
131#ifdef CONFIG_PERF_EVENTS 133#ifdef CONFIG_PERF_EVENTS
132extern void init_hw_perf_events(void); 134extern void init_hw_perf_events(void);