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authorIngo Molnar <mingo@elte.hu>2009-02-17 11:20:11 -0500
committerIngo Molnar <mingo@elte.hu>2009-02-17 11:20:11 -0500
commit0b6de0092244c98b5ba1abda34c92470a20e0d0c (patch)
tree478e4e18c33fd9fa517559e1ce951fe378d5965f /arch/x86/include
parent37a25424252b6cff4dd4b1937ab6a1dbfcadabcc (diff)
parentf62bae5009c1ba596cd475cafbc83e0570a36e26 (diff)
Merge branch 'x86/apic' into perfcounters/core
Conflicts: arch/x86/kernel/cpu/perfctr-watchdog.c
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/apic.h394
-rw-r--r--arch/x86/include/asm/genapic.h264
-rw-r--r--arch/x86/include/asm/io.h2
-rw-r--r--arch/x86/include/asm/ipi.h2
-rw-r--r--arch/x86/include/asm/mpspec.h2
-rw-r--r--arch/x86/include/asm/page.h167
-rw-r--r--arch/x86/include/asm/page_32.h87
-rw-r--r--arch/x86/include/asm/page_32_types.h62
-rw-r--r--arch/x86/include/asm/page_64.h101
-rw-r--r--arch/x86/include/asm/page_64_types.h91
-rw-r--r--arch/x86/include/asm/page_types.h63
-rw-r--r--arch/x86/include/asm/paravirt.h2
-rw-r--r--arch/x86/include/asm/pgtable-2level_types.h (renamed from arch/x86/include/asm/pgtable-2level-defs.h)15
-rw-r--r--arch/x86/include/asm/pgtable-3level_types.h (renamed from arch/x86/include/asm/pgtable-3level-defs.h)18
-rw-r--r--arch/x86/include/asm/pgtable.h329
-rw-r--r--arch/x86/include/asm/pgtable_32.h42
-rw-r--r--arch/x86/include/asm/pgtable_32_types.h46
-rw-r--r--arch/x86/include/asm/pgtable_64.h48
-rw-r--r--arch/x86/include/asm/pgtable_64_types.h62
-rw-r--r--arch/x86/include/asm/pgtable_types.h322
-rw-r--r--arch/x86/include/asm/processor.h1
-rw-r--r--arch/x86/include/asm/setup.h45
-rw-r--r--arch/x86/include/asm/syscalls.h1
-rw-r--r--arch/x86/include/asm/xen/hypervisor.h28
24 files changed, 1141 insertions, 1053 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index fba49f66228f..dce1bf696cca 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -1,15 +1,18 @@
1#ifndef _ASM_X86_APIC_H 1#ifndef _ASM_X86_APIC_H
2#define _ASM_X86_APIC_H 2#define _ASM_X86_APIC_H
3 3
4#include <linux/pm.h> 4#include <linux/cpumask.h>
5#include <linux/delay.h> 5#include <linux/delay.h>
6#include <linux/pm.h>
6 7
7#include <asm/alternative.h> 8#include <asm/alternative.h>
8#include <asm/fixmap.h> 9#include <asm/cpufeature.h>
9#include <asm/apicdef.h>
10#include <asm/processor.h> 10#include <asm/processor.h>
11#include <asm/apicdef.h>
12#include <asm/atomic.h>
13#include <asm/fixmap.h>
14#include <asm/mpspec.h>
11#include <asm/system.h> 15#include <asm/system.h>
12#include <asm/cpufeature.h>
13#include <asm/msr.h> 16#include <asm/msr.h>
14 17
15#define ARCH_APICTIMER_STOPS_ON_C3 1 18#define ARCH_APICTIMER_STOPS_ON_C3 1
@@ -92,6 +95,12 @@ static inline u32 native_apic_mem_read(u32 reg)
92 return *((volatile u32 *)(APIC_BASE + reg)); 95 return *((volatile u32 *)(APIC_BASE + reg));
93} 96}
94 97
98extern void native_apic_wait_icr_idle(void);
99extern u32 native_safe_apic_wait_icr_idle(void);
100extern void native_apic_icr_write(u32 low, u32 id);
101extern u64 native_apic_icr_read(void);
102
103#ifdef CONFIG_X86_X2APIC
95static inline void native_apic_msr_write(u32 reg, u32 v) 104static inline void native_apic_msr_write(u32 reg, u32 v)
96{ 105{
97 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 106 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
@@ -112,7 +121,31 @@ static inline u32 native_apic_msr_read(u32 reg)
112 return low; 121 return low;
113} 122}
114 123
115#ifndef CONFIG_X86_32 124static inline void native_x2apic_wait_icr_idle(void)
125{
126 /* no need to wait for icr idle in x2apic */
127 return;
128}
129
130static inline u32 native_safe_x2apic_wait_icr_idle(void)
131{
132 /* no need to wait for icr idle in x2apic */
133 return 0;
134}
135
136static inline void native_x2apic_icr_write(u32 low, u32 id)
137{
138 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
139}
140
141static inline u64 native_x2apic_icr_read(void)
142{
143 unsigned long val;
144
145 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
146 return val;
147}
148
116extern int x2apic; 149extern int x2apic;
117extern void check_x2apic(void); 150extern void check_x2apic(void);
118extern void enable_x2apic(void); 151extern void enable_x2apic(void);
@@ -131,53 +164,24 @@ static inline int x2apic_enabled(void)
131 return 0; 164 return 0;
132} 165}
133#else 166#else
134#define x2apic_enabled() 0 167static inline void check_x2apic(void)
135#endif
136
137struct apic_ops {
138 u32 (*read)(u32 reg);
139 void (*write)(u32 reg, u32 v);
140 u64 (*icr_read)(void);
141 void (*icr_write)(u32 low, u32 high);
142 void (*wait_icr_idle)(void);
143 u32 (*safe_wait_icr_idle)(void);
144};
145
146extern struct apic_ops *apic_ops;
147
148static inline u32 apic_read(u32 reg)
149{ 168{
150 return apic_ops->read(reg);
151} 169}
152 170static inline void enable_x2apic(void)
153static inline void apic_write(u32 reg, u32 val)
154{ 171{
155 apic_ops->write(reg, val);
156} 172}
157 173static inline void enable_IR_x2apic(void)
158static inline u64 apic_icr_read(void)
159{ 174{
160 return apic_ops->icr_read();
161} 175}
162 176static inline int x2apic_enabled(void)
163static inline void apic_icr_write(u32 low, u32 high)
164{
165 apic_ops->icr_write(low, high);
166}
167
168static inline void apic_wait_icr_idle(void)
169{
170 apic_ops->wait_icr_idle();
171}
172
173static inline u32 safe_apic_wait_icr_idle(void)
174{ 177{
175 return apic_ops->safe_wait_icr_idle(); 178 return 0;
176} 179}
180#endif
177 181
178extern int get_physical_broadcast(void); 182extern int get_physical_broadcast(void);
179 183
180#ifdef CONFIG_X86_64 184#ifdef CONFIG_X86_X2APIC
181static inline void ack_x2APIC_irq(void) 185static inline void ack_x2APIC_irq(void)
182{ 186{
183 /* Docs say use 0 for future compatibility */ 187 /* Docs say use 0 for future compatibility */
@@ -185,18 +189,6 @@ static inline void ack_x2APIC_irq(void)
185} 189}
186#endif 190#endif
187 191
188
189static inline void ack_APIC_irq(void)
190{
191 /*
192 * ack_APIC_irq() actually gets compiled as a single instruction
193 * ... yummie.
194 */
195
196 /* Docs say use 0 for future compatibility */
197 apic_write(APIC_EOI, 0);
198}
199
200extern int lapic_get_maxlvt(void); 192extern int lapic_get_maxlvt(void);
201extern void clear_local_APIC(void); 193extern void clear_local_APIC(void);
202extern void connect_bsp_APIC(void); 194extern void connect_bsp_APIC(void);
@@ -244,7 +236,138 @@ static inline void disable_local_APIC(void) { }
244#define SET_APIC_ID(x) (apic->set_apic_id(x)) 236#define SET_APIC_ID(x) (apic->set_apic_id(x))
245#else 237#else
246 238
247#ifdef CONFIG_X86_LOCAL_APIC 239#endif
240
241/*
242 * Copyright 2004 James Cleverdon, IBM.
243 * Subject to the GNU Public License, v.2
244 *
245 * Generic APIC sub-arch data struct.
246 *
247 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
248 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
249 * James Cleverdon.
250 */
251struct apic {
252 char *name;
253
254 int (*probe)(void);
255 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
256 int (*apic_id_registered)(void);
257
258 u32 irq_delivery_mode;
259 u32 irq_dest_mode;
260
261 const struct cpumask *(*target_cpus)(void);
262
263 int disable_esr;
264
265 int dest_logical;
266 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
267 unsigned long (*check_apicid_present)(int apicid);
268
269 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
270 void (*init_apic_ldr)(void);
271
272 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
273
274 void (*setup_apic_routing)(void);
275 int (*multi_timer_check)(int apic, int irq);
276 int (*apicid_to_node)(int logical_apicid);
277 int (*cpu_to_logical_apicid)(int cpu);
278 int (*cpu_present_to_apicid)(int mps_cpu);
279 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
280 void (*setup_portio_remap)(void);
281 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
282 void (*enable_apic_mode)(void);
283 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
284
285 /*
286 * When one of the next two hooks returns 1 the apic
287 * is switched to this. Essentially they are additional
288 * probe functions:
289 */
290 int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
291
292 unsigned int (*get_apic_id)(unsigned long x);
293 unsigned long (*set_apic_id)(unsigned int id);
294 unsigned long apic_id_mask;
295
296 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
297 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
298 const struct cpumask *andmask);
299
300 /* ipi */
301 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
302 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
303 int vector);
304 void (*send_IPI_allbutself)(int vector);
305 void (*send_IPI_all)(int vector);
306 void (*send_IPI_self)(int vector);
307
308 /* wakeup_secondary_cpu */
309 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
310
311 int trampoline_phys_low;
312 int trampoline_phys_high;
313
314 void (*wait_for_init_deassert)(atomic_t *deassert);
315 void (*smp_callin_clear_local_apic)(void);
316 void (*inquire_remote_apic)(int apicid);
317
318 /* apic ops */
319 u32 (*read)(u32 reg);
320 void (*write)(u32 reg, u32 v);
321 u64 (*icr_read)(void);
322 void (*icr_write)(u32 low, u32 high);
323 void (*wait_icr_idle)(void);
324 u32 (*safe_wait_icr_idle)(void);
325};
326
327extern struct apic *apic;
328
329static inline u32 apic_read(u32 reg)
330{
331 return apic->read(reg);
332}
333
334static inline void apic_write(u32 reg, u32 val)
335{
336 apic->write(reg, val);
337}
338
339static inline u64 apic_icr_read(void)
340{
341 return apic->icr_read();
342}
343
344static inline void apic_icr_write(u32 low, u32 high)
345{
346 apic->icr_write(low, high);
347}
348
349static inline void apic_wait_icr_idle(void)
350{
351 apic->wait_icr_idle();
352}
353
354static inline u32 safe_apic_wait_icr_idle(void)
355{
356 return apic->safe_wait_icr_idle();
357}
358
359
360static inline void ack_APIC_irq(void)
361{
362 /*
363 * ack_APIC_irq() actually gets compiled as a single instruction
364 * ... yummie.
365 */
366
367 /* Docs say use 0 for future compatibility */
368 apic_write(APIC_EOI, 0);
369}
370
248static inline unsigned default_get_apic_id(unsigned long x) 371static inline unsigned default_get_apic_id(unsigned long x)
249{ 372{
250 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 373 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
@@ -254,8 +377,171 @@ static inline unsigned default_get_apic_id(unsigned long x)
254 else 377 else
255 return (x >> 24) & 0x0F; 378 return (x >> 24) & 0x0F;
256} 379}
380
381/*
382 * Warm reset vector default position:
383 */
384#define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
385#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
386
387#ifdef CONFIG_X86_32
388extern void es7000_update_apic_to_cluster(void);
389#else
390extern struct apic apic_flat;
391extern struct apic apic_physflat;
392extern struct apic apic_x2apic_cluster;
393extern struct apic apic_x2apic_phys;
394extern int default_acpi_madt_oem_check(char *, char *);
395
396extern void apic_send_IPI_self(int vector);
397
398extern struct apic apic_x2apic_uv_x;
399DECLARE_PER_CPU(int, x2apic_extra_bits);
400
401extern int default_cpu_present_to_apicid(int mps_cpu);
402extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
403#endif
404
405static inline void default_wait_for_init_deassert(atomic_t *deassert)
406{
407 while (!atomic_read(deassert))
408 cpu_relax();
409 return;
410}
411
412extern void generic_bigsmp_probe(void);
413
414
415#ifdef CONFIG_X86_LOCAL_APIC
416
417#include <asm/smp.h>
418
419#define APIC_DFR_VALUE (APIC_DFR_FLAT)
420
421static inline const struct cpumask *default_target_cpus(void)
422{
423#ifdef CONFIG_SMP
424 return cpu_online_mask;
425#else
426 return cpumask_of(0);
257#endif 427#endif
428}
429
430DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
431
432
433static inline unsigned int read_apic_id(void)
434{
435 unsigned int reg;
436
437 reg = apic_read(APIC_ID);
438
439 return apic->get_apic_id(reg);
440}
441
442extern void default_setup_apic_routing(void);
443
444#ifdef CONFIG_X86_32
445/*
446 * Set up the logical destination ID.
447 *
448 * Intel recommends to set DFR, LDR and TPR before enabling
449 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
450 * document number 292116). So here it goes...
451 */
452extern void default_init_apic_ldr(void);
453
454static inline int default_apic_id_registered(void)
455{
456 return physid_isset(read_apic_id(), phys_cpu_present_map);
457}
458
459static inline unsigned int
460default_cpu_mask_to_apicid(const struct cpumask *cpumask)
461{
462 return cpumask_bits(cpumask)[0];
463}
464
465static inline unsigned int
466default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
467 const struct cpumask *andmask)
468{
469 unsigned long mask1 = cpumask_bits(cpumask)[0];
470 unsigned long mask2 = cpumask_bits(andmask)[0];
471 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
472
473 return (unsigned int)(mask1 & mask2 & mask3);
474}
475
476static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
477{
478 return cpuid_apic >> index_msb;
479}
480
481extern int default_apicid_to_node(int logical_apicid);
482
483#endif
484
485static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
486{
487 return physid_isset(apicid, bitmap);
488}
489
490static inline unsigned long default_check_apicid_present(int bit)
491{
492 return physid_isset(bit, phys_cpu_present_map);
493}
494
495static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
496{
497 return phys_map;
498}
499
500/* Mapping from cpu number to logical apicid */
501static inline int default_cpu_to_logical_apicid(int cpu)
502{
503 return 1 << cpu;
504}
505
506static inline int __default_cpu_present_to_apicid(int mps_cpu)
507{
508 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
509 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
510 else
511 return BAD_APICID;
512}
513
514static inline int
515__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
516{
517 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
518}
519
520#ifdef CONFIG_X86_32
521static inline int default_cpu_present_to_apicid(int mps_cpu)
522{
523 return __default_cpu_present_to_apicid(mps_cpu);
524}
525
526static inline int
527default_check_phys_apicid_present(int boot_cpu_physical_apicid)
528{
529 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
530}
531#else
532extern int default_cpu_present_to_apicid(int mps_cpu);
533extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
534#endif
535
536static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
537{
538 return physid_mask_of_physid(phys_apicid);
539}
540
541#endif /* CONFIG_X86_LOCAL_APIC */
258 542
543#ifdef CONFIG_X86_32
544extern u8 cpu_2_logical_apicid[NR_CPUS];
259#endif 545#endif
260 546
261#endif /* _ASM_X86_APIC_H */ 547#endif /* _ASM_X86_APIC_H */
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index 273b99452ae0..4b8b98fa7f25 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -1,263 +1 @@
1#ifndef _ASM_X86_GENAPIC_H #include <asm/apic.h>
2#define _ASM_X86_GENAPIC_H
3
4#include <linux/cpumask.h>
5
6#include <asm/mpspec.h>
7#include <asm/atomic.h>
8
9/*
10 * Copyright 2004 James Cleverdon, IBM.
11 * Subject to the GNU Public License, v.2
12 *
13 * Generic APIC sub-arch data struct.
14 *
15 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
16 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
17 * James Cleverdon.
18 */
19struct genapic {
20 char *name;
21
22 int (*probe)(void);
23 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
24 int (*apic_id_registered)(void);
25
26 u32 irq_delivery_mode;
27 u32 irq_dest_mode;
28
29 const struct cpumask *(*target_cpus)(void);
30
31 int disable_esr;
32
33 int dest_logical;
34 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
35 unsigned long (*check_apicid_present)(int apicid);
36
37 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
38 void (*init_apic_ldr)(void);
39
40 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
41
42 void (*setup_apic_routing)(void);
43 int (*multi_timer_check)(int apic, int irq);
44 int (*apicid_to_node)(int logical_apicid);
45 int (*cpu_to_logical_apicid)(int cpu);
46 int (*cpu_present_to_apicid)(int mps_cpu);
47 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
48 void (*setup_portio_remap)(void);
49 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
50 void (*enable_apic_mode)(void);
51 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
52
53 /*
54 * When one of the next two hooks returns 1 the genapic
55 * is switched to this. Essentially they are additional
56 * probe functions:
57 */
58 int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
59
60 unsigned int (*get_apic_id)(unsigned long x);
61 unsigned long (*set_apic_id)(unsigned int id);
62 unsigned long apic_id_mask;
63
64 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
65 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
66 const struct cpumask *andmask);
67
68 /* ipi */
69 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
70 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
71 int vector);
72 void (*send_IPI_allbutself)(int vector);
73 void (*send_IPI_all)(int vector);
74 void (*send_IPI_self)(int vector);
75
76 /* wakeup_secondary_cpu */
77 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
78
79 int trampoline_phys_low;
80 int trampoline_phys_high;
81
82 void (*wait_for_init_deassert)(atomic_t *deassert);
83 void (*smp_callin_clear_local_apic)(void);
84 void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
85 void (*inquire_remote_apic)(int apicid);
86};
87
88extern struct genapic *apic;
89
90/*
91 * Warm reset vector default position:
92 */
93#define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
94#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
95
96#ifdef CONFIG_X86_32
97extern void es7000_update_genapic_to_cluster(void);
98#else
99extern struct genapic apic_flat;
100extern struct genapic apic_physflat;
101extern struct genapic apic_x2apic_cluster;
102extern struct genapic apic_x2apic_phys;
103extern int default_acpi_madt_oem_check(char *, char *);
104
105extern void apic_send_IPI_self(int vector);
106
107extern struct genapic apic_x2apic_uv_x;
108DECLARE_PER_CPU(int, x2apic_extra_bits);
109
110extern void default_setup_apic_routing(void);
111
112extern int default_cpu_present_to_apicid(int mps_cpu);
113extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
114#endif
115
116static inline void default_wait_for_init_deassert(atomic_t *deassert)
117{
118 while (!atomic_read(deassert))
119 cpu_relax();
120 return;
121}
122
123extern void generic_bigsmp_probe(void);
124
125
126#ifdef CONFIG_X86_LOCAL_APIC
127
128#include <asm/smp.h>
129
130#define APIC_DFR_VALUE (APIC_DFR_FLAT)
131
132static inline const struct cpumask *default_target_cpus(void)
133{
134#ifdef CONFIG_SMP
135 return cpu_online_mask;
136#else
137 return cpumask_of(0);
138#endif
139}
140
141DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
142
143
144static inline unsigned int read_apic_id(void)
145{
146 unsigned int reg;
147
148 reg = apic_read(APIC_ID);
149
150 return apic->get_apic_id(reg);
151}
152
153#ifdef CONFIG_X86_64
154extern void default_setup_apic_routing(void);
155#else
156
157/*
158 * Set up the logical destination ID.
159 *
160 * Intel recommends to set DFR, LDR and TPR before enabling
161 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
162 * document number 292116). So here it goes...
163 */
164extern void default_init_apic_ldr(void);
165
166static inline int default_apic_id_registered(void)
167{
168 return physid_isset(read_apic_id(), phys_cpu_present_map);
169}
170
171static inline unsigned int
172default_cpu_mask_to_apicid(const struct cpumask *cpumask)
173{
174 return cpumask_bits(cpumask)[0];
175}
176
177static inline unsigned int
178default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
179 const struct cpumask *andmask)
180{
181 unsigned long mask1 = cpumask_bits(cpumask)[0];
182 unsigned long mask2 = cpumask_bits(andmask)[0];
183 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
184
185 return (unsigned int)(mask1 & mask2 & mask3);
186}
187
188static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
189{
190 return cpuid_apic >> index_msb;
191}
192
193static inline void default_setup_apic_routing(void)
194{
195#ifdef CONFIG_X86_IO_APIC
196 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
197 "Flat", nr_ioapics);
198#endif
199}
200
201extern int default_apicid_to_node(int logical_apicid);
202
203#endif
204
205static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
206{
207 return physid_isset(apicid, bitmap);
208}
209
210static inline unsigned long default_check_apicid_present(int bit)
211{
212 return physid_isset(bit, phys_cpu_present_map);
213}
214
215static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
216{
217 return phys_map;
218}
219
220/* Mapping from cpu number to logical apicid */
221static inline int default_cpu_to_logical_apicid(int cpu)
222{
223 return 1 << cpu;
224}
225
226static inline int __default_cpu_present_to_apicid(int mps_cpu)
227{
228 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
229 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
230 else
231 return BAD_APICID;
232}
233
234static inline int
235__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
236{
237 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
238}
239
240#ifdef CONFIG_X86_32
241static inline int default_cpu_present_to_apicid(int mps_cpu)
242{
243 return __default_cpu_present_to_apicid(mps_cpu);
244}
245
246static inline int
247default_check_phys_apicid_present(int boot_cpu_physical_apicid)
248{
249 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
250}
251#else
252extern int default_cpu_present_to_apicid(int mps_cpu);
253extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
254#endif
255
256static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
257{
258 return physid_mask_of_physid(phys_apicid);
259}
260
261#endif /* CONFIG_X86_LOCAL_APIC */
262
263#endif /* _ASM_X86_GENAPIC_64_H */
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index e5a2ab44cd5c..4f8e820cf38f 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -125,7 +125,7 @@ static inline void *phys_to_virt(phys_addr_t address)
125/* 125/*
126 * ISA I/O bus memory addresses are 1:1 with the physical address. 126 * ISA I/O bus memory addresses are 1:1 with the physical address.
127 */ 127 */
128#define isa_virt_to_bus virt_to_phys 128#define isa_virt_to_bus (unsigned long)virt_to_phys
129#define isa_page_to_bus page_to_phys 129#define isa_page_to_bus page_to_phys
130#define isa_bus_to_virt phys_to_virt 130#define isa_bus_to_virt phys_to_virt
131 131
diff --git a/arch/x86/include/asm/ipi.h b/arch/x86/include/asm/ipi.h
index 5f2efc5d9927..0b7228268a63 100644
--- a/arch/x86/include/asm/ipi.h
+++ b/arch/x86/include/asm/ipi.h
@@ -123,8 +123,6 @@ extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
123 int vector); 123 int vector);
124extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, 124extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
125 int vector); 125 int vector);
126#include <asm/genapic.h>
127
128extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, 126extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
129 int vector); 127 int vector);
130extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, 128extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index 5916c8df09d9..642fc7fc8cdc 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -167,6 +167,4 @@ extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
167 167
168extern int default_acpi_madt_oem_check(char *, char *); 168extern int default_acpi_madt_oem_check(char *, char *);
169 169
170extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
171
172#endif /* _ASM_X86_MPSPEC_H */ 170#endif /* _ASM_X86_MPSPEC_H */
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h
index 05f2da7f387a..89ed9d70b0aa 100644
--- a/arch/x86/include/asm/page.h
+++ b/arch/x86/include/asm/page.h
@@ -1,42 +1,11 @@
1#ifndef _ASM_X86_PAGE_H 1#ifndef _ASM_X86_PAGE_H
2#define _ASM_X86_PAGE_H 2#define _ASM_X86_PAGE_H
3 3
4#include <linux/const.h> 4#include <linux/types.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10 5
11#ifdef __KERNEL__ 6#ifdef __KERNEL__
12 7
13#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1) 8#include <asm/page_types.h>
14#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
15
16/* Cast PAGE_MASK to a signed type so that it is sign-extended if
17 virtual addresses are 32-bits but physical addresses are larger
18 (ie, 32-bit PAE). */
19#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
20
21/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
22#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
23
24/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
25#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
26
27#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
28#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
29
30#define HPAGE_SHIFT PMD_SHIFT
31#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
32#define HPAGE_MASK (~(HPAGE_SIZE - 1))
33#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
34
35#define HUGE_MAX_HSTATE 2
36
37#ifndef __ASSEMBLY__
38#include <linux/types.h>
39#endif
40 9
41#ifdef CONFIG_X86_64 10#ifdef CONFIG_X86_64
42#include <asm/page_64.h> 11#include <asm/page_64.h>
@@ -44,38 +13,18 @@
44#include <asm/page_32.h> 13#include <asm/page_32.h>
45#endif /* CONFIG_X86_64 */ 14#endif /* CONFIG_X86_64 */
46 15
47#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
48
49#define VM_DATA_DEFAULT_FLAGS \
50 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
51 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
52
53
54#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
55 17
56typedef struct { pgdval_t pgd; } pgd_t;
57typedef struct { pgprotval_t pgprot; } pgprot_t;
58
59extern int page_is_ram(unsigned long pagenr);
60extern int devmem_is_allowed(unsigned long pagenr);
61extern void map_devmem(unsigned long pfn, unsigned long size,
62 pgprot_t vma_prot);
63extern void unmap_devmem(unsigned long pfn, unsigned long size,
64 pgprot_t vma_prot);
65
66extern unsigned long max_low_pfn_mapped;
67extern unsigned long max_pfn_mapped;
68
69struct page; 18struct page;
70 19
71static inline void clear_user_page(void *page, unsigned long vaddr, 20static inline void clear_user_page(void *page, unsigned long vaddr,
72 struct page *pg) 21 struct page *pg)
73{ 22{
74 clear_page(page); 23 clear_page(page);
75} 24}
76 25
77static inline void copy_user_page(void *to, void *from, unsigned long vaddr, 26static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
78 struct page *topage) 27 struct page *topage)
79{ 28{
80 copy_page(to, from); 29 copy_page(to, from);
81} 30}
@@ -84,114 +33,6 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
84 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) 33 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
85#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE 34#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
86 35
87static inline pgd_t native_make_pgd(pgdval_t val)
88{
89 return (pgd_t) { val };
90}
91
92static inline pgdval_t native_pgd_val(pgd_t pgd)
93{
94 return pgd.pgd;
95}
96
97static inline pgdval_t pgd_flags(pgd_t pgd)
98{
99 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
100}
101
102#if PAGETABLE_LEVELS >= 3
103#if PAGETABLE_LEVELS == 4
104typedef struct { pudval_t pud; } pud_t;
105
106static inline pud_t native_make_pud(pmdval_t val)
107{
108 return (pud_t) { val };
109}
110
111static inline pudval_t native_pud_val(pud_t pud)
112{
113 return pud.pud;
114}
115#else /* PAGETABLE_LEVELS == 3 */
116#include <asm-generic/pgtable-nopud.h>
117
118static inline pudval_t native_pud_val(pud_t pud)
119{
120 return native_pgd_val(pud.pgd);
121}
122#endif /* PAGETABLE_LEVELS == 4 */
123
124static inline pudval_t pud_flags(pud_t pud)
125{
126 return native_pud_val(pud) & PTE_FLAGS_MASK;
127}
128
129typedef struct { pmdval_t pmd; } pmd_t;
130
131static inline pmd_t native_make_pmd(pmdval_t val)
132{
133 return (pmd_t) { val };
134}
135
136static inline pmdval_t native_pmd_val(pmd_t pmd)
137{
138 return pmd.pmd;
139}
140
141#else /* PAGETABLE_LEVELS == 2 */
142#include <asm-generic/pgtable-nopmd.h>
143
144static inline pmdval_t native_pmd_val(pmd_t pmd)
145{
146 return native_pgd_val(pmd.pud.pgd);
147}
148#endif /* PAGETABLE_LEVELS >= 3 */
149
150static inline pmdval_t pmd_flags(pmd_t pmd)
151{
152 return native_pmd_val(pmd) & PTE_FLAGS_MASK;
153}
154
155static inline pte_t native_make_pte(pteval_t val)
156{
157 return (pte_t) { .pte = val };
158}
159
160static inline pteval_t native_pte_val(pte_t pte)
161{
162 return pte.pte;
163}
164
165static inline pteval_t pte_flags(pte_t pte)
166{
167 return native_pte_val(pte) & PTE_FLAGS_MASK;
168}
169
170#define pgprot_val(x) ((x).pgprot)
171#define __pgprot(x) ((pgprot_t) { (x) } )
172
173#ifdef CONFIG_PARAVIRT
174#include <asm/paravirt.h>
175#else /* !CONFIG_PARAVIRT */
176
177#define pgd_val(x) native_pgd_val(x)
178#define __pgd(x) native_make_pgd(x)
179
180#ifndef __PAGETABLE_PUD_FOLDED
181#define pud_val(x) native_pud_val(x)
182#define __pud(x) native_make_pud(x)
183#endif
184
185#ifndef __PAGETABLE_PMD_FOLDED
186#define pmd_val(x) native_pmd_val(x)
187#define __pmd(x) native_make_pmd(x)
188#endif
189
190#define pte_val(x) native_pte_val(x)
191#define __pte(x) native_make_pte(x)
192
193#endif /* CONFIG_PARAVIRT */
194
195#define __pa(x) __phys_addr((unsigned long)(x)) 36#define __pa(x) __phys_addr((unsigned long)(x))
196#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x)) 37#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))
197/* __pa_symbol should be used for C visible symbols. 38/* __pa_symbol should be used for C visible symbols.
diff --git a/arch/x86/include/asm/page_32.h b/arch/x86/include/asm/page_32.h
index bcde0d7b4325..da4e762406f7 100644
--- a/arch/x86/include/asm/page_32.h
+++ b/arch/x86/include/asm/page_32.h
@@ -1,82 +1,14 @@
1#ifndef _ASM_X86_PAGE_32_H 1#ifndef _ASM_X86_PAGE_32_H
2#define _ASM_X86_PAGE_32_H 2#define _ASM_X86_PAGE_32_H
3 3
4/* 4#include <asm/page_32_types.h>
5 * This handles the memory map.
6 *
7 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
8 * a virtual address space of one gigabyte, which limits the
9 * amount of physical memory you can use to about 950MB.
10 *
11 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
12 * and CONFIG_HIGHMEM64G options in the kernel configuration.
13 */
14#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
15
16#ifdef CONFIG_4KSTACKS
17#define THREAD_ORDER 0
18#else
19#define THREAD_ORDER 1
20#endif
21#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
22
23#define STACKFAULT_STACK 0
24#define DOUBLEFAULT_STACK 1
25#define NMI_STACK 0
26#define DEBUG_STACK 0
27#define MCE_STACK 0
28#define N_EXCEPTION_STACKS 1
29
30#ifdef CONFIG_X86_PAE
31/* 44=32+12, the limit we can fit into an unsigned long pfn */
32#define __PHYSICAL_MASK_SHIFT 44
33#define __VIRTUAL_MASK_SHIFT 32
34#define PAGETABLE_LEVELS 3
35
36#ifndef __ASSEMBLY__
37typedef u64 pteval_t;
38typedef u64 pmdval_t;
39typedef u64 pudval_t;
40typedef u64 pgdval_t;
41typedef u64 pgprotval_t;
42
43typedef union {
44 struct {
45 unsigned long pte_low, pte_high;
46 };
47 pteval_t pte;
48} pte_t;
49#endif /* __ASSEMBLY__
50 */
51#else /* !CONFIG_X86_PAE */
52#define __PHYSICAL_MASK_SHIFT 32
53#define __VIRTUAL_MASK_SHIFT 32
54#define PAGETABLE_LEVELS 2
55
56#ifndef __ASSEMBLY__
57typedef unsigned long pteval_t;
58typedef unsigned long pmdval_t;
59typedef unsigned long pudval_t;
60typedef unsigned long pgdval_t;
61typedef unsigned long pgprotval_t;
62
63typedef union {
64 pteval_t pte;
65 pteval_t pte_low;
66} pte_t;
67
68#endif /* __ASSEMBLY__ */
69#endif /* CONFIG_X86_PAE */
70 5
71#ifndef __ASSEMBLY__ 6#ifndef __ASSEMBLY__
72typedef struct page *pgtable_t;
73#endif
74 7
75#ifdef CONFIG_HUGETLB_PAGE 8#ifdef CONFIG_HUGETLB_PAGE
76#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 9#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
77#endif 10#endif
78 11
79#ifndef __ASSEMBLY__
80#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET) 12#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET)
81#ifdef CONFIG_DEBUG_VIRTUAL 13#ifdef CONFIG_DEBUG_VIRTUAL
82extern unsigned long __phys_addr(unsigned long); 14extern unsigned long __phys_addr(unsigned long);
@@ -89,23 +21,6 @@ extern unsigned long __phys_addr(unsigned long);
89#define pfn_valid(pfn) ((pfn) < max_mapnr) 21#define pfn_valid(pfn) ((pfn) < max_mapnr)
90#endif /* CONFIG_FLATMEM */ 22#endif /* CONFIG_FLATMEM */
91 23
92extern int nx_enabled;
93
94/*
95 * This much address space is reserved for vmalloc() and iomap()
96 * as well as fixmap mappings.
97 */
98extern unsigned int __VMALLOC_RESERVE;
99extern int sysctl_legacy_va_layout;
100
101extern void find_low_pfn_range(void);
102extern unsigned long init_memory_mapping(unsigned long start,
103 unsigned long end);
104extern void initmem_init(unsigned long, unsigned long);
105extern void free_initmem(void);
106extern void setup_bootmem_allocator(void);
107
108
109#ifdef CONFIG_X86_USE_3DNOW 24#ifdef CONFIG_X86_USE_3DNOW
110#include <asm/mmx.h> 25#include <asm/mmx.h>
111 26
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h
new file mode 100644
index 000000000000..b5486aaf36ec
--- /dev/null
+++ b/arch/x86/include/asm/page_32_types.h
@@ -0,0 +1,62 @@
1#ifndef _ASM_X86_PAGE_32_DEFS_H
2#define _ASM_X86_PAGE_32_DEFS_H
3
4#include <linux/const.h>
5
6/*
7 * This handles the memory map.
8 *
9 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
10 * a virtual address space of one gigabyte, which limits the
11 * amount of physical memory you can use to about 950MB.
12 *
13 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
14 * and CONFIG_HIGHMEM64G options in the kernel configuration.
15 */
16#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
17
18#ifdef CONFIG_4KSTACKS
19#define THREAD_ORDER 0
20#else
21#define THREAD_ORDER 1
22#endif
23#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
24
25#define STACKFAULT_STACK 0
26#define DOUBLEFAULT_STACK 1
27#define NMI_STACK 0
28#define DEBUG_STACK 0
29#define MCE_STACK 0
30#define N_EXCEPTION_STACKS 1
31
32#ifdef CONFIG_X86_PAE
33/* 44=32+12, the limit we can fit into an unsigned long pfn */
34#define __PHYSICAL_MASK_SHIFT 44
35#define __VIRTUAL_MASK_SHIFT 32
36#define PAGETABLE_LEVELS 3
37
38#else /* !CONFIG_X86_PAE */
39#define __PHYSICAL_MASK_SHIFT 32
40#define __VIRTUAL_MASK_SHIFT 32
41#define PAGETABLE_LEVELS 2
42#endif /* CONFIG_X86_PAE */
43
44#ifndef __ASSEMBLY__
45
46/*
47 * This much address space is reserved for vmalloc() and iomap()
48 * as well as fixmap mappings.
49 */
50extern unsigned int __VMALLOC_RESERVE;
51extern int sysctl_legacy_va_layout;
52
53extern void find_low_pfn_range(void);
54extern unsigned long init_memory_mapping(unsigned long start,
55 unsigned long end);
56extern void initmem_init(unsigned long, unsigned long);
57extern void free_initmem(void);
58extern void setup_bootmem_allocator(void);
59
60#endif /* !__ASSEMBLY__ */
61
62#endif /* _ASM_X86_PAGE_32_DEFS_H */
diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h
index e27fdbe5f9e4..072694ed81a5 100644
--- a/arch/x86/include/asm/page_64.h
+++ b/arch/x86/include/asm/page_64.h
@@ -1,105 +1,6 @@
1#ifndef _ASM_X86_PAGE_64_H 1#ifndef _ASM_X86_PAGE_64_H
2#define _ASM_X86_PAGE_64_H 2#define _ASM_X86_PAGE_64_H
3 3
4#define PAGETABLE_LEVELS 4 4#include <asm/page_64_types.h>
5
6#define THREAD_ORDER 1
7#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
8#define CURRENT_MASK (~(THREAD_SIZE - 1))
9
10#define EXCEPTION_STACK_ORDER 0
11#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
12
13#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
14#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
15
16#define IRQ_STACK_ORDER 2
17#define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
18
19#define STACKFAULT_STACK 1
20#define DOUBLEFAULT_STACK 2
21#define NMI_STACK 3
22#define DEBUG_STACK 4
23#define MCE_STACK 5
24#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
25
26#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
27#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
28
29/*
30 * Set __PAGE_OFFSET to the most negative possible address +
31 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
32 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
33 * what Xen requires.
34 */
35#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
36
37#define __PHYSICAL_START CONFIG_PHYSICAL_START
38#define __KERNEL_ALIGN 0x200000
39
40/*
41 * Make sure kernel is aligned to 2MB address. Catching it at compile
42 * time is better. Change your config file and compile the kernel
43 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
44 */
45#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
46#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
47#endif
48
49#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
50#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
51
52/* See Documentation/x86_64/mm.txt for a description of the memory map. */
53#define __PHYSICAL_MASK_SHIFT 46
54#define __VIRTUAL_MASK_SHIFT 48
55
56/*
57 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
58 * arch/x86/kernel/head_64.S), and it is mapped here:
59 */
60#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
61#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
62
63#ifndef __ASSEMBLY__
64void clear_page(void *page);
65void copy_page(void *to, void *from);
66
67/* duplicated to the one in bootmem.h */
68extern unsigned long max_pfn;
69extern unsigned long phys_base;
70
71extern unsigned long __phys_addr(unsigned long);
72#define __phys_reloc_hide(x) (x)
73
74/*
75 * These are used to make use of C type-checking..
76 */
77typedef unsigned long pteval_t;
78typedef unsigned long pmdval_t;
79typedef unsigned long pudval_t;
80typedef unsigned long pgdval_t;
81typedef unsigned long pgprotval_t;
82
83typedef struct page *pgtable_t;
84
85typedef struct { pteval_t pte; } pte_t;
86
87#define vmemmap ((struct page *)VMEMMAP_START)
88
89extern unsigned long init_memory_mapping(unsigned long start,
90 unsigned long end);
91
92extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
93extern void free_initmem(void);
94
95extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
96extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
97
98#endif /* !__ASSEMBLY__ */
99
100#ifdef CONFIG_FLATMEM
101#define pfn_valid(pfn) ((pfn) < max_pfn)
102#endif
103
104 5
105#endif /* _ASM_X86_PAGE_64_H */ 6#endif /* _ASM_X86_PAGE_64_H */
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
new file mode 100644
index 000000000000..bc73af3eda9c
--- /dev/null
+++ b/arch/x86/include/asm/page_64_types.h
@@ -0,0 +1,91 @@
1#ifndef _ASM_X86_PAGE_64_DEFS_H
2#define _ASM_X86_PAGE_64_DEFS_H
3
4#define PAGETABLE_LEVELS 4
5
6#define THREAD_ORDER 1
7#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
8#define CURRENT_MASK (~(THREAD_SIZE - 1))
9
10#define EXCEPTION_STACK_ORDER 0
11#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
12
13#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
14#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
15
16#define IRQ_STACK_ORDER 2
17#define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
18
19#define STACKFAULT_STACK 1
20#define DOUBLEFAULT_STACK 2
21#define NMI_STACK 3
22#define DEBUG_STACK 4
23#define MCE_STACK 5
24#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
25
26#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
27#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
28
29/*
30 * Set __PAGE_OFFSET to the most negative possible address +
31 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
32 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
33 * what Xen requires.
34 */
35#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
36
37#define __PHYSICAL_START CONFIG_PHYSICAL_START
38#define __KERNEL_ALIGN 0x200000
39
40/*
41 * Make sure kernel is aligned to 2MB address. Catching it at compile
42 * time is better. Change your config file and compile the kernel
43 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
44 */
45#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
46#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
47#endif
48
49#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
50#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
51
52/* See Documentation/x86_64/mm.txt for a description of the memory map. */
53#define __PHYSICAL_MASK_SHIFT 46
54#define __VIRTUAL_MASK_SHIFT 48
55
56/*
57 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
58 * arch/x86/kernel/head_64.S), and it is mapped here:
59 */
60#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
61#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
62
63#ifndef __ASSEMBLY__
64void clear_page(void *page);
65void copy_page(void *to, void *from);
66
67/* duplicated to the one in bootmem.h */
68extern unsigned long max_pfn;
69extern unsigned long phys_base;
70
71extern unsigned long __phys_addr(unsigned long);
72#define __phys_reloc_hide(x) (x)
73
74#define vmemmap ((struct page *)VMEMMAP_START)
75
76extern unsigned long init_memory_mapping(unsigned long start,
77 unsigned long end);
78
79extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
80extern void free_initmem(void);
81
82extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
83extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
84
85#endif /* !__ASSEMBLY__ */
86
87#ifdef CONFIG_FLATMEM
88#define pfn_valid(pfn) ((pfn) < max_pfn)
89#endif
90
91#endif /* _ASM_X86_PAGE_64_DEFS_H */
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h
new file mode 100644
index 000000000000..2c52ff767584
--- /dev/null
+++ b/arch/x86/include/asm/page_types.h
@@ -0,0 +1,63 @@
1#ifndef _ASM_X86_PAGE_DEFS_H
2#define _ASM_X86_PAGE_DEFS_H
3
4#include <linux/const.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10
11#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
12#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
13
14/* Cast PAGE_MASK to a signed type so that it is sign-extended if
15 virtual addresses are 32-bits but physical addresses are larger
16 (ie, 32-bit PAE). */
17#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
18
19/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
20#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
21
22/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
23#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
24
25#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
26#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
27
28#define HPAGE_SHIFT PMD_SHIFT
29#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
30#define HPAGE_MASK (~(HPAGE_SIZE - 1))
31#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
32
33#define HUGE_MAX_HSTATE 2
34
35#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
36
37#define VM_DATA_DEFAULT_FLAGS \
38 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
39 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
40
41#ifdef CONFIG_X86_64
42#include <asm/page_64_types.h>
43#else
44#include <asm/page_32_types.h>
45#endif /* CONFIG_X86_64 */
46
47#ifndef __ASSEMBLY__
48
49struct pgprot;
50
51extern int page_is_ram(unsigned long pagenr);
52extern int devmem_is_allowed(unsigned long pagenr);
53extern void map_devmem(unsigned long pfn, unsigned long size,
54 struct pgprot vma_prot);
55extern void unmap_devmem(unsigned long pfn, unsigned long size,
56 struct pgprot vma_prot);
57
58extern unsigned long max_low_pfn_mapped;
59extern unsigned long max_pfn_mapped;
60
61#endif /* !__ASSEMBLY__ */
62
63#endif /* _ASM_X86_PAGE_DEFS_H */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index b788dfd20483..0617d5cc9712 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -4,7 +4,7 @@
4 * para-virtualization: those hooks are defined here. */ 4 * para-virtualization: those hooks are defined here. */
5 5
6#ifdef CONFIG_PARAVIRT 6#ifdef CONFIG_PARAVIRT
7#include <asm/page.h> 7#include <asm/pgtable_types.h>
8#include <asm/asm.h> 8#include <asm/asm.h>
9 9
10/* Bitmask of what can be clobbered: usually at least eax. */ 10/* Bitmask of what can be clobbered: usually at least eax. */
diff --git a/arch/x86/include/asm/pgtable-2level-defs.h b/arch/x86/include/asm/pgtable-2level_types.h
index d77db8990eaa..09ae67efcebd 100644
--- a/arch/x86/include/asm/pgtable-2level-defs.h
+++ b/arch/x86/include/asm/pgtable-2level_types.h
@@ -1,6 +1,21 @@
1#ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H 1#ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H
2#define _ASM_X86_PGTABLE_2LEVEL_DEFS_H 2#define _ASM_X86_PGTABLE_2LEVEL_DEFS_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7typedef unsigned long pteval_t;
8typedef unsigned long pmdval_t;
9typedef unsigned long pudval_t;
10typedef unsigned long pgdval_t;
11typedef unsigned long pgprotval_t;
12
13typedef union {
14 pteval_t pte;
15 pteval_t pte_low;
16} pte_t;
17#endif /* !__ASSEMBLY__ */
18
4#define SHARED_KERNEL_PMD 0 19#define SHARED_KERNEL_PMD 0
5 20
6/* 21/*
diff --git a/arch/x86/include/asm/pgtable-3level-defs.h b/arch/x86/include/asm/pgtable-3level_types.h
index 62561367653c..bcc89625ebe5 100644
--- a/arch/x86/include/asm/pgtable-3level-defs.h
+++ b/arch/x86/include/asm/pgtable-3level_types.h
@@ -1,6 +1,23 @@
1#ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H 1#ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H
2#define _ASM_X86_PGTABLE_3LEVEL_DEFS_H 2#define _ASM_X86_PGTABLE_3LEVEL_DEFS_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7typedef u64 pteval_t;
8typedef u64 pmdval_t;
9typedef u64 pudval_t;
10typedef u64 pgdval_t;
11typedef u64 pgprotval_t;
12
13typedef union {
14 struct {
15 unsigned long pte_low, pte_high;
16 };
17 pteval_t pte;
18} pte_t;
19#endif /* !__ASSEMBLY__ */
20
4#ifdef CONFIG_PARAVIRT 21#ifdef CONFIG_PARAVIRT
5#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd) 22#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd)
6#else 23#else
@@ -25,4 +42,5 @@
25 */ 42 */
26#define PTRS_PER_PTE 512 43#define PTRS_PER_PTE 512
27 44
45
28#endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */ 46#endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 8fef0f6bfbb6..1c097a3a6669 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -3,164 +3,7 @@
3 3
4#include <asm/page.h> 4#include <asm/page.h>
5 5
6#define FIRST_USER_ADDRESS 0 6#include <asm/pgtable_types.h>
7
8#define _PAGE_BIT_PRESENT 0 /* is present */
9#define _PAGE_BIT_RW 1 /* writeable */
10#define _PAGE_BIT_USER 2 /* userspace addressable */
11#define _PAGE_BIT_PWT 3 /* page write through */
12#define _PAGE_BIT_PCD 4 /* page cache disabled */
13#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
14#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
15#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
16#define _PAGE_BIT_PAT 7 /* on 4KB pages */
17#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
18#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
19#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
20#define _PAGE_BIT_UNUSED3 11
21#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
22#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
23#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
24#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
25
26/* If _PAGE_BIT_PRESENT is clear, we use these: */
27/* - if the user mapped it with PROT_NONE; pte_present gives true */
28#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
29/* - set: nonlinear file mapping, saved PTE; unset:swap */
30#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
31
32#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
33#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
34#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
35#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
36#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
37#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
38#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
39#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
40#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
41#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
42#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
43#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
44#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
45#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
46#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
47#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
48#define __HAVE_ARCH_PTE_SPECIAL
49
50#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
51#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
52#else
53#define _PAGE_NX (_AT(pteval_t, 0))
54#endif
55
56#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
57#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
58
59#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
60 _PAGE_ACCESSED | _PAGE_DIRTY)
61#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
62 _PAGE_DIRTY)
63
64/* Set of bits not changed in pte_modify */
65#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
66 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
67
68#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
69#define _PAGE_CACHE_WB (0)
70#define _PAGE_CACHE_WC (_PAGE_PWT)
71#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
72#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
73
74#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
75#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
76 _PAGE_ACCESSED | _PAGE_NX)
77
78#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
79 _PAGE_USER | _PAGE_ACCESSED)
80#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
81 _PAGE_ACCESSED | _PAGE_NX)
82#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
83 _PAGE_ACCESSED)
84#define PAGE_COPY PAGE_COPY_NOEXEC
85#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
86 _PAGE_ACCESSED | _PAGE_NX)
87#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
88 _PAGE_ACCESSED)
89
90#define __PAGE_KERNEL_EXEC \
91 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
92#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
93
94#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
95#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
96#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
97#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
98#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
99#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
100#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
101#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
102#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
103#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
104#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
105
106#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
107#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
108#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
109#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
110
111#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
112#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
113#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
114#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
115#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
116#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
117#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
118#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
119#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
120#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
121#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
122#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
123#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
124
125#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
126#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
127#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
128#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
129
130/* xwr */
131#define __P000 PAGE_NONE
132#define __P001 PAGE_READONLY
133#define __P010 PAGE_COPY
134#define __P011 PAGE_COPY
135#define __P100 PAGE_READONLY_EXEC
136#define __P101 PAGE_READONLY_EXEC
137#define __P110 PAGE_COPY_EXEC
138#define __P111 PAGE_COPY_EXEC
139
140#define __S000 PAGE_NONE
141#define __S001 PAGE_READONLY
142#define __S010 PAGE_SHARED
143#define __S011 PAGE_SHARED
144#define __S100 PAGE_READONLY_EXEC
145#define __S101 PAGE_READONLY_EXEC
146#define __S110 PAGE_SHARED_EXEC
147#define __S111 PAGE_SHARED_EXEC
148
149/*
150 * early identity mapping pte attrib macros.
151 */
152#ifdef CONFIG_X86_64
153#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
154#else
155/*
156 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
157 * bits are combined, this will alow user to access the high address mapped
158 * VDSO in the presence of CONFIG_COMPAT_VDSO
159 */
160#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
161#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
162#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
163#endif
164 7
165/* 8/*
166 * Macro to mark a page protection value as UC- 9 * Macro to mark a page protection value as UC-
@@ -172,9 +15,6 @@
172 15
173#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
174 17
175#define pgprot_writecombine pgprot_writecombine
176extern pgprot_t pgprot_writecombine(pgprot_t prot);
177
178/* 18/*
179 * ZERO_PAGE is a global shared page that is always zero: used 19 * ZERO_PAGE is a global shared page that is always zero: used
180 * for zero-mapped memory areas etc.. 20 * for zero-mapped memory areas etc..
@@ -185,6 +25,66 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
185extern spinlock_t pgd_lock; 25extern spinlock_t pgd_lock;
186extern struct list_head pgd_list; 26extern struct list_head pgd_list;
187 27
28#ifdef CONFIG_PARAVIRT
29#include <asm/paravirt.h>
30#else /* !CONFIG_PARAVIRT */
31#define set_pte(ptep, pte) native_set_pte(ptep, pte)
32#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
33
34#define set_pte_present(mm, addr, ptep, pte) \
35 native_set_pte_present(mm, addr, ptep, pte)
36#define set_pte_atomic(ptep, pte) \
37 native_set_pte_atomic(ptep, pte)
38
39#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
40
41#ifndef __PAGETABLE_PUD_FOLDED
42#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
43#define pgd_clear(pgd) native_pgd_clear(pgd)
44#endif
45
46#ifndef set_pud
47# define set_pud(pudp, pud) native_set_pud(pudp, pud)
48#endif
49
50#ifndef __PAGETABLE_PMD_FOLDED
51#define pud_clear(pud) native_pud_clear(pud)
52#endif
53
54#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
55#define pmd_clear(pmd) native_pmd_clear(pmd)
56
57#define pte_update(mm, addr, ptep) do { } while (0)
58#define pte_update_defer(mm, addr, ptep) do { } while (0)
59
60static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
61{
62 native_pagetable_setup_start(base);
63}
64
65static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
66{
67 native_pagetable_setup_done(base);
68}
69
70#define pgd_val(x) native_pgd_val(x)
71#define __pgd(x) native_make_pgd(x)
72
73#ifndef __PAGETABLE_PUD_FOLDED
74#define pud_val(x) native_pud_val(x)
75#define __pud(x) native_make_pud(x)
76#endif
77
78#ifndef __PAGETABLE_PMD_FOLDED
79#define pmd_val(x) native_pmd_val(x)
80#define __pmd(x) native_make_pmd(x)
81#endif
82
83#define pte_val(x) native_pte_val(x)
84#define __pte(x) native_make_pte(x)
85
86#endif /* CONFIG_PARAVIRT */
87
188/* 88/*
189 * The following only work if pte_present() is true. 89 * The following only work if pte_present() is true.
190 * Undefined behaviour if not.. 90 * Undefined behaviour if not..
@@ -316,8 +216,6 @@ static inline pte_t pte_mkspecial(pte_t pte)
316 return pte_set_flags(pte, _PAGE_SPECIAL); 216 return pte_set_flags(pte, _PAGE_SPECIAL);
317} 217}
318 218
319extern pteval_t __supported_pte_mask;
320
321/* 219/*
322 * Mask out unsupported bits in a present pgprot. Non-present pgprots 220 * Mask out unsupported bits in a present pgprot. Non-present pgprots
323 * can use those bits for other purposes, so leave them be. 221 * can use those bits for other purposes, so leave them be.
@@ -390,75 +288,6 @@ static inline int is_new_memtype_allowed(unsigned long flags,
390 return 1; 288 return 1;
391} 289}
392 290
393#ifndef __ASSEMBLY__
394/* Indicate that x86 has its own track and untrack pfn vma functions */
395#define __HAVE_PFNMAP_TRACKING
396
397#define __HAVE_PHYS_MEM_ACCESS_PROT
398struct file;
399pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
400 unsigned long size, pgprot_t vma_prot);
401int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
402 unsigned long size, pgprot_t *vma_prot);
403#endif
404
405/* Install a pte for a particular vaddr in kernel space. */
406void set_pte_vaddr(unsigned long vaddr, pte_t pte);
407
408#ifdef CONFIG_X86_32
409extern void native_pagetable_setup_start(pgd_t *base);
410extern void native_pagetable_setup_done(pgd_t *base);
411#else
412static inline void native_pagetable_setup_start(pgd_t *base) {}
413static inline void native_pagetable_setup_done(pgd_t *base) {}
414#endif
415
416struct seq_file;
417extern void arch_report_meminfo(struct seq_file *m);
418
419#ifdef CONFIG_PARAVIRT
420#include <asm/paravirt.h>
421#else /* !CONFIG_PARAVIRT */
422#define set_pte(ptep, pte) native_set_pte(ptep, pte)
423#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
424
425#define set_pte_present(mm, addr, ptep, pte) \
426 native_set_pte_present(mm, addr, ptep, pte)
427#define set_pte_atomic(ptep, pte) \
428 native_set_pte_atomic(ptep, pte)
429
430#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
431
432#ifndef __PAGETABLE_PUD_FOLDED
433#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
434#define pgd_clear(pgd) native_pgd_clear(pgd)
435#endif
436
437#ifndef set_pud
438# define set_pud(pudp, pud) native_set_pud(pudp, pud)
439#endif
440
441#ifndef __PAGETABLE_PMD_FOLDED
442#define pud_clear(pud) native_pud_clear(pud)
443#endif
444
445#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
446#define pmd_clear(pmd) native_pmd_clear(pmd)
447
448#define pte_update(mm, addr, ptep) do { } while (0)
449#define pte_update_defer(mm, addr, ptep) do { } while (0)
450
451static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
452{
453 native_pagetable_setup_start(base);
454}
455
456static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
457{
458 native_pagetable_setup_done(base);
459}
460#endif /* CONFIG_PARAVIRT */
461
462#endif /* __ASSEMBLY__ */ 291#endif /* __ASSEMBLY__ */
463 292
464#ifdef CONFIG_X86_32 293#ifdef CONFIG_X86_32
@@ -558,13 +387,6 @@ static inline unsigned long pages_to_mb(unsigned long npg)
558#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 387#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
559 remap_pfn_range(vma, vaddr, pfn, size, prot) 388 remap_pfn_range(vma, vaddr, pfn, size, prot)
560 389
561#if PAGETABLE_LEVELS == 2
562static inline int pud_large(pud_t pud)
563{
564 return 0;
565}
566#endif
567
568#if PAGETABLE_LEVELS > 2 390#if PAGETABLE_LEVELS > 2
569static inline int pud_none(pud_t pud) 391static inline int pud_none(pud_t pud)
570{ 392{
@@ -600,7 +422,7 @@ static inline unsigned long pmd_pfn(pmd_t pmd)
600 422
601static inline int pud_large(pud_t pud) 423static inline int pud_large(pud_t pud)
602{ 424{
603 return (pud_flags(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 425 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
604 (_PAGE_PSE | _PAGE_PRESENT); 426 (_PAGE_PSE | _PAGE_PRESENT);
605} 427}
606 428
@@ -608,6 +430,11 @@ static inline int pud_bad(pud_t pud)
608{ 430{
609 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 431 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
610} 432}
433#else
434static inline int pud_large(pud_t pud)
435{
436 return 0;
437}
611#endif /* PAGETABLE_LEVELS > 2 */ 438#endif /* PAGETABLE_LEVELS > 2 */
612 439
613#if PAGETABLE_LEVELS > 3 440#if PAGETABLE_LEVELS > 3
@@ -676,28 +503,6 @@ static inline int pgd_none(pgd_t pgd)
676 503
677#ifndef __ASSEMBLY__ 504#ifndef __ASSEMBLY__
678 505
679enum {
680 PG_LEVEL_NONE,
681 PG_LEVEL_4K,
682 PG_LEVEL_2M,
683 PG_LEVEL_1G,
684 PG_LEVEL_NUM
685};
686
687#ifdef CONFIG_PROC_FS
688extern void update_page_count(int level, unsigned long pages);
689#else
690static inline void update_page_count(int level, unsigned long pages) { }
691#endif
692
693/*
694 * Helper function that returns the kernel pagetable entry controlling
695 * the virtual address 'address'. NULL means no pagetable entry present.
696 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
697 * as a pte too.
698 */
699extern pte_t *lookup_address(unsigned long address, unsigned int *level);
700
701/* local pte updates need not use xchg for locking */ 506/* local pte updates need not use xchg for locking */
702static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 507static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
703{ 508{
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 1952bb762aac..97612fc7632f 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_X86_PGTABLE_32_H 1#ifndef _ASM_X86_PGTABLE_32_H
2#define _ASM_X86_PGTABLE_32_H 2#define _ASM_X86_PGTABLE_32_H
3 3
4#include <asm/pgtable_32_types.h>
4 5
5/* 6/*
6 * The Linux memory management assumes a three-level page table setup. On 7 * The Linux memory management assumes a three-level page table setup. On
@@ -33,47 +34,6 @@ void paging_init(void);
33 34
34extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); 35extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
35 36
36/*
37 * The Linux x86 paging architecture is 'compile-time dual-mode', it
38 * implements both the traditional 2-level x86 page tables and the
39 * newer 3-level PAE-mode page tables.
40 */
41#ifdef CONFIG_X86_PAE
42# include <asm/pgtable-3level-defs.h>
43# define PMD_SIZE (1UL << PMD_SHIFT)
44# define PMD_MASK (~(PMD_SIZE - 1))
45#else
46# include <asm/pgtable-2level-defs.h>
47#endif
48
49#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
50#define PGDIR_MASK (~(PGDIR_SIZE - 1))
51
52/* Just any arbitrary offset to the start of the vmalloc VM area: the
53 * current 8MB value just means that there will be a 8MB "hole" after the
54 * physical memory until the kernel virtual memory starts. That means that
55 * any out-of-bounds memory accesses will hopefully be caught.
56 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
57 * area for the same reason. ;)
58 */
59#define VMALLOC_OFFSET (8 * 1024 * 1024)
60#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
61#ifdef CONFIG_X86_PAE
62#define LAST_PKMAP 512
63#else
64#define LAST_PKMAP 1024
65#endif
66
67#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
68 & PMD_MASK)
69
70#ifdef CONFIG_HIGHMEM
71# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
72#else
73# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
74#endif
75
76#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
77 37
78/* 38/*
79 * Define this if things work differently on an i386 and an i486: 39 * Define this if things work differently on an i386 and an i486:
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h
new file mode 100644
index 000000000000..bd8df3b2fe04
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_32_types.h
@@ -0,0 +1,46 @@
1#ifndef _ASM_X86_PGTABLE_32_DEFS_H
2#define _ASM_X86_PGTABLE_32_DEFS_H
3
4/*
5 * The Linux x86 paging architecture is 'compile-time dual-mode', it
6 * implements both the traditional 2-level x86 page tables and the
7 * newer 3-level PAE-mode page tables.
8 */
9#ifdef CONFIG_X86_PAE
10# include <asm/pgtable-3level_types.h>
11# define PMD_SIZE (1UL << PMD_SHIFT)
12# define PMD_MASK (~(PMD_SIZE - 1))
13#else
14# include <asm/pgtable-2level_types.h>
15#endif
16
17#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
18#define PGDIR_MASK (~(PGDIR_SIZE - 1))
19
20/* Just any arbitrary offset to the start of the vmalloc VM area: the
21 * current 8MB value just means that there will be a 8MB "hole" after the
22 * physical memory until the kernel virtual memory starts. That means that
23 * any out-of-bounds memory accesses will hopefully be caught.
24 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
25 * area for the same reason. ;)
26 */
27#define VMALLOC_OFFSET (8 * 1024 * 1024)
28#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
29#ifdef CONFIG_X86_PAE
30#define LAST_PKMAP 512
31#else
32#define LAST_PKMAP 1024
33#endif
34
35#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
36 & PMD_MASK)
37
38#ifdef CONFIG_HIGHMEM
39# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
40#else
41# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
42#endif
43
44#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
45
46#endif /* _ASM_X86_PGTABLE_32_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 1c4e247c51fd..6b87bc6d5018 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -2,6 +2,8 @@
2#define _ASM_X86_PGTABLE_64_H 2#define _ASM_X86_PGTABLE_64_H
3 3
4#include <linux/const.h> 4#include <linux/const.h>
5#include <asm/pgtable_64_types.h>
6
5#ifndef __ASSEMBLY__ 7#ifndef __ASSEMBLY__
6 8
7/* 9/*
@@ -25,32 +27,6 @@ extern void paging_init(void);
25 27
26#endif /* !__ASSEMBLY__ */ 28#endif /* !__ASSEMBLY__ */
27 29
28#define SHARED_KERNEL_PMD 0
29
30/*
31 * PGDIR_SHIFT determines what a top-level page table entry can map
32 */
33#define PGDIR_SHIFT 39
34#define PTRS_PER_PGD 512
35
36/*
37 * 3rd level page
38 */
39#define PUD_SHIFT 30
40#define PTRS_PER_PUD 512
41
42/*
43 * PMD_SHIFT determines the size of the area a middle-level
44 * page table can map
45 */
46#define PMD_SHIFT 21
47#define PTRS_PER_PMD 512
48
49/*
50 * entries per page directory level
51 */
52#define PTRS_PER_PTE 512
53
54#ifndef __ASSEMBLY__ 30#ifndef __ASSEMBLY__
55 31
56#define pte_ERROR(e) \ 32#define pte_ERROR(e) \
@@ -130,26 +106,6 @@ static inline void native_pgd_clear(pgd_t *pgd)
130 native_set_pgd(pgd, native_make_pgd(0)); 106 native_set_pgd(pgd, native_make_pgd(0));
131} 107}
132 108
133#endif /* !__ASSEMBLY__ */
134
135#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
136#define PMD_MASK (~(PMD_SIZE - 1))
137#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
138#define PUD_MASK (~(PUD_SIZE - 1))
139#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
140#define PGDIR_MASK (~(PGDIR_SIZE - 1))
141
142
143#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
144#define VMALLOC_START _AC(0xffffc20000000000, UL)
145#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
146#define VMEMMAP_START _AC(0xffffe20000000000, UL)
147#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
148#define MODULES_END _AC(0xffffffffff000000, UL)
149#define MODULES_LEN (MODULES_END - MODULES_VADDR)
150
151#ifndef __ASSEMBLY__
152
153/* 109/*
154 * Conversion functions: convert a page and protection to a page entry, 110 * Conversion functions: convert a page and protection to a page entry,
155 * and a page entry and page directory to the page they refer to. 111 * and a page entry and page directory to the page they refer to.
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
new file mode 100644
index 000000000000..2f59135c6f2a
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -0,0 +1,62 @@
1#ifndef _ASM_X86_PGTABLE_64_DEFS_H
2#define _ASM_X86_PGTABLE_64_DEFS_H
3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7/*
8 * These are used to make use of C type-checking..
9 */
10typedef unsigned long pteval_t;
11typedef unsigned long pmdval_t;
12typedef unsigned long pudval_t;
13typedef unsigned long pgdval_t;
14typedef unsigned long pgprotval_t;
15
16typedef struct { pteval_t pte; } pte_t;
17
18#endif /* !__ASSEMBLY__ */
19
20#define SHARED_KERNEL_PMD 0
21
22/*
23 * PGDIR_SHIFT determines what a top-level page table entry can map
24 */
25#define PGDIR_SHIFT 39
26#define PTRS_PER_PGD 512
27
28/*
29 * 3rd level page
30 */
31#define PUD_SHIFT 30
32#define PTRS_PER_PUD 512
33
34/*
35 * PMD_SHIFT determines the size of the area a middle-level
36 * page table can map
37 */
38#define PMD_SHIFT 21
39#define PTRS_PER_PMD 512
40
41/*
42 * entries per page directory level
43 */
44#define PTRS_PER_PTE 512
45
46#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
47#define PMD_MASK (~(PMD_SIZE - 1))
48#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
49#define PUD_MASK (~(PUD_SIZE - 1))
50#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
51#define PGDIR_MASK (~(PGDIR_SIZE - 1))
52
53
54#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
55#define VMALLOC_START _AC(0xffffc20000000000, UL)
56#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
57#define VMEMMAP_START _AC(0xffffe20000000000, UL)
58#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
59#define MODULES_END _AC(0xffffffffff000000, UL)
60#define MODULES_LEN (MODULES_END - MODULES_VADDR)
61
62#endif /* _ASM_X86_PGTABLE_64_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
new file mode 100644
index 000000000000..9dafe87be2de
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -0,0 +1,322 @@
1#ifndef _ASM_X86_PGTABLE_DEFS_H
2#define _ASM_X86_PGTABLE_DEFS_H
3
4#include <linux/const.h>
5#include <asm/page_types.h>
6
7#define FIRST_USER_ADDRESS 0
8
9#define _PAGE_BIT_PRESENT 0 /* is present */
10#define _PAGE_BIT_RW 1 /* writeable */
11#define _PAGE_BIT_USER 2 /* userspace addressable */
12#define _PAGE_BIT_PWT 3 /* page write through */
13#define _PAGE_BIT_PCD 4 /* page cache disabled */
14#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17#define _PAGE_BIT_PAT 7 /* on 4KB pages */
18#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
20#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
21#define _PAGE_BIT_UNUSED3 11
22#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
24#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
25#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
26
27/* If _PAGE_BIT_PRESENT is clear, we use these: */
28/* - if the user mapped it with PROT_NONE; pte_present gives true */
29#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
30/* - set: nonlinear file mapping, saved PTE; unset:swap */
31#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
32
33#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
34#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
35#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
36#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
37#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
38#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
39#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
40#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
41#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
42#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
43#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
44#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
45#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
46#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
47#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
48#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
49#define __HAVE_ARCH_PTE_SPECIAL
50
51#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
52#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
53#else
54#define _PAGE_NX (_AT(pteval_t, 0))
55#endif
56
57#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
58#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
59
60#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
61 _PAGE_ACCESSED | _PAGE_DIRTY)
62#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
63 _PAGE_DIRTY)
64
65/* Set of bits not changed in pte_modify */
66#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
67 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
68
69#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
70#define _PAGE_CACHE_WB (0)
71#define _PAGE_CACHE_WC (_PAGE_PWT)
72#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
73#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
74
75#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
76#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78
79#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
80 _PAGE_USER | _PAGE_ACCESSED)
81#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
82 _PAGE_ACCESSED | _PAGE_NX)
83#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED)
85#define PAGE_COPY PAGE_COPY_NOEXEC
86#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
87 _PAGE_ACCESSED | _PAGE_NX)
88#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
89 _PAGE_ACCESSED)
90
91#define __PAGE_KERNEL_EXEC \
92 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
93#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
94
95#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
96#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
97#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
98#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
99#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
100#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
101#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
102#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
103#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
104#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
105#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
106
107#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
108#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
109#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
110#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
111
112#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
113#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
114#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
115#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
116#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
117#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
118#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
119#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
120#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
121#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
122#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
123#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
124#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
125
126#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
127#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
128#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
129#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
130
131/* xwr */
132#define __P000 PAGE_NONE
133#define __P001 PAGE_READONLY
134#define __P010 PAGE_COPY
135#define __P011 PAGE_COPY
136#define __P100 PAGE_READONLY_EXEC
137#define __P101 PAGE_READONLY_EXEC
138#define __P110 PAGE_COPY_EXEC
139#define __P111 PAGE_COPY_EXEC
140
141#define __S000 PAGE_NONE
142#define __S001 PAGE_READONLY
143#define __S010 PAGE_SHARED
144#define __S011 PAGE_SHARED
145#define __S100 PAGE_READONLY_EXEC
146#define __S101 PAGE_READONLY_EXEC
147#define __S110 PAGE_SHARED_EXEC
148#define __S111 PAGE_SHARED_EXEC
149
150/*
151 * early identity mapping pte attrib macros.
152 */
153#ifdef CONFIG_X86_64
154#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
155#else
156/*
157 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
158 * bits are combined, this will alow user to access the high address mapped
159 * VDSO in the presence of CONFIG_COMPAT_VDSO
160 */
161#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
162#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
163#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
164#endif
165
166#ifdef CONFIG_X86_32
167# include "pgtable_32_types.h"
168#else
169# include "pgtable_64_types.h"
170#endif
171
172#ifndef __ASSEMBLY__
173
174#include <linux/types.h>
175
176typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
177
178typedef struct { pgdval_t pgd; } pgd_t;
179
180static inline pgd_t native_make_pgd(pgdval_t val)
181{
182 return (pgd_t) { val };
183}
184
185static inline pgdval_t native_pgd_val(pgd_t pgd)
186{
187 return pgd.pgd;
188}
189
190static inline pgdval_t pgd_flags(pgd_t pgd)
191{
192 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
193}
194
195#if PAGETABLE_LEVELS > 3
196typedef struct { pudval_t pud; } pud_t;
197
198static inline pud_t native_make_pud(pmdval_t val)
199{
200 return (pud_t) { val };
201}
202
203static inline pudval_t native_pud_val(pud_t pud)
204{
205 return pud.pud;
206}
207#else
208#include <asm-generic/pgtable-nopud.h>
209
210static inline pudval_t native_pud_val(pud_t pud)
211{
212 return native_pgd_val(pud.pgd);
213}
214#endif
215
216#if PAGETABLE_LEVELS > 2
217typedef struct { pmdval_t pmd; } pmd_t;
218
219static inline pmd_t native_make_pmd(pmdval_t val)
220{
221 return (pmd_t) { val };
222}
223
224static inline pmdval_t native_pmd_val(pmd_t pmd)
225{
226 return pmd.pmd;
227}
228#else
229#include <asm-generic/pgtable-nopmd.h>
230
231static inline pmdval_t native_pmd_val(pmd_t pmd)
232{
233 return native_pgd_val(pmd.pud.pgd);
234}
235#endif
236
237static inline pudval_t pud_flags(pud_t pud)
238{
239 return native_pud_val(pud) & PTE_FLAGS_MASK;
240}
241
242static inline pmdval_t pmd_flags(pmd_t pmd)
243{
244 return native_pmd_val(pmd) & PTE_FLAGS_MASK;
245}
246
247static inline pte_t native_make_pte(pteval_t val)
248{
249 return (pte_t) { .pte = val };
250}
251
252static inline pteval_t native_pte_val(pte_t pte)
253{
254 return pte.pte;
255}
256
257static inline pteval_t pte_flags(pte_t pte)
258{
259 return native_pte_val(pte) & PTE_FLAGS_MASK;
260}
261
262#define pgprot_val(x) ((x).pgprot)
263#define __pgprot(x) ((pgprot_t) { (x) } )
264
265
266typedef struct page *pgtable_t;
267
268extern pteval_t __supported_pte_mask;
269extern int nx_enabled;
270
271#define pgprot_writecombine pgprot_writecombine
272extern pgprot_t pgprot_writecombine(pgprot_t prot);
273
274/* Indicate that x86 has its own track and untrack pfn vma functions */
275#define __HAVE_PFNMAP_TRACKING
276
277#define __HAVE_PHYS_MEM_ACCESS_PROT
278struct file;
279pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
280 unsigned long size, pgprot_t vma_prot);
281int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
282 unsigned long size, pgprot_t *vma_prot);
283
284/* Install a pte for a particular vaddr in kernel space. */
285void set_pte_vaddr(unsigned long vaddr, pte_t pte);
286
287#ifdef CONFIG_X86_32
288extern void native_pagetable_setup_start(pgd_t *base);
289extern void native_pagetable_setup_done(pgd_t *base);
290#else
291static inline void native_pagetable_setup_start(pgd_t *base) {}
292static inline void native_pagetable_setup_done(pgd_t *base) {}
293#endif
294
295struct seq_file;
296extern void arch_report_meminfo(struct seq_file *m);
297
298enum {
299 PG_LEVEL_NONE,
300 PG_LEVEL_4K,
301 PG_LEVEL_2M,
302 PG_LEVEL_1G,
303 PG_LEVEL_NUM
304};
305
306#ifdef CONFIG_PROC_FS
307extern void update_page_count(int level, unsigned long pages);
308#else
309static inline void update_page_count(int level, unsigned long pages) { }
310#endif
311
312/*
313 * Helper function that returns the kernel pagetable entry controlling
314 * the virtual address 'address'. NULL means no pagetable entry present.
315 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
316 * as a pte too.
317 */
318extern pte_t *lookup_address(unsigned long address, unsigned int *level);
319
320#endif /* !__ASSEMBLY__ */
321
322#endif /* _ASM_X86_PGTABLE_DEFS_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index a0133838b67c..dabab1a19ddd 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -16,6 +16,7 @@ struct mm_struct;
16#include <asm/cpufeature.h> 16#include <asm/cpufeature.h>
17#include <asm/system.h> 17#include <asm/system.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/pgtable_types.h>
19#include <asm/percpu.h> 20#include <asm/percpu.h>
20#include <asm/msr.h> 21#include <asm/msr.h>
21#include <asm/desc_defs.h> 22#include <asm/desc_defs.h>
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 45b40278b582..8029369cd6f4 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -7,21 +7,6 @@
7 7
8#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
9 9
10/* Interrupt control for vSMPowered x86_64 systems */
11void vsmp_init(void);
12
13void setup_bios_corruption_check(void);
14
15#ifdef CONFIG_X86_VISWS
16extern void visws_early_detect(void);
17extern int is_visws_box(void);
18#else
19static inline void visws_early_detect(void) { }
20static inline int is_visws_box(void) { return 0; }
21#endif
22
23extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
24extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
25/* 10/*
26 * Any setup quirks to be performed? 11 * Any setup quirks to be performed?
27 */ 12 */
@@ -45,15 +30,9 @@ struct x86_quirks {
45 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable, 30 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
46 unsigned short oemsize); 31 unsigned short oemsize);
47 int (*setup_ioapic_ids)(void); 32 int (*setup_ioapic_ids)(void);
48 int (*update_genapic)(void); 33 int (*update_apic)(void);
49}; 34};
50 35
51extern struct x86_quirks *x86_quirks;
52extern unsigned long saved_video_mode;
53
54#ifndef CONFIG_PARAVIRT
55#define paravirt_post_allocator_init() do {} while (0)
56#endif
57#endif /* __ASSEMBLY__ */ 36#endif /* __ASSEMBLY__ */
58 37
59#ifdef __i386__ 38#ifdef __i386__
@@ -76,6 +55,28 @@ extern unsigned long saved_video_mode;
76#ifndef __ASSEMBLY__ 55#ifndef __ASSEMBLY__
77#include <asm/bootparam.h> 56#include <asm/bootparam.h>
78 57
58/* Interrupt control for vSMPowered x86_64 systems */
59void vsmp_init(void);
60
61void setup_bios_corruption_check(void);
62
63#ifdef CONFIG_X86_VISWS
64extern void visws_early_detect(void);
65extern int is_visws_box(void);
66#else
67static inline void visws_early_detect(void) { }
68static inline int is_visws_box(void) { return 0; }
69#endif
70
71extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
72extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
73extern struct x86_quirks *x86_quirks;
74extern unsigned long saved_video_mode;
75
76#ifndef CONFIG_PARAVIRT
77#define paravirt_post_allocator_init() do {} while (0)
78#endif
79
79#ifndef _SETUP 80#ifndef _SETUP
80 81
81/* 82/*
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 68b1be10cfad..258ef730aaa4 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -74,6 +74,7 @@ asmlinkage long sys_vfork(struct pt_regs *);
74asmlinkage long sys_execve(char __user *, char __user * __user *, 74asmlinkage long sys_execve(char __user *, char __user * __user *,
75 char __user * __user *, 75 char __user * __user *,
76 struct pt_regs *); 76 struct pt_regs *);
77long sys_arch_prctl(int, unsigned long);
77 78
78/* kernel/ioport.c */ 79/* kernel/ioport.c */
79asmlinkage long sys_iopl(unsigned int, struct pt_regs *); 80asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index 81fbd735aec4..d5b7e90c0edf 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -38,22 +38,30 @@ extern struct shared_info *HYPERVISOR_shared_info;
38extern struct start_info *xen_start_info; 38extern struct start_info *xen_start_info;
39 39
40enum xen_domain_type { 40enum xen_domain_type {
41 XEN_NATIVE, 41 XEN_NATIVE, /* running on bare hardware */
42 XEN_PV_DOMAIN, 42 XEN_PV_DOMAIN, /* running in a PV domain */
43 XEN_HVM_DOMAIN, 43 XEN_HVM_DOMAIN, /* running in a Xen hvm domain */
44}; 44};
45 45
46extern enum xen_domain_type xen_domain_type;
47
48#ifdef CONFIG_XEN 46#ifdef CONFIG_XEN
49#define xen_domain() (xen_domain_type != XEN_NATIVE) 47extern enum xen_domain_type xen_domain_type;
50#else 48#else
51#define xen_domain() (0) 49#define xen_domain_type XEN_NATIVE
52#endif 50#endif
53 51
54#define xen_pv_domain() (xen_domain() && xen_domain_type == XEN_PV_DOMAIN) 52#define xen_domain() (xen_domain_type != XEN_NATIVE)
55#define xen_hvm_domain() (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN) 53#define xen_pv_domain() (xen_domain() && \
54 xen_domain_type == XEN_PV_DOMAIN)
55#define xen_hvm_domain() (xen_domain() && \
56 xen_domain_type == XEN_HVM_DOMAIN)
57
58#ifdef CONFIG_XEN_DOM0
59#include <xen/interface/xen.h>
56 60
57#define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN) 61#define xen_initial_domain() (xen_pv_domain() && \
62 xen_start_info->flags & SIF_INITDOMAIN)
63#else /* !CONFIG_XEN_DOM0 */
64#define xen_initial_domain() (0)
65#endif /* CONFIG_XEN_DOM0 */
58 66
59#endif /* _ASM_X86_XEN_HYPERVISOR_H */ 67#endif /* _ASM_X86_XEN_HYPERVISOR_H */