diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 13:14:56 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 13:14:56 -0400 |
commit | 41e0e0738cf864f4f49b11aac804496999b311d9 (patch) | |
tree | 0616361f85ae1181815c8c6afcaa767c142aac1d /arch/x86/include | |
parent | e7fd3b4669f5b835c8afce28425d9f698a558115 (diff) | |
parent | 344c21c32287755b5cda0eeb84adb4546a57c1db (diff) |
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, AMD: Set ARAT feature on AMD processors
x86, quirk: Fix SB600 revision check
x86: stop_machine_text_poke() should issue sync_core()
x86, amd-nb: Misc cleanliness fixes
Diffstat (limited to 'arch/x86/include')
-rw-r--r-- | arch/x86/include/asm/amd_nb.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h index e264ae5a1443..331682231bb4 100644 --- a/arch/x86/include/asm/amd_nb.h +++ b/arch/x86/include/asm/amd_nb.h | |||
@@ -13,7 +13,7 @@ extern const struct pci_device_id amd_nb_misc_ids[]; | |||
13 | extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[]; | 13 | extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[]; |
14 | struct bootnode; | 14 | struct bootnode; |
15 | 15 | ||
16 | extern int early_is_amd_nb(u32 value); | 16 | extern bool early_is_amd_nb(u32 value); |
17 | extern int amd_cache_northbridges(void); | 17 | extern int amd_cache_northbridges(void); |
18 | extern void amd_flush_garts(void); | 18 | extern void amd_flush_garts(void); |
19 | extern int amd_numa_init(void); | 19 | extern int amd_numa_init(void); |
@@ -32,18 +32,18 @@ struct amd_northbridge_info { | |||
32 | }; | 32 | }; |
33 | extern struct amd_northbridge_info amd_northbridges; | 33 | extern struct amd_northbridge_info amd_northbridges; |
34 | 34 | ||
35 | #define AMD_NB_GART 0x1 | 35 | #define AMD_NB_GART BIT(0) |
36 | #define AMD_NB_L3_INDEX_DISABLE 0x2 | 36 | #define AMD_NB_L3_INDEX_DISABLE BIT(1) |
37 | #define AMD_NB_L3_PARTITIONING 0x4 | 37 | #define AMD_NB_L3_PARTITIONING BIT(2) |
38 | 38 | ||
39 | #ifdef CONFIG_AMD_NB | 39 | #ifdef CONFIG_AMD_NB |
40 | 40 | ||
41 | static inline int amd_nb_num(void) | 41 | static inline u16 amd_nb_num(void) |
42 | { | 42 | { |
43 | return amd_northbridges.num; | 43 | return amd_northbridges.num; |
44 | } | 44 | } |
45 | 45 | ||
46 | static inline int amd_nb_has_feature(int feature) | 46 | static inline bool amd_nb_has_feature(unsigned feature) |
47 | { | 47 | { |
48 | return ((amd_northbridges.flags & feature) == feature); | 48 | return ((amd_northbridges.flags & feature) == feature); |
49 | } | 49 | } |