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authorIngo Molnar <mingo@elte.hu>2009-01-27 22:09:58 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-28 17:20:13 -0500
commit9b5bc8dc12421a4b17047061f473d85c1797d543 (patch)
tree69799378fb9e55dd8c23ceb39c646d7bf47523f8 /arch/x86/include/asm
parentf8987a1093cc7a896137e264c24e04d4048e9f95 (diff)
x86, apic: remove IRQ_DEST_MODE / IRQ_DELIVERY_MODE
Remove the wrapper macros IRQ_DEST_MODE and IRQ_DELIVERY_MODE. The typical 32-bit and the 64-bit build all dereference via the genapic, so it's pointless to hide that indirection via these ugly macros. Furthermore, it also obscures subarchitecture details. So replace it with apic->irq_dest_mode / etc. accesses. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/bigsmp/apic.h4
-rw-r--r--arch/x86/include/asm/es7000/apic.h4
-rw-r--r--arch/x86/include/asm/mach-default/mach_apic.h5
-rw-r--r--arch/x86/include/asm/mach-generic/mach_apic.h2
-rw-r--r--arch/x86/include/asm/numaq/apic.h4
-rw-r--r--arch/x86/include/asm/summit/apic.h4
6 files changed, 10 insertions, 13 deletions
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 8ff8bba88338..293551b0e610 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void)
21#undef APIC_DEST_LOGICAL 21#undef APIC_DEST_LOGICAL
22#define APIC_DEST_LOGICAL 0 22#define APIC_DEST_LOGICAL 0
23#define APIC_DFR_VALUE (APIC_DFR_FLAT) 23#define APIC_DFR_VALUE (APIC_DFR_FLAT)
24#define IRQ_DELIVERY_MODE (dest_Fixed) 24#define BIGSMP_IRQ_DELIVERY_MODE (dest_Fixed)
25#define IRQ_DEST_MODE (0) /* phys delivery to target proc */ 25#define BIGSMP_IRQ_DEST_MODE (0) /* phys delivery to target proc */
26#define NO_BALANCE_IRQ (0) 26#define NO_BALANCE_IRQ (0)
27 27
28static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 28static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 830e8731cc05..690016683f21 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void)
27#define NO_BALANCE_IRQ_CLUSTER (1) 27#define NO_BALANCE_IRQ_CLUSTER (1)
28 28
29#define APIC_DFR_VALUE (APIC_DFR_FLAT) 29#define APIC_DFR_VALUE (APIC_DFR_FLAT)
30#define IRQ_DELIVERY_MODE (dest_Fixed) 30#define ES7000_IRQ_DELIVERY_MODE (dest_Fixed)
31#define IRQ_DEST_MODE (0) /* phys delivery to target procs */ 31#define ES7000_IRQ_DEST_MODE (0) /* phys delivery to target procs */
32#define NO_BALANCE_IRQ (0) 32#define NO_BALANCE_IRQ (0)
33#undef APIC_DEST_LOGICAL 33#undef APIC_DEST_LOGICAL
34#define APIC_DEST_LOGICAL 0x0 34#define APIC_DEST_LOGICAL 0x0
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index b5364793262a..eafbf4f20387 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,7 +22,6 @@ static inline const struct cpumask *target_cpus(void)
22 22
23#ifdef CONFIG_X86_64 23#ifdef CONFIG_X86_64
24#include <asm/genapic.h> 24#include <asm/genapic.h>
25#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
26#define IRQ_DEST_MODE (apic->irq_dest_mode) 25#define IRQ_DEST_MODE (apic->irq_dest_mode)
27#define TARGET_CPUS (apic->target_cpus()) 26#define TARGET_CPUS (apic->target_cpus())
28#define init_apic_ldr (apic->init_apic_ldr) 27#define init_apic_ldr (apic->init_apic_ldr)
@@ -35,8 +34,8 @@ static inline const struct cpumask *target_cpus(void)
35#define wakeup_secondary_cpu (apic->wakeup_cpu) 34#define wakeup_secondary_cpu (apic->wakeup_cpu)
36extern void setup_apic_routing(void); 35extern void setup_apic_routing(void);
37#else 36#else
38#define IRQ_DELIVERY_MODE dest_LowestPrio 37#define DEFAULT_IRQ_DELIVERY_MODE dest_LowestPrio
39#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */ 38#define DEFAULT_IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
40#define TARGET_CPUS (target_cpus()) 39#define TARGET_CPUS (target_cpus())
41#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init 40#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
42/* 41/*
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index 03492f2219ed..387a5d00c43d 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -5,8 +5,6 @@
5 5
6#define esr_disable (apic->ESR_DISABLE) 6#define esr_disable (apic->ESR_DISABLE)
7#define NO_BALANCE_IRQ (apic->no_balance_irq) 7#define NO_BALANCE_IRQ (apic->no_balance_irq)
8#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
9#define IRQ_DEST_MODE (apic->irq_dest_mode)
10#undef APIC_DEST_LOGICAL 8#undef APIC_DEST_LOGICAL
11#define APIC_DEST_LOGICAL (apic->apic_destination_logical) 9#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
12#define TARGET_CPUS (apic->target_cpus()) 10#define TARGET_CPUS (apic->target_cpus())
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index d885e35df18e..7746035c5911 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void)
15#define NO_BALANCE_IRQ (1) 15#define NO_BALANCE_IRQ (1)
16#define esr_disable (1) 16#define esr_disable (1)
17 17
18#define IRQ_DELIVERY_MODE dest_LowestPrio 18#define NUMAQ_IRQ_DELIVERY_MODE dest_LowestPrio
19#define IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */ 19#define NUMAQ_IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */
20 20
21static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 21static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
22{ 22{
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index 0b7d0d14e568..ea2abe9b5979 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -24,8 +24,8 @@ static inline const cpumask_t *target_cpus(void)
24 return &cpumask_of_cpu(0); 24 return &cpumask_of_cpu(0);
25} 25}
26 26
27#define IRQ_DELIVERY_MODE (dest_LowestPrio) 27#define SUMMIT_IRQ_DELIVERY_MODE (dest_LowestPrio)
28#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */ 28#define SUMMIT_IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
29 29
30static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 30static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
31{ 31{