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authorThomas Gleixner <tglx@linutronix.de>2009-08-20 03:27:29 -0400
committerThomas Gleixner <tglx@linutronix.de>2009-08-27 11:12:52 -0400
commitde93410310952fb7b705f784ef22493c8362dbe8 (patch)
treeebf9925e8f78343ddb24049cc9146ead4df34661 /arch/x86/include/asm
parentf4848472cd99487e182b64fb2a5d0e4fedbe86ad (diff)
x86: Move ioapic_ids_setup to x86_init_ops
32bit and also the numaq code have special requirements on the ioapic_id setup. Convert it to a x86_init_ops function and get rid of the quirks and #ifdefs Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/io_apic.h3
-rw-r--r--arch/x86/include/asm/setup.h1
-rw-r--r--arch/x86/include/asm/x86_init.h2
3 files changed, 4 insertions, 2 deletions
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 330ee807f89e..2b8aeb89933a 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -177,12 +177,13 @@ extern int setup_ioapic_entry(int apic, int irq,
177 int polarity, int vector, int pin); 177 int polarity, int vector, int pin);
178extern void ioapic_write_entry(int apic, int pin, 178extern void ioapic_write_entry(int apic, int pin,
179 struct IO_APIC_route_entry e); 179 struct IO_APIC_route_entry e);
180extern void setup_ioapic_ids_from_mpc(void);
180#else /* !CONFIG_X86_IO_APIC */ 181#else /* !CONFIG_X86_IO_APIC */
181#define io_apic_assign_pci_irqs 0 182#define io_apic_assign_pci_irqs 0
183#define setup_ioapic_ids_from_mpc x86_init_noop
182static const int timer_through_8259 = 0; 184static const int timer_through_8259 = 0;
183static inline void ioapic_init_mappings(void) { } 185static inline void ioapic_init_mappings(void) { }
184static inline void ioapic_insert_resources(void) { } 186static inline void ioapic_insert_resources(void) { }
185
186static inline void probe_nr_irqs_gsi(void) { } 187static inline void probe_nr_irqs_gsi(void) { }
187#endif 188#endif
188 189
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index bbf2dfd59b47..cc8b4b0550ea 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -30,7 +30,6 @@ struct x86_quirks {
30 void (*mpc_oem_pci_bus)(struct mpc_bus *m); 30 void (*mpc_oem_pci_bus)(struct mpc_bus *m);
31 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable, 31 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
32 unsigned short oemsize); 32 unsigned short oemsize);
33 int (*setup_ioapic_ids)(void);
34}; 33};
35 34
36extern void x86_quirk_intr_init(void); 35extern void x86_quirk_intr_init(void);
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 10b297b1881a..65985730b376 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -4,9 +4,11 @@
4/** 4/**
5 * struct x86_init_mpparse - platform specific mpparse ops 5 * struct x86_init_mpparse - platform specific mpparse ops
6 * @mpc_record: platform specific mpc record accounting 6 * @mpc_record: platform specific mpc record accounting
7 * @setup_ioapic_ids: platform specific ioapic id override
7 */ 8 */
8struct x86_init_mpparse { 9struct x86_init_mpparse {
9 void (*mpc_record)(unsigned int mode); 10 void (*mpc_record)(unsigned int mode);
11 void (*setup_ioapic_ids)(void);
10}; 12};
11 13
12/** 14/**