diff options
author | Huang Ying <ying.huang@intel.com> | 2009-08-31 01:11:54 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2009-09-02 00:39:15 -0400 |
commit | ae4b688db2432baad379f73fdcac13ec24f603d5 (patch) | |
tree | e367ad761a6835fffeb25694f3308e9315d7ef3c /arch/x86/include/asm | |
parent | f6909f394c2d4a0a71320797df72d54c49c5927e (diff) |
x86: Move kernel_fpu_using to irq_fpu_usable in asm/i387.h
This function measures whether the FPU/SSE state can be touched in
interrupt context. If the interrupted code is in user space or has no
valid FPU/SSE context (CR0.TS == 1), FPU/SSE state can be used in IRQ
or soft_irq context too.
This is used by AES-NI accelerated AES implementation and PCLMULQDQ
accelerated GHASH implementation.
v3:
- Renamed to irq_fpu_usable to reflect the purpose of the function.
v2:
- Renamed to irq_is_fpu_using to reflect the real situation.
Signed-off-by: Huang Ying <ying.huang@intel.com>
CC: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r-- | arch/x86/include/asm/i387.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h index 175adf58dd4f..fb7f0d64e14f 100644 --- a/arch/x86/include/asm/i387.h +++ b/arch/x86/include/asm/i387.h | |||
@@ -301,6 +301,14 @@ static inline void kernel_fpu_end(void) | |||
301 | preempt_enable(); | 301 | preempt_enable(); |
302 | } | 302 | } |
303 | 303 | ||
304 | static inline bool irq_fpu_usable(void) | ||
305 | { | ||
306 | struct pt_regs *regs; | ||
307 | |||
308 | return !in_interrupt() || !(regs = get_irq_regs()) || \ | ||
309 | user_mode(regs) || (read_cr0() & X86_CR0_TS); | ||
310 | } | ||
311 | |||
304 | /* | 312 | /* |
305 | * Some instructions like VIA's padlock instructions generate a spurious | 313 | * Some instructions like VIA's padlock instructions generate a spurious |
306 | * DNA fault but don't modify SSE registers. And these instructions | 314 | * DNA fault but don't modify SSE registers. And these instructions |