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authorIngo Molnar <mingo@elte.hu>2009-01-28 12:49:31 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-28 17:20:38 -0500
commitb11b867f78910192fc54bd0d09148cf768c7aaad (patch)
tree2b2ab37f5f4730fdafa07c2d43be1d06b9d502e2 /arch/x86/include/asm/summit/apic.h
parent5a44632f77a9c867621f7bf80c233eac75fea672 (diff)
x86, summit: consolidate code
Consolidate all the Summit code into a single file: arch/x86/kernel/summit_32.c. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/summit/apic.h')
-rw-r--r--arch/x86/include/asm/summit/apic.h195
1 files changed, 0 insertions, 195 deletions
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
deleted file mode 100644
index 15b8dbd19e1a..000000000000
--- a/arch/x86/include/asm/summit/apic.h
+++ /dev/null
@@ -1,195 +0,0 @@
1#ifndef __ASM_SUMMIT_APIC_H
2#define __ASM_SUMMIT_APIC_H
3
4#include <asm/smp.h>
5#include <linux/gfp.h>
6
7/* In clustered mode, the high nibble of APIC ID is a cluster number.
8 * The low nibble is a 4-bit bitmap. */
9#define XAPIC_DEST_CPUS_SHIFT 4
10#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
11#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
12
13#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
14
15static inline const cpumask_t *summit_target_cpus(void)
16{
17 /* CPU_MASK_ALL (0xff) has undefined behaviour with
18 * dest_LowestPrio mode logical clustered apic interrupt routing
19 * Just start on cpu 0. IRQ balancing will spread load
20 */
21 return &cpumask_of_cpu(0);
22}
23
24static inline unsigned long
25summit_check_apicid_used(physid_mask_t bitmap, int apicid)
26{
27 return 0;
28}
29
30/* we don't use the phys_cpu_present_map to indicate apicid presence */
31static inline unsigned long summit_check_apicid_present(int bit)
32{
33 return 1;
34}
35
36#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
37
38extern u8 cpu_2_logical_apicid[];
39
40static inline void summit_init_apic_ldr(void)
41{
42 unsigned long val, id;
43 int count = 0;
44 u8 my_id = (u8)hard_smp_processor_id();
45 u8 my_cluster = (u8)apicid_cluster(my_id);
46#ifdef CONFIG_SMP
47 u8 lid;
48 int i;
49
50 /* Create logical APIC IDs by counting CPUs already in cluster. */
51 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
52 lid = cpu_2_logical_apicid[i];
53 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
54 ++count;
55 }
56#endif
57 /* We only have a 4 wide bitmap in cluster mode. If a deranged
58 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
59 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
60 id = my_cluster | (1UL << count);
61 apic_write(APIC_DFR, APIC_DFR_VALUE);
62 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
63 val |= SET_APIC_LOGICAL_ID(id);
64 apic_write(APIC_LDR, val);
65}
66
67static inline int summit_apic_id_registered(void)
68{
69 return 1;
70}
71
72static inline void summit_setup_apic_routing(void)
73{
74 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
75 nr_ioapics);
76}
77
78static inline int summit_apicid_to_node(int logical_apicid)
79{
80#ifdef CONFIG_SMP
81 return apicid_2_node[hard_smp_processor_id()];
82#else
83 return 0;
84#endif
85}
86
87/* Mapping from cpu number to logical apicid */
88static inline int summit_cpu_to_logical_apicid(int cpu)
89{
90#ifdef CONFIG_SMP
91 if (cpu >= nr_cpu_ids)
92 return BAD_APICID;
93 return (int)cpu_2_logical_apicid[cpu];
94#else
95 return logical_smp_processor_id();
96#endif
97}
98
99static inline int summit_cpu_present_to_apicid(int mps_cpu)
100{
101 if (mps_cpu < nr_cpu_ids)
102 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
103 else
104 return BAD_APICID;
105}
106
107static inline physid_mask_t
108summit_ioapic_phys_id_map(physid_mask_t phys_id_map)
109{
110 /* For clustered we don't have a good way to do this yet - hack */
111 return physids_promote(0x0F);
112}
113
114static inline physid_mask_t summit_apicid_to_cpu_present(int apicid)
115{
116 return physid_mask_of_physid(0);
117}
118
119static inline void summit_setup_portio_remap(void)
120{
121}
122
123static inline int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
124{
125 return 1;
126}
127
128static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
129{
130 int cpus_found = 0;
131 int num_bits_set;
132 int apicid;
133 int cpu;
134
135 num_bits_set = cpus_weight(*cpumask);
136 /* Return id to all */
137 if (num_bits_set >= nr_cpu_ids)
138 return 0xFF;
139 /*
140 * The cpus in the mask must all be on the apic cluster. If are not
141 * on the same apicid cluster return default value of target_cpus():
142 */
143 cpu = first_cpu(*cpumask);
144 apicid = summit_cpu_to_logical_apicid(cpu);
145
146 while (cpus_found < num_bits_set) {
147 if (cpu_isset(cpu, *cpumask)) {
148 int new_apicid = summit_cpu_to_logical_apicid(cpu);
149
150 if (apicid_cluster(apicid) !=
151 apicid_cluster(new_apicid)) {
152 printk ("%s: Not a valid mask!\n", __func__);
153
154 return 0xFF;
155 }
156 apicid = apicid | new_apicid;
157 cpus_found++;
158 }
159 cpu++;
160 }
161 return apicid;
162}
163
164static inline unsigned int
165summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
166 const struct cpumask *andmask)
167{
168 int apicid = summit_cpu_to_logical_apicid(0);
169 cpumask_var_t cpumask;
170
171 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
172 return apicid;
173
174 cpumask_and(cpumask, inmask, andmask);
175 cpumask_and(cpumask, cpumask, cpu_online_mask);
176 apicid = summit_cpu_mask_to_apicid(cpumask);
177
178 free_cpumask_var(cpumask);
179
180 return apicid;
181}
182
183/*
184 * cpuid returns the value latched in the HW at reset, not the APIC ID
185 * register's value. For any box whose BIOS changes APIC IDs, like
186 * clustered APIC systems, we must use hard_smp_processor_id.
187 *
188 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
189 */
190static inline int summit_phys_pkg_id(int cpuid_apic, int index_msb)
191{
192 return hard_smp_processor_id() >> index_msb;
193}
194
195#endif /* __ASM_SUMMIT_APIC_H */