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authorBorislav Petkov <petkovbb@googlemail.com>2009-08-31 03:50:10 -0400
committerH. Peter Anvin <hpa@zytor.com>2009-08-31 18:14:28 -0400
commit177fed1ee8d727c39601ce9fc2299b4cb25a718e (patch)
treec5e77b06ef238f59a8566358670ff9a91d376e27 /arch/x86/include/asm/msr.h
parent132ec92f3f70fe365c1f4b8d46e66cf8a2a16880 (diff)
x86, msr: Rewrite AMD rd/wrmsr variants
Switch them to native_{rd,wr}msr_safe_regs and remove pv_cpu_ops.read_msr_amd. Signed-off-by: Borislav Petkov <petkovbb@gmail.com> LKML-Reference: <1251705011-18636-2-git-send-email-petkovbb@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/msr.h')
-rw-r--r--arch/x86/include/asm/msr.h38
1 files changed, 21 insertions, 17 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 184d4a113961..09c5ca70d49d 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -71,22 +71,6 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr,
71 return EAX_EDX_VAL(val, low, high); 71 return EAX_EDX_VAL(val, low, high);
72} 72}
73 73
74static inline unsigned long long native_read_msr_amd_safe(unsigned int msr,
75 int *err)
76{
77 DECLARE_ARGS(val, low, high);
78
79 asm volatile("2: rdmsr ; xor %0,%0\n"
80 "1:\n\t"
81 ".section .fixup,\"ax\"\n\t"
82 "3: mov %3,%0 ; jmp 1b\n\t"
83 ".previous\n\t"
84 _ASM_EXTABLE(2b, 3b)
85 : "=r" (*err), EAX_EDX_RET(val, low, high)
86 : "c" (msr), "D" (0x9c5a203a), "i" (-EFAULT));
87 return EAX_EDX_VAL(val, low, high);
88}
89
90static inline void native_write_msr(unsigned int msr, 74static inline void native_write_msr(unsigned int msr,
91 unsigned low, unsigned high) 75 unsigned low, unsigned high)
92{ 76{
@@ -184,14 +168,34 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
184 *p = native_read_msr_safe(msr, &err); 168 *p = native_read_msr_safe(msr, &err);
185 return err; 169 return err;
186} 170}
171
187static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) 172static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
188{ 173{
174 u32 gprs[8] = { 0 };
189 int err; 175 int err;
190 176
191 *p = native_read_msr_amd_safe(msr, &err); 177 gprs[1] = msr;
178 gprs[7] = 0x9c5a203a;
179
180 err = native_rdmsr_safe_regs(gprs);
181
182 *p = gprs[0] | ((u64)gprs[2] << 32);
183
192 return err; 184 return err;
193} 185}
194 186
187static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
188{
189 u32 gprs[8] = { 0 };
190
191 gprs[0] = (u32)val;
192 gprs[1] = msr;
193 gprs[2] = val >> 32;
194 gprs[7] = 0x9c5a203a;
195
196 return native_wrmsr_safe_regs(gprs);
197}
198
195static inline int rdmsr_safe_regs(u32 *regs) 199static inline int rdmsr_safe_regs(u32 *regs)
196{ 200{
197 return native_rdmsr_safe_regs(regs); 201 return native_rdmsr_safe_regs(regs);