diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2009-03-23 09:50:03 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2009-03-23 16:20:20 -0400 |
| commit | 80c5520811d3805adcb15c570ea5e2d489fa5d0b (patch) | |
| tree | ae797a7f4af39f80e77526533d06ac23b439f0ab /arch/x86/include/asm/msr-index.h | |
| parent | b3e3b302cf6dc8d60b67f0e84d1fa5648889c038 (diff) | |
| parent | 8c083f081d0014057901c68a0a3e0f8ca7ac8d23 (diff) | |
Merge branch 'cpus4096' into irq/threaded
Conflicts:
arch/parisc/kernel/irq.c
kernel/irq/handle.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 358acc59ae04..2dbd2314139e 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
| @@ -77,6 +77,11 @@ | |||
| 77 | #define MSR_IA32_MC0_ADDR 0x00000402 | 77 | #define MSR_IA32_MC0_ADDR 0x00000402 |
| 78 | #define MSR_IA32_MC0_MISC 0x00000403 | 78 | #define MSR_IA32_MC0_MISC 0x00000403 |
| 79 | 79 | ||
| 80 | /* These are consecutive and not in the normal 4er MCE bank block */ | ||
| 81 | #define MSR_IA32_MC0_CTL2 0x00000280 | ||
| 82 | #define CMCI_EN (1ULL << 30) | ||
| 83 | #define CMCI_THRESHOLD_MASK 0xffffULL | ||
| 84 | |||
| 80 | #define MSR_P6_PERFCTR0 0x000000c1 | 85 | #define MSR_P6_PERFCTR0 0x000000c1 |
| 81 | #define MSR_P6_PERFCTR1 0x000000c2 | 86 | #define MSR_P6_PERFCTR1 0x000000c2 |
| 82 | #define MSR_P6_EVNTSEL0 0x00000186 | 87 | #define MSR_P6_EVNTSEL0 0x00000186 |