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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-06-15 04:24:40 -0400
committerH. Peter Anvin <hpa@zytor.com>2009-06-16 19:56:08 -0400
commite8ce2c5ee826b3787202493effcd08d4b1e1e639 (patch)
tree45dfcd93086820963d196d88851d772d11b2f8e9 /arch/x86/include/asm/mce.h
parent5335612a574a45beab14193ec641ed2f45e7a523 (diff)
x86, mce: unify smp_thermal_interrupt, prepare
Let them in same shape. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h25
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 6568cdedcd89..3bc827c0f409 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -110,6 +110,7 @@ extern int mce_disabled;
110extern int mce_p5_enabled; 110extern int mce_p5_enabled;
111 111
112#ifdef CONFIG_X86_OLD_MCE 112#ifdef CONFIG_X86_OLD_MCE
113extern int nr_mce_banks;
113void amd_mcheck_init(struct cpuinfo_x86 *c); 114void amd_mcheck_init(struct cpuinfo_x86 *c);
114void intel_p4_mcheck_init(struct cpuinfo_x86 *c); 115void intel_p4_mcheck_init(struct cpuinfo_x86 *c);
115void intel_p6_mcheck_init(struct cpuinfo_x86 *c); 116void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
@@ -128,15 +129,6 @@ static inline void enable_p5_mce(void) {}
128/* Call the installed machine check handler for this CPU setup. */ 129/* Call the installed machine check handler for this CPU setup. */
129extern void (*machine_check_vector)(struct pt_regs *, long error_code); 130extern void (*machine_check_vector)(struct pt_regs *, long error_code);
130 131
131#ifdef CONFIG_X86_OLD_MCE
132extern int nr_mce_banks;
133extern void intel_set_thermal_handler(void);
134#else
135static inline void intel_set_thermal_handler(void) { }
136#endif
137
138void intel_init_thermal(struct cpuinfo_x86 *c);
139
140void mce_setup(struct mce *m); 132void mce_setup(struct mce *m);
141void mce_log(struct mce *m); 133void mce_log(struct mce *m);
142DECLARE_PER_CPU(struct sys_device, mce_dev); 134DECLARE_PER_CPU(struct sys_device, mce_dev);
@@ -175,8 +167,6 @@ int mce_available(struct cpuinfo_x86 *c);
175DECLARE_PER_CPU(unsigned, mce_exception_count); 167DECLARE_PER_CPU(unsigned, mce_exception_count);
176DECLARE_PER_CPU(unsigned, mce_poll_count); 168DECLARE_PER_CPU(unsigned, mce_poll_count);
177 169
178void mce_log_therm_throt_event(__u64 status);
179
180extern atomic_t mce_entry; 170extern atomic_t mce_entry;
181 171
182void do_machine_check(struct pt_regs *, long); 172void do_machine_check(struct pt_regs *, long);
@@ -205,5 +195,18 @@ void mcheck_init(struct cpuinfo_x86 *c);
205 195
206extern void (*mce_threshold_vector)(void); 196extern void (*mce_threshold_vector)(void);
207 197
198/*
199 * Thermal handler
200 */
201
202void intel_set_thermal_handler(void);
203void intel_init_thermal(struct cpuinfo_x86 *c);
204
205#ifdef CONFIG_X86_NEW_MCE
206void mce_log_therm_throt_event(__u64 status);
207#else
208static inline void mce_log_therm_throt_event(__u64 status) {}
209#endif
210
208#endif /* __KERNEL__ */ 211#endif /* __KERNEL__ */
209#endif /* _ASM_X86_MCE_H */ 212#endif /* _ASM_X86_MCE_H */