diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-01-27 23:01:41 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-01-28 17:20:17 -0500 |
commit | f6f52baf2613dd319e9ba3f3319bf1f1c442e4b3 (patch) | |
tree | 1eb8f814939501c10f3f18af86f9c5a5d25c7310 /arch/x86/include/asm/mach-default | |
parent | fe402e1f2b67a63f1e53ab2a316fc20f7ca4ec91 (diff) |
x86: clean up esr_disable() methods
Impact: cleanup
Most subarchitectures want to disable the APIC ESR (Error Status Register),
because they generally have hardware hacks that wrap standard CPUs into
a bigger system and hence the APIC bus is quite non-standard and weirdnesses
(lockups) have been seen with ESR reporting.
Remove the esr_disable macros and put the desired flag into each
subarchitecture's genapic template directly.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/mach-default')
-rw-r--r-- | arch/x86/include/asm/mach-default/mach_apic.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h index 77a972475878..5f8d17fdc965 100644 --- a/arch/x86/include/asm/mach-default/mach_apic.h +++ b/arch/x86/include/asm/mach-default/mach_apic.h | |||
@@ -18,7 +18,6 @@ static inline const struct cpumask *default_target_cpus(void) | |||
18 | } | 18 | } |
19 | 19 | ||
20 | #define NO_BALANCE_IRQ (0) | 20 | #define NO_BALANCE_IRQ (0) |
21 | #define esr_disable (0) | ||
22 | 21 | ||
23 | #ifdef CONFIG_X86_64 | 22 | #ifdef CONFIG_X86_64 |
24 | #include <asm/genapic.h> | 23 | #include <asm/genapic.h> |