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authorIngo Molnar <mingo@elte.hu>2009-01-28 00:50:47 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-28 17:20:20 -0500
commite2d40b1878bd13ca1028ddd299c48e4821ac3535 (patch)
tree6b2a69b3323346137e7146537edd1118dcce7862 /arch/x86/include/asm/mach-default
parent2e867b17cc02e1799f18126af0ddd7b63dd8f6f4 (diff)
x86, apic: clean up ->vector_allocation_domain()
- separate the namespace - remove macros - move the default vector-allocation-domain to mach-generic - fix whitespace damage Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/mach-default')
-rw-r--r--arch/x86/include/asm/mach-default/mach_apic.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index 8adccf8ee473..9c56542644ca 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -23,7 +23,6 @@ static inline const struct cpumask *default_target_cpus(void)
23#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid) 23#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
24#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and) 24#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and)
25#define phys_pkg_id (apic->phys_pkg_id) 25#define phys_pkg_id (apic->phys_pkg_id)
26#define vector_allocation_domain (apic->vector_allocation_domain)
27#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) 26#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
28#define send_IPI_self (apic->send_IPI_self) 27#define send_IPI_self (apic->send_IPI_self)
29#define wakeup_secondary_cpu (apic->wakeup_cpu) 28#define wakeup_secondary_cpu (apic->wakeup_cpu)
@@ -89,18 +88,6 @@ static inline int apicid_to_node(int logical_apicid)
89#endif 88#endif
90} 89}
91 90
92static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
93{
94 /* Careful. Some cpus do not strictly honor the set of cpus
95 * specified in the interrupt destination when using lowest
96 * priority interrupt delivery mode.
97 *
98 * In particular there was a hyperthreading cpu observed to
99 * deliver interrupts to the wrong hyperthread when only one
100 * hyperthread was specified in the interrupt desitination.
101 */
102 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
103}
104#endif 91#endif
105 92
106static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid) 93static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)