diff options
author | Alexander Graf <agraf@suse.de> | 2008-11-25 14:17:07 -0500 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2009-03-24 05:02:47 -0400 |
commit | 3d6368ef580a4dff012960834bba4e28d3c1430c (patch) | |
tree | b2853fd9bd2bdc97f4bea2880a644d9e5e5abecd /arch/x86/include/asm/kvm_host.h | |
parent | 5542675baa7e62ca4d18278c8758b6a4ec410639 (diff) |
KVM: SVM: Add VMRUN handler
This patch implements VMRUN. VMRUN enters a virtual CPU and runs that
in the same context as the normal guest CPU would run.
So basically it is implemented the same way, a normal CPU would do it.
We also prepare all intercepts that get OR'ed with the original
intercepts, as we do not allow a level 2 guest to be intercepted less
than the first level guest.
v2 implements the following improvements:
- fixes the CPL check
- does not allocate iopm when not used
- remembers the host's IF in the HIF bit in the hflags
v3:
- make use of the new permission checking
- add support for V_INTR_MASKING_MASK
v4:
- use host page backed hsave
v5:
- remove IOPM merging code
v6:
- save cr4 so PAE l1 guests work
v7:
- return 0 on vmrun so we check the MSRs too
- fix MSR check to use the correct variable
Acked-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/kvm_host.h')
-rw-r--r-- | arch/x86/include/asm/kvm_host.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 29e4157732db..53779309514a 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h | |||
@@ -740,6 +740,8 @@ enum { | |||
740 | }; | 740 | }; |
741 | 741 | ||
742 | #define HF_GIF_MASK (1 << 0) | 742 | #define HF_GIF_MASK (1 << 0) |
743 | #define HF_HIF_MASK (1 << 1) | ||
744 | #define HF_VINTR_MASK (1 << 2) | ||
743 | 745 | ||
744 | /* | 746 | /* |
745 | * Hardware virtualization extension instructions may fault if a | 747 | * Hardware virtualization extension instructions may fault if a |