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authorMasami Hiramatsu <mhiramat@redhat.com>2009-08-13 16:34:13 -0400
committerFrederic Weisbecker <fweisbec@gmail.com>2009-08-26 18:35:56 -0400
commiteb13296cfaf6c699566473669a96a38a90562384 (patch)
tree466c44bf0a747effaf85ec13dbf75ae857449bfd /arch/x86/include/asm/inat.h
parent35dce1a99d010f3d738af4ce1b9b77302fdfe69c (diff)
x86: Instruction decoder API
Add x86 instruction decoder to arch-specific libraries. This decoder can decode x86 instructions used in kernel into prefix, opcode, modrm, sib, displacement and immediates. This can also show the length of instructions. This version introduces instruction attributes for decoding instructions. The instruction attribute tables are generated from the opcode map file (x86-opcode-map.txt) by the generator script(gen-insn-attr-x86.awk). Currently, the opcode maps are based on opcode maps in Intel(R) 64 and IA-32 Architectures Software Developers Manual Vol.2: Appendix.A, and consist of below two types of opcode tables. 1-byte/2-bytes/3-bytes opcodes, which has 256 elements, are written as below; Table: table-name Referrer: escaped-name opcode: mnemonic|GrpXXX [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...] (or) opcode: escape # escaped-name EndTable Group opcodes, which has 8 elements, are written as below; GrpTable: GrpXXX reg: mnemonic [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...] EndTable These opcode maps include a few SSE and FP opcodes (for setup), because those opcodes are used in the kernel. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Signed-off-by: Jim Keniston <jkenisto@us.ibm.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Avi Kivity <avi@redhat.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Frank Ch. Eigler <fche@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Jason Baron <jbaron@redhat.com> Cc: K.Prasad <prasad@linux.vnet.ibm.com> Cc: Lai Jiangshan <laijs@cn.fujitsu.com> Cc: Li Zefan <lizf@cn.fujitsu.com> Cc: Przemysław Pawełczyk <przemyslaw@pawelczyk.it> Cc: Roland McGrath <roland@redhat.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Tom Zanussi <tzanussi@gmail.com> Cc: Vegard Nossum <vegard.nossum@gmail.com> LKML-Reference: <20090813203413.31965.49709.stgit@localhost.localdomain> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/inat.h')
-rw-r--r--arch/x86/include/asm/inat.h188
1 files changed, 188 insertions, 0 deletions
diff --git a/arch/x86/include/asm/inat.h b/arch/x86/include/asm/inat.h
new file mode 100644
index 000000000000..2866fddd1848
--- /dev/null
+++ b/arch/x86/include/asm/inat.h
@@ -0,0 +1,188 @@
1#ifndef _ASM_X86_INAT_H
2#define _ASM_X86_INAT_H
3/*
4 * x86 instruction attributes
5 *
6 * Written by Masami Hiramatsu <mhiramat@redhat.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 *
22 */
23#include <asm/inat_types.h>
24
25/*
26 * Internal bits. Don't use bitmasks directly, because these bits are
27 * unstable. You should use checking functions.
28 */
29
30#define INAT_OPCODE_TABLE_SIZE 256
31#define INAT_GROUP_TABLE_SIZE 8
32
33/* Legacy instruction prefixes */
34#define INAT_PFX_OPNDSZ 1 /* 0x66 */ /* LPFX1 */
35#define INAT_PFX_REPNE 2 /* 0xF2 */ /* LPFX2 */
36#define INAT_PFX_REPE 3 /* 0xF3 */ /* LPFX3 */
37#define INAT_PFX_LOCK 4 /* 0xF0 */
38#define INAT_PFX_CS 5 /* 0x2E */
39#define INAT_PFX_DS 6 /* 0x3E */
40#define INAT_PFX_ES 7 /* 0x26 */
41#define INAT_PFX_FS 8 /* 0x64 */
42#define INAT_PFX_GS 9 /* 0x65 */
43#define INAT_PFX_SS 10 /* 0x36 */
44#define INAT_PFX_ADDRSZ 11 /* 0x67 */
45
46#define INAT_LPREFIX_MAX 3
47
48/* Immediate size */
49#define INAT_IMM_BYTE 1
50#define INAT_IMM_WORD 2
51#define INAT_IMM_DWORD 3
52#define INAT_IMM_QWORD 4
53#define INAT_IMM_PTR 5
54#define INAT_IMM_VWORD32 6
55#define INAT_IMM_VWORD 7
56
57/* Legacy prefix */
58#define INAT_PFX_OFFS 0
59#define INAT_PFX_BITS 4
60#define INAT_PFX_MAX ((1 << INAT_PFX_BITS) - 1)
61#define INAT_PFX_MASK (INAT_PFX_MAX << INAT_PFX_OFFS)
62/* Escape opcodes */
63#define INAT_ESC_OFFS (INAT_PFX_OFFS + INAT_PFX_BITS)
64#define INAT_ESC_BITS 2
65#define INAT_ESC_MAX ((1 << INAT_ESC_BITS) - 1)
66#define INAT_ESC_MASK (INAT_ESC_MAX << INAT_ESC_OFFS)
67/* Group opcodes (1-16) */
68#define INAT_GRP_OFFS (INAT_ESC_OFFS + INAT_ESC_BITS)
69#define INAT_GRP_BITS 5
70#define INAT_GRP_MAX ((1 << INAT_GRP_BITS) - 1)
71#define INAT_GRP_MASK (INAT_GRP_MAX << INAT_GRP_OFFS)
72/* Immediates */
73#define INAT_IMM_OFFS (INAT_GRP_OFFS + INAT_GRP_BITS)
74#define INAT_IMM_BITS 3
75#define INAT_IMM_MASK (((1 << INAT_IMM_BITS) - 1) << INAT_IMM_OFFS)
76/* Flags */
77#define INAT_FLAG_OFFS (INAT_IMM_OFFS + INAT_IMM_BITS)
78#define INAT_REXPFX (1 << INAT_FLAG_OFFS)
79#define INAT_MODRM (1 << (INAT_FLAG_OFFS + 1))
80#define INAT_FORCE64 (1 << (INAT_FLAG_OFFS + 2))
81#define INAT_SCNDIMM (1 << (INAT_FLAG_OFFS + 3))
82#define INAT_MOFFSET (1 << (INAT_FLAG_OFFS + 4))
83#define INAT_VARIANT (1 << (INAT_FLAG_OFFS + 5))
84/* Attribute making macros for attribute tables */
85#define INAT_MAKE_PREFIX(pfx) (pfx << INAT_PFX_OFFS)
86#define INAT_MAKE_ESCAPE(esc) (esc << INAT_ESC_OFFS)
87#define INAT_MAKE_GROUP(grp) ((grp << INAT_GRP_OFFS) | INAT_MODRM)
88#define INAT_MAKE_IMM(imm) (imm << INAT_IMM_OFFS)
89
90/* Attribute search APIs */
91extern insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode);
92extern insn_attr_t inat_get_escape_attribute(insn_byte_t opcode,
93 insn_byte_t last_pfx,
94 insn_attr_t esc_attr);
95extern insn_attr_t inat_get_group_attribute(insn_byte_t modrm,
96 insn_byte_t last_pfx,
97 insn_attr_t esc_attr);
98
99/* Attribute checking functions */
100static inline int inat_is_prefix(insn_attr_t attr)
101{
102 return attr & INAT_PFX_MASK;
103}
104
105static inline int inat_is_address_size_prefix(insn_attr_t attr)
106{
107 return (attr & INAT_PFX_MASK) == INAT_PFX_ADDRSZ;
108}
109
110static inline int inat_is_operand_size_prefix(insn_attr_t attr)
111{
112 return (attr & INAT_PFX_MASK) == INAT_PFX_OPNDSZ;
113}
114
115static inline int inat_last_prefix_id(insn_attr_t attr)
116{
117 if ((attr & INAT_PFX_MASK) > INAT_LPREFIX_MAX)
118 return 0;
119 else
120 return attr & INAT_PFX_MASK;
121}
122
123static inline int inat_is_escape(insn_attr_t attr)
124{
125 return attr & INAT_ESC_MASK;
126}
127
128static inline int inat_escape_id(insn_attr_t attr)
129{
130 return (attr & INAT_ESC_MASK) >> INAT_ESC_OFFS;
131}
132
133static inline int inat_is_group(insn_attr_t attr)
134{
135 return attr & INAT_GRP_MASK;
136}
137
138static inline int inat_group_id(insn_attr_t attr)
139{
140 return (attr & INAT_GRP_MASK) >> INAT_GRP_OFFS;
141}
142
143static inline int inat_group_common_attribute(insn_attr_t attr)
144{
145 return attr & ~INAT_GRP_MASK;
146}
147
148static inline int inat_has_immediate(insn_attr_t attr)
149{
150 return attr & INAT_IMM_MASK;
151}
152
153static inline int inat_immediate_size(insn_attr_t attr)
154{
155 return (attr & INAT_IMM_MASK) >> INAT_IMM_OFFS;
156}
157
158static inline int inat_is_rex_prefix(insn_attr_t attr)
159{
160 return attr & INAT_REXPFX;
161}
162
163static inline int inat_has_modrm(insn_attr_t attr)
164{
165 return attr & INAT_MODRM;
166}
167
168static inline int inat_is_force64(insn_attr_t attr)
169{
170 return attr & INAT_FORCE64;
171}
172
173static inline int inat_has_second_immediate(insn_attr_t attr)
174{
175 return attr & INAT_SCNDIMM;
176}
177
178static inline int inat_has_moffset(insn_attr_t attr)
179{
180 return attr & INAT_MOFFSET;
181}
182
183static inline int inat_has_variant(insn_attr_t attr)
184{
185 return attr & INAT_VARIANT;
186}
187
188#endif