diff options
author | Borislav Petkov <borislav.petkov@amd.com> | 2011-08-05 09:15:08 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@linux.intel.com> | 2011-08-05 15:26:44 -0400 |
commit | dfb09f9b7ab03fd367740e541a5caf830ed56726 (patch) | |
tree | 8bd8fdbbf3fb67f7d0aed73a1e8e1c7034ed2d54 /arch/x86/include/asm/elf.h | |
parent | 13f9a3737c903ace57d8aaebe81a3bbaeb0aa0a2 (diff) |
x86, amd: Avoid cache aliasing penalties on AMD family 15h
This patch provides performance tuning for the "Bulldozer" CPU. With its
shared instruction cache there is a chance of generating an excessive
number of cache cross-invalidates when running specific workloads on the
cores of a compute module.
This excessive amount of cross-invalidations can be observed if cache
lines backed by shared physical memory alias in bits [14:12] of their
virtual addresses, as those bits are used for the index generation.
This patch addresses the issue by clearing all the bits in the [14:12]
slice of the file mapping's virtual address at generation time, thus
forcing those bits the same for all mappings of a single shared library
across processes and, in doing so, avoids instruction cache aliases.
It also adds the command line option "align_va_addr=(32|64|on|off)" with
which virtual address alignment can be enabled for 32-bit or 64-bit x86
individually, or both, or be completely disabled.
This change leaves virtual region address allocation on other families
and/or vendors unaffected.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Link: http://lkml.kernel.org/r/1312550110-24160-2-git-send-email-bp@amd64.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include/asm/elf.h')
-rw-r--r-- | arch/x86/include/asm/elf.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h index f2ad2163109d..5f962df30d0f 100644 --- a/arch/x86/include/asm/elf.h +++ b/arch/x86/include/asm/elf.h | |||
@@ -4,6 +4,7 @@ | |||
4 | /* | 4 | /* |
5 | * ELF register definitions.. | 5 | * ELF register definitions.. |
6 | */ | 6 | */ |
7 | #include <linux/thread_info.h> | ||
7 | 8 | ||
8 | #include <asm/ptrace.h> | 9 | #include <asm/ptrace.h> |
9 | #include <asm/user.h> | 10 | #include <asm/user.h> |
@@ -320,4 +321,34 @@ extern int syscall32_setup_pages(struct linux_binprm *, int exstack); | |||
320 | extern unsigned long arch_randomize_brk(struct mm_struct *mm); | 321 | extern unsigned long arch_randomize_brk(struct mm_struct *mm); |
321 | #define arch_randomize_brk arch_randomize_brk | 322 | #define arch_randomize_brk arch_randomize_brk |
322 | 323 | ||
324 | /* | ||
325 | * True on X86_32 or when emulating IA32 on X86_64 | ||
326 | */ | ||
327 | static inline int mmap_is_ia32(void) | ||
328 | { | ||
329 | #ifdef CONFIG_X86_32 | ||
330 | return 1; | ||
331 | #endif | ||
332 | #ifdef CONFIG_IA32_EMULATION | ||
333 | if (test_thread_flag(TIF_IA32)) | ||
334 | return 1; | ||
335 | #endif | ||
336 | return 0; | ||
337 | } | ||
338 | |||
339 | /* The first two values are special, do not change. See align_addr() */ | ||
340 | enum align_flags { | ||
341 | ALIGN_VA_32 = BIT(0), | ||
342 | ALIGN_VA_64 = BIT(1), | ||
343 | ALIGN_VDSO = BIT(2), | ||
344 | ALIGN_TOPDOWN = BIT(3), | ||
345 | }; | ||
346 | |||
347 | struct va_alignment { | ||
348 | int flags; | ||
349 | unsigned long mask; | ||
350 | } ____cacheline_aligned; | ||
351 | |||
352 | extern struct va_alignment va_align; | ||
353 | extern unsigned long align_addr(unsigned long, struct file *, enum align_flags); | ||
323 | #endif /* _ASM_X86_ELF_H */ | 354 | #endif /* _ASM_X86_ELF_H */ |