diff options
author | Suresh Siddha <suresh.b.siddha@intel.com> | 2009-04-20 16:02:27 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-04-21 03:08:25 -0400 |
commit | fc1edaf9e7cc4d4696f83dee495b8f158d01c4eb (patch) | |
tree | c5a361ca44205b6341c03427816876e10b07f7c5 /arch/x86/include/asm/apic.h | |
parent | 667c5296cc76fefe0abcb79228952b28d9af45e3 (diff) |
x86: x2apic, IR: Clean up X86_X2APIC and INTR_REMAP config checks
Add x2apic_supported() to clean up CONFIG_X86_X2APIC checks.
Fix CONFIG_INTR_REMAP checks.
[ Impact: cleanup ]
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: dwmw2@infradead.org
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Weidong Han <weidong.han@intel.com>
LKML-Reference: <20090420200450.128993000@linux-os.sc.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/apic.h')
-rw-r--r-- | arch/x86/include/asm/apic.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index fbdd65446c7a..3738438a91f5 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -107,8 +107,7 @@ extern u32 native_safe_apic_wait_icr_idle(void); | |||
107 | extern void native_apic_icr_write(u32 low, u32 id); | 107 | extern void native_apic_icr_write(u32 low, u32 id); |
108 | extern u64 native_apic_icr_read(void); | 108 | extern u64 native_apic_icr_read(void); |
109 | 109 | ||
110 | #define EIM_8BIT_APIC_ID 0 | 110 | extern int x2apic_mode; |
111 | #define EIM_32BIT_APIC_ID 1 | ||
112 | 111 | ||
113 | #ifdef CONFIG_X86_X2APIC | 112 | #ifdef CONFIG_X86_X2APIC |
114 | /* | 113 | /* |
@@ -166,7 +165,7 @@ static inline u64 native_x2apic_icr_read(void) | |||
166 | return val; | 165 | return val; |
167 | } | 166 | } |
168 | 167 | ||
169 | extern int x2apic, x2apic_phys; | 168 | extern int x2apic_phys; |
170 | extern void check_x2apic(void); | 169 | extern void check_x2apic(void); |
171 | extern void enable_x2apic(void); | 170 | extern void enable_x2apic(void); |
172 | extern void x2apic_icr_write(u32 low, u32 id); | 171 | extern void x2apic_icr_write(u32 low, u32 id); |
@@ -182,6 +181,8 @@ static inline int x2apic_enabled(void) | |||
182 | return 1; | 181 | return 1; |
183 | return 0; | 182 | return 0; |
184 | } | 183 | } |
184 | |||
185 | #define x2apic_supported() (cpu_has_x2apic) | ||
185 | #else | 186 | #else |
186 | static inline void check_x2apic(void) | 187 | static inline void check_x2apic(void) |
187 | { | 188 | { |
@@ -194,9 +195,8 @@ static inline int x2apic_enabled(void) | |||
194 | return 0; | 195 | return 0; |
195 | } | 196 | } |
196 | 197 | ||
197 | #define x2apic 0 | ||
198 | #define x2apic_preenabled 0 | 198 | #define x2apic_preenabled 0 |
199 | 199 | #define x2apic_supported() 0 | |
200 | #endif | 200 | #endif |
201 | 201 | ||
202 | extern void enable_IR_x2apic(void); | 202 | extern void enable_IR_x2apic(void); |