diff options
author | Han, Weidong <weidong.han@intel.com> | 2009-04-03 05:15:50 -0400 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-04-04 05:42:28 -0400 |
commit | d0b03bd1c6725a3463290d7f9626e4b583518a5a (patch) | |
tree | ce4ef17315c5435a8a77cd8fdb47e17193093349 /arch/x86/include/asm/apic.h | |
parent | 34aaaa948e3c9dd65b27fa499c5c9e8d8f1227cf (diff) |
x2apic/intr-remap: decouple interrupt remapping from x2apic
interrupt remapping must be enabled before enabling x2apic, but
interrupt remapping doesn't depend on x2apic, it can be used
separately. Enable interrupt remapping in init_dmars even x2apic
is not supported.
[dwmw2: Update Kconfig accordingly, fix build with INTR_REMAP && !X2APIC]
Signed-off-by: Weidong Han <weidong.han@intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/x86/include/asm/apic.h')
-rw-r--r-- | arch/x86/include/asm/apic.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index f9f0866ed6f8..42f2f8377422 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -107,11 +107,10 @@ extern u32 native_safe_apic_wait_icr_idle(void); | |||
107 | extern void native_apic_icr_write(u32 low, u32 id); | 107 | extern void native_apic_icr_write(u32 low, u32 id); |
108 | extern u64 native_apic_icr_read(void); | 108 | extern u64 native_apic_icr_read(void); |
109 | 109 | ||
110 | #ifdef CONFIG_X86_X2APIC | ||
111 | |||
112 | #define EIM_8BIT_APIC_ID 0 | 110 | #define EIM_8BIT_APIC_ID 0 |
113 | #define EIM_32BIT_APIC_ID 1 | 111 | #define EIM_32BIT_APIC_ID 1 |
114 | 112 | ||
113 | #ifdef CONFIG_X86_X2APIC | ||
115 | /* | 114 | /* |
116 | * Make previous memory operations globally visible before | 115 | * Make previous memory operations globally visible before |
117 | * sending the IPI through x2apic wrmsr. We need a serializing instruction or | 116 | * sending the IPI through x2apic wrmsr. We need a serializing instruction or |