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authorHuang Ying <ying.huang@intel.com>2009-01-09 00:49:30 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2009-02-18 03:48:04 -0500
commit109568e110ed67d4be1b28609b9fa00fca97f8eb (patch)
treef40a1c6a35bb45abf7edcf8ab55ed75af6d405fb /arch/x86/crypto
parent8eb2dfac41c71701bb741f496f0cb7b7e4a3c3f6 (diff)
crypto: aes - Move key_length in struct crypto_aes_ctx to be the last field
The Intel AES-NI AES acceleration instructions need key_enc, key_dec in struct crypto_aes_ctx to be 16 byte aligned, it make this easier to move key_length to be the last one. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/x86/crypto')
-rw-r--r--arch/x86/crypto/aes-i586-asm_32.S6
-rw-r--r--arch/x86/crypto/aes-x86_64-asm_64.S4
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/crypto/aes-i586-asm_32.S b/arch/x86/crypto/aes-i586-asm_32.S
index e41b147f4509..5252c3880177 100644
--- a/arch/x86/crypto/aes-i586-asm_32.S
+++ b/arch/x86/crypto/aes-i586-asm_32.S
@@ -46,9 +46,9 @@
46#define in_blk 16 46#define in_blk 16
47 47
48/* offsets in crypto_tfm structure */ 48/* offsets in crypto_tfm structure */
49#define klen (crypto_tfm_ctx_offset + 0) 49#define klen (crypto_tfm_ctx_offset + 480)
50#define ekey (crypto_tfm_ctx_offset + 4) 50#define ekey (crypto_tfm_ctx_offset + 0)
51#define dkey (crypto_tfm_ctx_offset + 244) 51#define dkey (crypto_tfm_ctx_offset + 240)
52 52
53// register mapping for encrypt and decrypt subroutines 53// register mapping for encrypt and decrypt subroutines
54 54
diff --git a/arch/x86/crypto/aes-x86_64-asm_64.S b/arch/x86/crypto/aes-x86_64-asm_64.S
index a120f526c3df..7f28f62737de 100644
--- a/arch/x86/crypto/aes-x86_64-asm_64.S
+++ b/arch/x86/crypto/aes-x86_64-asm_64.S
@@ -56,13 +56,13 @@
56 .align 8; \ 56 .align 8; \
57FUNC: movq r1,r2; \ 57FUNC: movq r1,r2; \
58 movq r3,r4; \ 58 movq r3,r4; \
59 leaq BASE+KEY+48+4(r8),r9; \ 59 leaq BASE+KEY+48(r8),r9; \
60 movq r10,r11; \ 60 movq r10,r11; \
61 movl (r7),r5 ## E; \ 61 movl (r7),r5 ## E; \
62 movl 4(r7),r1 ## E; \ 62 movl 4(r7),r1 ## E; \
63 movl 8(r7),r6 ## E; \ 63 movl 8(r7),r6 ## E; \
64 movl 12(r7),r7 ## E; \ 64 movl 12(r7),r7 ## E; \
65 movl BASE+0(r8),r10 ## E; \ 65 movl BASE+480(r8),r10 ## E; \
66 xorl -48(r9),r5 ## E; \ 66 xorl -48(r9),r5 ## E; \
67 xorl -44(r9),r1 ## E; \ 67 xorl -44(r9),r1 ## E; \
68 xorl -40(r9),r6 ## E; \ 68 xorl -40(r9),r6 ## E; \