diff options
author | H. Peter Anvin <hpa@zytor.com> | 2008-06-30 18:42:47 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-07-01 04:53:29 -0400 |
commit | 2ee2394b682c0ee99b0f083abe6c57727e6edb69 (patch) | |
tree | 7ff33c81815193ffce2133060cbad1365aea819d /arch/x86/boot/pmjump.S | |
parent | 908ec7afacfdc83dc10938ed1d3c38b3526034ec (diff) |
x86: fix regression: boot failure on AMD Elan TS-5500
Jeremy Fitzhardinge wrote:
>
> Maybe it really does require the far jump immediately after setting PE
> in cr0...
>
> Hm, I don't remember this paragraph being in vol 3a, section 8.9.1
> before. Is it a recent addition?
>
> Random failures can occur if other instructions exist between steps
> 3 and 4 above. Failures will be readily seen in some situations,
> such as when instructions that reference memory are inserted between
> steps 3 and 4 while in system management mode.
>
I don't remember that, either.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/boot/pmjump.S')
-rw-r--r-- | arch/x86/boot/pmjump.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S index ab049d40a884..141b6e20ed31 100644 --- a/arch/x86/boot/pmjump.S +++ b/arch/x86/boot/pmjump.S | |||
@@ -33,6 +33,8 @@ protected_mode_jump: | |||
33 | movw %cs, %bx | 33 | movw %cs, %bx |
34 | shll $4, %ebx | 34 | shll $4, %ebx |
35 | addl %ebx, 2f | 35 | addl %ebx, 2f |
36 | jmp 1f # Short jump to serialize on 386/486 | ||
37 | 1: | ||
36 | 38 | ||
37 | movw $__BOOT_DS, %cx | 39 | movw $__BOOT_DS, %cx |
38 | movw $__BOOT_TSS, %di | 40 | movw $__BOOT_TSS, %di |
@@ -40,8 +42,6 @@ protected_mode_jump: | |||
40 | movl %cr0, %edx | 42 | movl %cr0, %edx |
41 | orb $X86_CR0_PE, %dl # Protected mode | 43 | orb $X86_CR0_PE, %dl # Protected mode |
42 | movl %edx, %cr0 | 44 | movl %edx, %cr0 |
43 | jmp 1f # Short jump to serialize on 386/486 | ||
44 | 1: | ||
45 | 45 | ||
46 | # Transition to 32-bit mode | 46 | # Transition to 32-bit mode |
47 | .byte 0x66, 0xea # ljmpl opcode | 47 | .byte 0x66, 0xea # ljmpl opcode |