Merge branch 'x86/apic' into perfcounters/core

Conflicts:
	arch/x86/kernel/cpu/perfctr-watchdog.c

1 files changed, 16 insertions, 0 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f2d0d24c0b68..8780ffde6eff 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -235,6 +235,20 @@ config SMP
 
           If you don't know what to do here, say N.
 
+config X86_X2APIC
+        bool "Support x2apic"
+        depends on X86_LOCAL_APIC && X86_64
+        ---help---
+          This enables x2apic support on CPUs that have this feature.
+
+          This allows 32-bit apic IDs (so it can support very large systems),
+          and accesses the local apic via MSRs not via mmio.
+
+          ( On certain CPU models you may need to enable INTR_REMAP too,
+            to get functional x2apic mode. )
+
+          If you don't know what to do here, say N.
+
 config SPARSE_IRQ
         bool "Support sparse irq numbering"
         depends on PCI_MSI || HT_IRQ
@@ -302,6 +316,7 @@ config X86_UV
         bool "SGI Ultraviolet"
         depends on X86_64
         depends on X86_EXTENDED_PLATFORM
+        select X86_X2APIC
         ---help---
           This option is needed in order to support SGI Ultraviolet systems.
           If you don't have one of these, you should say N here.
@@ -1829,6 +1844,7 @@ config DMAR_FLOPPY_WA
 config INTR_REMAP
         bool "Support for Interrupt Remapping (EXPERIMENTAL)"
         depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
+        select X86_X2APIC
         ---help---
           Supports Interrupt remapping for IO-APIC and MSI devices.
           To use x2apic mode in the CPU's which support x2APIC enhancements or