PCI: read memory ranges out of Broadcom CNB20LE host bridge

Read the memory ranges behind the Broadcom CNB20LE host bridge out of the
hardware. This allows PCI hotplugging to work, since we know which memory
range to allocate PCI BAR's from.

The x86 PCI code automatically prefers the ACPI _CRS information when it is
available. In that case, this information is not used.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

1 files changed, 8 insertions, 0 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9458685902bd..677b87d60a36 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1931,6 +1931,14 @@ config PCI_MMCONFIG
         bool "Support mmconfig PCI config space access"
         depends on X86_64 && PCI && ACPI
 
+config PCI_CNB20LE_QUIRK
+        bool "Read CNB20LE Host Bridge Windows"
+        depends on PCI
+        help
+          Read the PCI windows out of the CNB20LE host bridge. This allows
+          PCI hotplug to work on systems with the CNB20LE chipset which do
+          not have ACPI.
+
 config DMAR
         bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
         depends on PCI_MSI && ACPI && EXPERIMENTAL