diff options
author | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-01-15 05:19:35 -0500 |
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committer | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-03-16 21:19:10 -0400 |
commit | 752bcb4d02ccfd5e7a8d810424154169b4cca8ae (patch) | |
tree | d435061fe9405f70d51aef55392062460515ca30 /arch/unicore32/include | |
parent | 02b2ee16cc31df2b23d6f6c68a597d947f6c10e8 (diff) |
unicore32 core architecture: interrupts ang gpio handling
This patch implements interrupts and gpio handling.
UniCore32 has 9 gpio interrupt sources.
And gpio device operations are also here.
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Diffstat (limited to 'arch/unicore32/include')
-rw-r--r-- | arch/unicore32/include/asm/gpio.h | 103 | ||||
-rw-r--r-- | arch/unicore32/include/asm/irq.h | 107 | ||||
-rw-r--r-- | arch/unicore32/include/asm/irqflags.h | 53 |
3 files changed, 263 insertions, 0 deletions
diff --git a/arch/unicore32/include/asm/gpio.h b/arch/unicore32/include/asm/gpio.h new file mode 100644 index 000000000000..3aaa41e9e413 --- /dev/null +++ b/arch/unicore32/include/asm/gpio.h | |||
@@ -0,0 +1,103 @@ | |||
1 | /* | ||
2 | * linux/arch/unicore32/include/asm/gpio.h | ||
3 | * | ||
4 | * Code specific to PKUnity SoC and UniCore ISA | ||
5 | * | ||
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __UNICORE_GPIO_H__ | ||
14 | #define __UNICORE_GPIO_H__ | ||
15 | |||
16 | #include <asm/irq.h> | ||
17 | #include <mach/hardware.h> | ||
18 | #include <asm-generic/gpio.h> | ||
19 | |||
20 | #define GPI_OTP_INT 0 | ||
21 | #define GPI_PCI_INTA 1 | ||
22 | #define GPI_PCI_INTB 2 | ||
23 | #define GPI_PCI_INTC 3 | ||
24 | #define GPI_PCI_INTD 4 | ||
25 | #define GPI_BAT_DET 5 | ||
26 | #define GPI_SD_CD 6 | ||
27 | #define GPI_SOFF_REQ 7 | ||
28 | #define GPI_SD_WP 8 | ||
29 | #define GPI_LCD_CASE_OFF 9 | ||
30 | #define GPO_WIFI_EN 10 | ||
31 | #define GPO_HDD_LED 11 | ||
32 | #define GPO_VGA_EN 12 | ||
33 | #define GPO_LCD_EN 13 | ||
34 | #define GPO_LED_DATA 14 | ||
35 | #define GPO_LED_CLK 15 | ||
36 | #define GPO_CAM_PWR_EN 16 | ||
37 | #define GPO_LCD_VCC_EN 17 | ||
38 | #define GPO_SOFT_OFF 18 | ||
39 | #define GPO_BT_EN 19 | ||
40 | #define GPO_FAN_ON 20 | ||
41 | #define GPO_SPKR 21 | ||
42 | #define GPO_SET_V1 23 | ||
43 | #define GPO_SET_V2 24 | ||
44 | #define GPO_CPU_HEALTH 25 | ||
45 | #define GPO_LAN_SEL 26 | ||
46 | |||
47 | #ifdef CONFIG_PUV3_NB0916 | ||
48 | #define GPI_BTN_TOUCH 14 | ||
49 | #define GPIO_IN 0x000043ff /* 1 for input */ | ||
50 | #define GPIO_OUT 0x0fffbc00 /* 1 for output */ | ||
51 | #endif /* CONFIG_PUV3_NB0916 */ | ||
52 | |||
53 | #ifdef CONFIG_PUV3_SMW0919 | ||
54 | #define GPIO_IN 0x000003ff /* 1 for input */ | ||
55 | #define GPIO_OUT 0x0ffffc00 /* 1 for output */ | ||
56 | #endif /* CONFIG_PUV3_SMW0919 */ | ||
57 | |||
58 | #ifdef CONFIG_PUV3_DB0913 | ||
59 | #define GPIO_IN 0x000001df /* 1 for input */ | ||
60 | #define GPIO_OUT 0x03fee800 /* 1 for output */ | ||
61 | #endif /* CONFIG_PUV3_DB0913 */ | ||
62 | |||
63 | #define GPIO_DIR (~((GPIO_IN) | 0xf0000000)) | ||
64 | /* 0 input, 1 output */ | ||
65 | |||
66 | static inline int gpio_get_value(unsigned gpio) | ||
67 | { | ||
68 | if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX)) | ||
69 | return GPIO_GPLR & GPIO_GPIO(gpio); | ||
70 | else | ||
71 | return __gpio_get_value(gpio); | ||
72 | } | ||
73 | |||
74 | static inline void gpio_set_value(unsigned gpio, int value) | ||
75 | { | ||
76 | if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX)) | ||
77 | if (value) | ||
78 | GPIO_GPSR = GPIO_GPIO(gpio); | ||
79 | else | ||
80 | GPIO_GPCR = GPIO_GPIO(gpio); | ||
81 | else | ||
82 | __gpio_set_value(gpio, value); | ||
83 | } | ||
84 | |||
85 | #define gpio_cansleep __gpio_cansleep | ||
86 | |||
87 | static inline unsigned gpio_to_irq(unsigned gpio) | ||
88 | { | ||
89 | if ((gpio < IRQ_GPIOHIGH) && (FIELD(1, 1, gpio) & GPIO_GPIR)) | ||
90 | return IRQ_GPIOLOW0 + gpio; | ||
91 | else | ||
92 | return IRQ_GPIO0 + gpio; | ||
93 | } | ||
94 | |||
95 | static inline unsigned irq_to_gpio(unsigned irq) | ||
96 | { | ||
97 | if (irq < IRQ_GPIOHIGH) | ||
98 | return irq - IRQ_GPIOLOW0; | ||
99 | else | ||
100 | return irq - IRQ_GPIO0; | ||
101 | } | ||
102 | |||
103 | #endif /* __UNICORE_GPIO_H__ */ | ||
diff --git a/arch/unicore32/include/asm/irq.h b/arch/unicore32/include/asm/irq.h new file mode 100644 index 000000000000..ade8bb87111d --- /dev/null +++ b/arch/unicore32/include/asm/irq.h | |||
@@ -0,0 +1,107 @@ | |||
1 | /* | ||
2 | * linux/arch/unicore32/include/asm/irq.h | ||
3 | * | ||
4 | * Code specific to PKUnity SoC and UniCore ISA | ||
5 | * | ||
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #ifndef __UNICORE_IRQ_H__ | ||
13 | #define __UNICORE_IRQ_H__ | ||
14 | |||
15 | #include <asm-generic/irq.h> | ||
16 | |||
17 | #define IRQ_GPIOLOW0 0x00 | ||
18 | #define IRQ_GPIOLOW1 0x01 | ||
19 | #define IRQ_GPIOLOW2 0x02 | ||
20 | #define IRQ_GPIOLOW3 0x03 | ||
21 | #define IRQ_GPIOLOW4 0x04 | ||
22 | #define IRQ_GPIOLOW5 0x05 | ||
23 | #define IRQ_GPIOLOW6 0x06 | ||
24 | #define IRQ_GPIOLOW7 0x07 | ||
25 | #define IRQ_GPIOHIGH 0x08 | ||
26 | #define IRQ_USB 0x09 | ||
27 | #define IRQ_SDC 0x0a | ||
28 | #define IRQ_AC97 0x0b | ||
29 | #define IRQ_SATA 0x0c | ||
30 | #define IRQ_MME 0x0d | ||
31 | #define IRQ_PCI_BRIDGE 0x0e | ||
32 | #define IRQ_DDR 0x0f | ||
33 | #define IRQ_SPI 0x10 | ||
34 | #define IRQ_UNIGFX 0x11 | ||
35 | #define IRQ_I2C 0x11 | ||
36 | #define IRQ_UART1 0x12 | ||
37 | #define IRQ_UART0 0x13 | ||
38 | #define IRQ_UMAL 0x14 | ||
39 | #define IRQ_NAND 0x15 | ||
40 | #define IRQ_PS2_KBD 0x16 | ||
41 | #define IRQ_PS2_AUX 0x17 | ||
42 | #define IRQ_DMA 0x18 | ||
43 | #define IRQ_DMAERR 0x19 | ||
44 | #define IRQ_TIMER0 0x1a | ||
45 | #define IRQ_TIMER1 0x1b | ||
46 | #define IRQ_TIMER2 0x1c | ||
47 | #define IRQ_TIMER3 0x1d | ||
48 | #define IRQ_RTC 0x1e | ||
49 | #define IRQ_RTCAlarm 0x1f | ||
50 | |||
51 | #define IRQ_GPIO0 0x20 | ||
52 | #define IRQ_GPIO1 0x21 | ||
53 | #define IRQ_GPIO2 0x22 | ||
54 | #define IRQ_GPIO3 0x23 | ||
55 | #define IRQ_GPIO4 0x24 | ||
56 | #define IRQ_GPIO5 0x25 | ||
57 | #define IRQ_GPIO6 0x26 | ||
58 | #define IRQ_GPIO7 0x27 | ||
59 | #define IRQ_GPIO8 0x28 | ||
60 | #define IRQ_GPIO9 0x29 | ||
61 | #define IRQ_GPIO10 0x2a | ||
62 | #define IRQ_GPIO11 0x2b | ||
63 | #define IRQ_GPIO12 0x2c | ||
64 | #define IRQ_GPIO13 0x2d | ||
65 | #define IRQ_GPIO14 0x2e | ||
66 | #define IRQ_GPIO15 0x2f | ||
67 | #define IRQ_GPIO16 0x30 | ||
68 | #define IRQ_GPIO17 0x31 | ||
69 | #define IRQ_GPIO18 0x32 | ||
70 | #define IRQ_GPIO19 0x33 | ||
71 | #define IRQ_GPIO20 0x34 | ||
72 | #define IRQ_GPIO21 0x35 | ||
73 | #define IRQ_GPIO22 0x36 | ||
74 | #define IRQ_GPIO23 0x37 | ||
75 | #define IRQ_GPIO24 0x38 | ||
76 | #define IRQ_GPIO25 0x39 | ||
77 | #define IRQ_GPIO26 0x3a | ||
78 | #define IRQ_GPIO27 0x3b | ||
79 | |||
80 | #ifdef CONFIG_ARCH_FPGA | ||
81 | #define IRQ_PCIINTA IRQ_GPIOLOW2 | ||
82 | #define IRQ_PCIINTB IRQ_GPIOLOW1 | ||
83 | #define IRQ_PCIINTC IRQ_GPIOLOW0 | ||
84 | #define IRQ_PCIINTD IRQ_GPIOLOW6 | ||
85 | #endif | ||
86 | |||
87 | #if defined(CONFIG_PUV3_DB0913) || defined(CONFIG_PUV3_NB0916) \ | ||
88 | || defined(CONFIG_PUV3_SMW0919) | ||
89 | #define IRQ_PCIINTA IRQ_GPIOLOW1 | ||
90 | #define IRQ_PCIINTB IRQ_GPIOLOW2 | ||
91 | #define IRQ_PCIINTC IRQ_GPIOLOW3 | ||
92 | #define IRQ_PCIINTD IRQ_GPIOLOW4 | ||
93 | #endif | ||
94 | |||
95 | #define IRQ_SD_CD IRQ_GPIO6 /* falling or rising trigger */ | ||
96 | |||
97 | #ifndef __ASSEMBLY__ | ||
98 | struct irqaction; | ||
99 | struct pt_regs; | ||
100 | extern void migrate_irqs(void); | ||
101 | |||
102 | extern void asm_do_IRQ(unsigned int, struct pt_regs *); | ||
103 | |||
104 | #endif | ||
105 | |||
106 | #endif | ||
107 | |||
diff --git a/arch/unicore32/include/asm/irqflags.h b/arch/unicore32/include/asm/irqflags.h new file mode 100644 index 000000000000..6d8a28dfdbae --- /dev/null +++ b/arch/unicore32/include/asm/irqflags.h | |||
@@ -0,0 +1,53 @@ | |||
1 | /* | ||
2 | * linux/arch/unicore32/include/asm/irqflags.h | ||
3 | * | ||
4 | * Code specific to PKUnity SoC and UniCore ISA | ||
5 | * | ||
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #ifndef __UNICORE_IRQFLAGS_H__ | ||
13 | #define __UNICORE_IRQFLAGS_H__ | ||
14 | |||
15 | #ifdef __KERNEL__ | ||
16 | |||
17 | #include <asm/ptrace.h> | ||
18 | |||
19 | #define ARCH_IRQ_DISABLED (PRIV_MODE | PSR_I_BIT) | ||
20 | #define ARCH_IRQ_ENABLED (PRIV_MODE) | ||
21 | |||
22 | /* | ||
23 | * Save the current interrupt enable state. | ||
24 | */ | ||
25 | static inline unsigned long arch_local_save_flags(void) | ||
26 | { | ||
27 | unsigned long temp; | ||
28 | |||
29 | asm volatile("mov %0, asr" : "=r" (temp) : : "memory", "cc"); | ||
30 | |||
31 | return temp & PSR_c; | ||
32 | } | ||
33 | |||
34 | /* | ||
35 | * restore saved IRQ state | ||
36 | */ | ||
37 | static inline void arch_local_irq_restore(unsigned long flags) | ||
38 | { | ||
39 | unsigned long temp; | ||
40 | |||
41 | asm volatile( | ||
42 | "mov %0, asr\n" | ||
43 | "mov.a asr, %1\n" | ||
44 | "mov.f asr, %0" | ||
45 | : "=&r" (temp) | ||
46 | : "r" (flags) | ||
47 | : "memory", "cc"); | ||
48 | } | ||
49 | |||
50 | #include <asm-generic/irqflags.h> | ||
51 | |||
52 | #endif | ||
53 | #endif | ||