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authorPeter Zijlstra <peterz@infradead.org>2014-03-13 14:00:35 -0400
committerIngo Molnar <mingo@kernel.org>2014-04-18 08:20:45 -0400
commitce3609f93445846f7b5a5b4bacb236a9bdc35216 (patch)
tree89b4eb5b7ae0b9e0dd8b003b481f1a253a1dd0fd /arch/tile
parent56d3648948c202e8b89cd786a004c451a3eb264f (diff)
arch,tile: Convert smp_mb__*()
Implement the new smp_mb__* ops as per the old ones. Signed-off-by: Peter Zijlstra <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/n/tip-euuabnf5a3u23fy4fq8m3jcg@git.kernel.org Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Chen Gang <gang.chen@asianux.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/tile')
-rw-r--r--arch/tile/include/asm/atomic_32.h10
-rw-r--r--arch/tile/include/asm/atomic_64.h6
-rw-r--r--arch/tile/include/asm/barrier.h14
-rw-r--r--arch/tile/include/asm/bitops.h1
-rw-r--r--arch/tile/include/asm/bitops_32.h8
-rw-r--r--arch/tile/include/asm/bitops_64.h4
6 files changed, 17 insertions, 26 deletions
diff --git a/arch/tile/include/asm/atomic_32.h b/arch/tile/include/asm/atomic_32.h
index 1ad4a1f7d42b..1b109fad9fff 100644
--- a/arch/tile/include/asm/atomic_32.h
+++ b/arch/tile/include/asm/atomic_32.h
@@ -169,16 +169,6 @@ static inline void atomic64_set(atomic64_t *v, long long n)
169#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) 169#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
170#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) 170#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
171 171
172/*
173 * We need to barrier before modifying the word, since the _atomic_xxx()
174 * routines just tns the lock and then read/modify/write of the word.
175 * But after the word is updated, the routine issues an "mf" before returning,
176 * and since it's a function call, we don't even need a compiler barrier.
177 */
178#define smp_mb__before_atomic_dec() smp_mb()
179#define smp_mb__before_atomic_inc() smp_mb()
180#define smp_mb__after_atomic_dec() do { } while (0)
181#define smp_mb__after_atomic_inc() do { } while (0)
182 172
183#endif /* !__ASSEMBLY__ */ 173#endif /* !__ASSEMBLY__ */
184 174
diff --git a/arch/tile/include/asm/atomic_64.h b/arch/tile/include/asm/atomic_64.h
index ad220eed05fc..7b11c5fadd42 100644
--- a/arch/tile/include/asm/atomic_64.h
+++ b/arch/tile/include/asm/atomic_64.h
@@ -105,12 +105,6 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
105 105
106#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 106#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
107 107
108/* Atomic dec and inc don't implement barrier, so provide them if needed. */
109#define smp_mb__before_atomic_dec() smp_mb()
110#define smp_mb__after_atomic_dec() smp_mb()
111#define smp_mb__before_atomic_inc() smp_mb()
112#define smp_mb__after_atomic_inc() smp_mb()
113
114/* Define this to indicate that cmpxchg is an efficient operation. */ 108/* Define this to indicate that cmpxchg is an efficient operation. */
115#define __HAVE_ARCH_CMPXCHG 109#define __HAVE_ARCH_CMPXCHG
116 110
diff --git a/arch/tile/include/asm/barrier.h b/arch/tile/include/asm/barrier.h
index b5a05d050a8f..96a42ae79f4d 100644
--- a/arch/tile/include/asm/barrier.h
+++ b/arch/tile/include/asm/barrier.h
@@ -72,6 +72,20 @@ mb_incoherent(void)
72#define mb() fast_mb() 72#define mb() fast_mb()
73#define iob() fast_iob() 73#define iob() fast_iob()
74 74
75#ifndef __tilegx__ /* 32 bit */
76/*
77 * We need to barrier before modifying the word, since the _atomic_xxx()
78 * routines just tns the lock and then read/modify/write of the word.
79 * But after the word is updated, the routine issues an "mf" before returning,
80 * and since it's a function call, we don't even need a compiler barrier.
81 */
82#define smp_mb__before_atomic() smp_mb()
83#define smp_mb__after_atomic() do { } while (0)
84#else /* 64 bit */
85#define smp_mb__before_atomic() smp_mb()
86#define smp_mb__after_atomic() smp_mb()
87#endif
88
75#include <asm-generic/barrier.h> 89#include <asm-generic/barrier.h>
76 90
77#endif /* !__ASSEMBLY__ */ 91#endif /* !__ASSEMBLY__ */
diff --git a/arch/tile/include/asm/bitops.h b/arch/tile/include/asm/bitops.h
index d5a206865036..20caa346ac06 100644
--- a/arch/tile/include/asm/bitops.h
+++ b/arch/tile/include/asm/bitops.h
@@ -17,6 +17,7 @@
17#define _ASM_TILE_BITOPS_H 17#define _ASM_TILE_BITOPS_H
18 18
19#include <linux/types.h> 19#include <linux/types.h>
20#include <asm/barrier.h>
20 21
21#ifndef _LINUX_BITOPS_H 22#ifndef _LINUX_BITOPS_H
22#error only <linux/bitops.h> can be included directly 23#error only <linux/bitops.h> can be included directly
diff --git a/arch/tile/include/asm/bitops_32.h b/arch/tile/include/asm/bitops_32.h
index 386865ad2f55..bbf7b666f21d 100644
--- a/arch/tile/include/asm/bitops_32.h
+++ b/arch/tile/include/asm/bitops_32.h
@@ -49,8 +49,8 @@ static inline void set_bit(unsigned nr, volatile unsigned long *addr)
49 * restricted to acting on a single-word quantity. 49 * restricted to acting on a single-word quantity.
50 * 50 *
51 * clear_bit() may not contain a memory barrier, so if it is used for 51 * clear_bit() may not contain a memory barrier, so if it is used for
52 * locking purposes, you should call smp_mb__before_clear_bit() and/or 52 * locking purposes, you should call smp_mb__before_atomic() and/or
53 * smp_mb__after_clear_bit() to ensure changes are visible on other cpus. 53 * smp_mb__after_atomic() to ensure changes are visible on other cpus.
54 */ 54 */
55static inline void clear_bit(unsigned nr, volatile unsigned long *addr) 55static inline void clear_bit(unsigned nr, volatile unsigned long *addr)
56{ 56{
@@ -121,10 +121,6 @@ static inline int test_and_change_bit(unsigned nr,
121 return (_atomic_xor(addr, mask) & mask) != 0; 121 return (_atomic_xor(addr, mask) & mask) != 0;
122} 122}
123 123
124/* See discussion at smp_mb__before_atomic_dec() in <asm/atomic_32.h>. */
125#define smp_mb__before_clear_bit() smp_mb()
126#define smp_mb__after_clear_bit() do {} while (0)
127
128#include <asm-generic/bitops/ext2-atomic.h> 124#include <asm-generic/bitops/ext2-atomic.h>
129 125
130#endif /* _ASM_TILE_BITOPS_32_H */ 126#endif /* _ASM_TILE_BITOPS_32_H */
diff --git a/arch/tile/include/asm/bitops_64.h b/arch/tile/include/asm/bitops_64.h
index ad34cd056085..bb1a29221fcd 100644
--- a/arch/tile/include/asm/bitops_64.h
+++ b/arch/tile/include/asm/bitops_64.h
@@ -32,10 +32,6 @@ static inline void clear_bit(unsigned nr, volatile unsigned long *addr)
32 __insn_fetchand((void *)(addr + nr / BITS_PER_LONG), ~mask); 32 __insn_fetchand((void *)(addr + nr / BITS_PER_LONG), ~mask);
33} 33}
34 34
35#define smp_mb__before_clear_bit() smp_mb()
36#define smp_mb__after_clear_bit() smp_mb()
37
38
39static inline void change_bit(unsigned nr, volatile unsigned long *addr) 35static inline void change_bit(unsigned nr, volatile unsigned long *addr)
40{ 36{
41 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); 37 unsigned long mask = (1UL << (nr % BITS_PER_LONG));