diff options
author | Chris Metcalf <cmetcalf@tilera.com> | 2010-10-14 16:00:11 -0400 |
---|---|---|
committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-10-15 15:36:54 -0400 |
commit | bf65e440e8248f22b2eacf8d47961bb9d52260f7 (patch) | |
tree | 49189dfa1bc90732caedc1e872baed9fb360adf0 /arch/tile/kernel | |
parent | 4fe938c5134fce1f25e1261eef6252fb47634962 (diff) |
arch/tile: add Tilera's <arch/sim.h> header as an open-source header
This change adds one of the Tilera standard <arch> headers to the set
of headers shipped with Linux. The <arch/sim.h> header provides
methods for programmatically interacting with the Tilera simulator.
The current <arch/sim.h> provides inline assembly for the _sim_syscall
function, so the declaration and definition previously provided
manually in Linux are no longer needed. We now use the standard
sim_validate_lines_evicted() method from <arch/sim.h> rather than
rolling our own direct call to sim_syscall().
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel')
-rw-r--r-- | arch/tile/kernel/entry.S | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/tile/kernel/entry.S b/arch/tile/kernel/entry.S index 3d01383b1b0e..80d13f013bb2 100644 --- a/arch/tile/kernel/entry.S +++ b/arch/tile/kernel/entry.S | |||
@@ -25,28 +25,6 @@ STD_ENTRY(current_text_addr) | |||
25 | { move r0, lr; jrp lr } | 25 | { move r0, lr; jrp lr } |
26 | STD_ENDPROC(current_text_addr) | 26 | STD_ENDPROC(current_text_addr) |
27 | 27 | ||
28 | STD_ENTRY(_sim_syscall) | ||
29 | /* | ||
30 | * Wait for r0-r9 to be ready (and lr on the off chance we | ||
31 | * want the syscall to locate its caller), then make a magic | ||
32 | * simulator syscall. | ||
33 | * | ||
34 | * We carefully stall until the registers are readable in case they | ||
35 | * are the target of a slow load, etc. so that tile-sim will | ||
36 | * definitely be able to read all of them inside the magic syscall. | ||
37 | * | ||
38 | * Technically this is wrong for r3-r9 and lr, since an interrupt | ||
39 | * could come in and restore the registers with a slow load right | ||
40 | * before executing the mtspr. We may need to modify tile-sim to | ||
41 | * explicitly stall for this case, but we do not yet have | ||
42 | * a way to implement such a stall. | ||
43 | */ | ||
44 | { and zero, lr, r9 ; and zero, r8, r7 } | ||
45 | { and zero, r6, r5 ; and zero, r4, r3 } | ||
46 | { and zero, r2, r1 ; mtspr SIM_CONTROL, r0 } | ||
47 | { jrp lr } | ||
48 | STD_ENDPROC(_sim_syscall) | ||
49 | |||
50 | /* | 28 | /* |
51 | * Implement execve(). The i386 code has a note that forking from kernel | 29 | * Implement execve(). The i386 code has a note that forking from kernel |
52 | * space results in no copy on write until the execve, so we should be | 30 | * space results in no copy on write until the execve, so we should be |