arch/tile: Allow tilegx to build with either 16K or 64K page size

This change introduces new flags for the hv_install_context()
API that passes a page table pointer to the hypervisor.  Clients
can explicitly request 4K, 16K, or 64K small pages when they
install a new context.  In practice, the page size is fixed at
kernel compile time and the same size is always requested every
time a new page table is installed.

The <hv/hypervisor.h> header changes so that it provides more abstract
macros for managing "page" things like PFNs and page tables.  For
example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old
HV_PAGE_SIZE_SMALL.  The various PFN routines have been eliminated and
only PA- or PTFN-based ones remain (since PTFNs are always expressed
in fixed 2KB "page" size).  The page-table management macros are
renamed with a leading underscore and take page-size arguments with
the presumption that clients will use those macros in some single
place to provide the "real" macros they will use themselves.

I happened to notice the old hv_set_caching() API was totally broken
(it assumed 4KB pages) so I changed it so it would nominally work
correctly with other page sizes.

Tag modules with the page size so you can't load a module built with
a conflicting page size.  (And add a test for SMP while we're at it.)

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index bff23f476110..32948e21113a 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -1396,13 +1396,13 @@ void __init setup_per_cpu_areas(void)
                 for (i = 0; i < size; i += PAGE_SIZE, ++pfn, ++pg) {
 
                         /* Update the vmalloc mapping and page home. */
-                        pte_t *ptep =
-                                virt_to_pte(NULL, (unsigned long)ptr + i);
+                        unsigned long addr = (unsigned long)ptr + i;
+                        pte_t *ptep = virt_to_pte(NULL, addr);
                         pte_t pte = *ptep;
                         BUG_ON(pfn != pte_pfn(pte));
                         pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_TILE_L3);
                         pte = set_remote_cache_cpu(pte, cpu);
-                        set_pte(ptep, pte);
+                        set_pte_at(&init_mm, addr, ptep, pte);
 
                         /* Update the lowmem mapping for consistency. */
                         lowmem_va = (unsigned long)pfn_to_kaddr(pfn);
@@ -1415,7 +1415,7 @@ void __init setup_per_cpu_areas(void)
                                 BUG_ON(pte_huge(*ptep));
                         }
                         BUG_ON(pfn != pte_pfn(*ptep));
-                        set_pte(ptep, pte);
+                        set_pte_at(&init_mm, lowmem_va, ptep, pte);
                 }
         }