diff options
| author | Chris Metcalf <cmetcalf@tilera.com> | 2010-10-14 16:23:03 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-10-15 15:38:09 -0400 |
| commit | a78c942df64ef4cf495fd4d8715e48501bd7f8a4 (patch) | |
| tree | fe44212d36e6ca23dbe9f2c633824389216a3d1d /arch/tile/kernel/irq.c | |
| parent | bf65e440e8248f22b2eacf8d47961bb9d52260f7 (diff) | |
arch/tile: parameterize system PLs to support KVM port
While not a port to KVM (yet), this change modifies the kernel
to be able to build either at PL1 or at PL2 with a suitable
config switch. Pushing up this change avoids handling branch
merge issues going forward with the KVM work.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/irq.c')
| -rw-r--r-- | arch/tile/kernel/irq.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c index 596c60086930..394d554f21aa 100644 --- a/arch/tile/kernel/irq.c +++ b/arch/tile/kernel/irq.c | |||
| @@ -61,9 +61,9 @@ static DEFINE_SPINLOCK(available_irqs_lock); | |||
| 61 | 61 | ||
| 62 | #if CHIP_HAS_IPI() | 62 | #if CHIP_HAS_IPI() |
| 63 | /* Use SPRs to manipulate device interrupts. */ | 63 | /* Use SPRs to manipulate device interrupts. */ |
| 64 | #define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_1, irq_mask) | 64 | #define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask) |
| 65 | #define unmask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_RESET_1, irq_mask) | 65 | #define unmask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_RESET_K, irq_mask) |
| 66 | #define clear_irqs(irq_mask) __insn_mtspr(SPR_IPI_EVENT_RESET_1, irq_mask) | 66 | #define clear_irqs(irq_mask) __insn_mtspr(SPR_IPI_EVENT_RESET_K, irq_mask) |
| 67 | #else | 67 | #else |
| 68 | /* Use HV to manipulate device interrupts. */ | 68 | /* Use HV to manipulate device interrupts. */ |
| 69 | #define mask_irqs(irq_mask) hv_disable_intr(irq_mask) | 69 | #define mask_irqs(irq_mask) hv_disable_intr(irq_mask) |
| @@ -89,16 +89,16 @@ void tile_dev_intr(struct pt_regs *regs, int intnum) | |||
| 89 | * masked by a previous interrupt. Then, mask out the ones | 89 | * masked by a previous interrupt. Then, mask out the ones |
| 90 | * we're going to handle. | 90 | * we're going to handle. |
| 91 | */ | 91 | */ |
| 92 | unsigned long masked = __insn_mfspr(SPR_IPI_MASK_1); | 92 | unsigned long masked = __insn_mfspr(SPR_IPI_MASK_K); |
| 93 | original_irqs = __insn_mfspr(SPR_IPI_EVENT_1) & ~masked; | 93 | original_irqs = __insn_mfspr(SPR_IPI_EVENT_K) & ~masked; |
| 94 | __insn_mtspr(SPR_IPI_MASK_SET_1, original_irqs); | 94 | __insn_mtspr(SPR_IPI_MASK_SET_K, original_irqs); |
| 95 | #else | 95 | #else |
| 96 | /* | 96 | /* |
| 97 | * Hypervisor performs the equivalent of the Gx code above and | 97 | * Hypervisor performs the equivalent of the Gx code above and |
| 98 | * then puts the pending interrupt mask into a system save reg | 98 | * then puts the pending interrupt mask into a system save reg |
| 99 | * for us to find. | 99 | * for us to find. |
| 100 | */ | 100 | */ |
| 101 | original_irqs = __insn_mfspr(SPR_SYSTEM_SAVE_1_3); | 101 | original_irqs = __insn_mfspr(SPR_SYSTEM_SAVE_K_3); |
| 102 | #endif | 102 | #endif |
| 103 | remaining_irqs = original_irqs; | 103 | remaining_irqs = original_irqs; |
| 104 | 104 | ||
| @@ -225,7 +225,7 @@ void __cpuinit setup_irq_regs(void) | |||
| 225 | /* Enable interrupt delivery. */ | 225 | /* Enable interrupt delivery. */ |
| 226 | unmask_irqs(~0UL); | 226 | unmask_irqs(~0UL); |
| 227 | #if CHIP_HAS_IPI() | 227 | #if CHIP_HAS_IPI() |
| 228 | raw_local_irq_unmask(INT_IPI_1); | 228 | raw_local_irq_unmask(INT_IPI_K); |
| 229 | #endif | 229 | #endif |
| 230 | } | 230 | } |
| 231 | 231 | ||
