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authorChris Metcalf <cmetcalf@tilera.com>2010-10-14 15:12:55 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-10-14 15:12:55 -0400
commit13c9d5a6309763a494f7c3ed5aa45fb473985fd7 (patch)
treedd1feef325e2ed2f16ea07156155c865996a5367 /arch/tile/include
parentbbacff94d0c38163ef01361de006797c92e69e58 (diff)
arch/tile: properly export __mb_incoherent for modules
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include')
-rw-r--r--arch/tile/include/asm/system.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/tile/include/asm/system.h b/arch/tile/include/asm/system.h
index f749be327ce0..96779c805902 100644
--- a/arch/tile/include/asm/system.h
+++ b/arch/tile/include/asm/system.h
@@ -89,6 +89,10 @@
89#define get_cycles_low() __insn_mfspr(SPR_CYCLE) /* just get all 64 bits */ 89#define get_cycles_low() __insn_mfspr(SPR_CYCLE) /* just get all 64 bits */
90#endif 90#endif
91 91
92#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
93int __mb_incoherent(void); /* Helper routine for mb_incoherent(). */
94#endif
95
92/* Fence to guarantee visibility of stores to incoherent memory. */ 96/* Fence to guarantee visibility of stores to incoherent memory. */
93static inline void 97static inline void
94mb_incoherent(void) 98mb_incoherent(void)
@@ -97,7 +101,6 @@ mb_incoherent(void)
97 101
98#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS() 102#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
99 { 103 {
100 int __mb_incoherent(void);
101#if CHIP_HAS_TILE_WRITE_PENDING() 104#if CHIP_HAS_TILE_WRITE_PENDING()
102 const unsigned long WRITE_TIMEOUT_CYCLES = 400; 105 const unsigned long WRITE_TIMEOUT_CYCLES = 400;
103 unsigned long start = get_cycles_low(); 106 unsigned long start = get_cycles_low();