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authorKurt McAlpine <kurtmcalpine@gmail.com>2014-08-06 16:50:25 -0400
committerChris Metcalf <cmetcalf@tilera.com>2014-10-02 10:19:34 -0400
commit4cde4cc87a19cfe7351e3d0fd87d8a49271781f6 (patch)
tree913acc121968b91d54aa68e01a2ac018b008afba /arch/tile/include
parent3e24765d7722445e3d66b849b941da26ccbae1a3 (diff)
Removed repeated word in comments
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include')
-rw-r--r--arch/tile/include/uapi/arch/sim_def.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/tile/include/uapi/arch/sim_def.h b/arch/tile/include/uapi/arch/sim_def.h
index 4b44a2b6a09a..1c069537ae41 100644
--- a/arch/tile/include/uapi/arch/sim_def.h
+++ b/arch/tile/include/uapi/arch/sim_def.h
@@ -360,19 +360,19 @@
360 * @{ 360 * @{
361 */ 361 */
362 362
363/** Use with with SIM_PROFILER_CHIP_xxx to control the memory controllers. */ 363/** Use with SIM_PROFILER_CHIP_xxx to control the memory controllers. */
364#define SIM_CHIP_MEMCTL 0x001 364#define SIM_CHIP_MEMCTL 0x001
365 365
366/** Use with with SIM_PROFILER_CHIP_xxx to control the XAUI interface. */ 366/** Use with SIM_PROFILER_CHIP_xxx to control the XAUI interface. */
367#define SIM_CHIP_XAUI 0x002 367#define SIM_CHIP_XAUI 0x002
368 368
369/** Use with with SIM_PROFILER_CHIP_xxx to control the PCIe interface. */ 369/** Use with SIM_PROFILER_CHIP_xxx to control the PCIe interface. */
370#define SIM_CHIP_PCIE 0x004 370#define SIM_CHIP_PCIE 0x004
371 371
372/** Use with with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. */ 372/** Use with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. */
373#define SIM_CHIP_MPIPE 0x008 373#define SIM_CHIP_MPIPE 0x008
374 374
375/** Use with with SIM_PROFILER_CHIP_xxx to control the TRIO interface. */ 375/** Use with SIM_PROFILER_CHIP_xxx to control the TRIO interface. */
376#define SIM_CHIP_TRIO 0x010 376#define SIM_CHIP_TRIO 0x010
377 377
378/** Reference all chip devices. */ 378/** Reference all chip devices. */