Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile

Pull tile updates from Chris Metcalf:
 "These changes cover a range of new arch/tile features and
  optimizations.  They've been through LKML review and on linux-next for
  a month or so.  There's also one bug-fix that just missed 3.4, which
  I've marked for stable."

Fixed up trivial conflict in arch/tile/Kconfig (new added tile Kconfig
entries clashing with the generic timer/clockevents changes).

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  tile: default to tilegx_defconfig for ARCH=tile
  tile: fix bug where fls(0) was not returning 0
  arch/tile: mark TILEGX as not EXPERIMENTAL
  tile/mm/fault.c: Port OOM changes to handle_page_fault
  arch/tile: add descriptive text if the kernel reports a bad trap
  arch/tile: allow querying cpu module information from the hypervisor
  arch/tile: fix hardwall for tilegx and generalize for idn and ipi
  arch/tile: support multiple huge page sizes dynamically
  mm: add new arch_make_huge_pte() method for tile support
  arch/tile: support kexec() for tilegx
  arch/tile: support <asm/cachectl.h> header for cacheflush() syscall
  arch/tile: Allow tilegx to build with either 16K or 64K page size
  arch/tile: optimize get_user/put_user and friends
  arch/tile: support building big-endian kernel
  arch/tile: allow building Linux with transparent huge pages enabled
  arch/tile: use interrupt critical sections less

1 files changed, 37 insertions, 6 deletions

diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 6ad6219fc47e..fe128816c448 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -48,6 +48,14 @@ config NEED_PER_CPU_PAGE_FIRST_CHUNK
 config SYS_SUPPORTS_HUGETLBFS
         def_bool y
 
+# Support for additional huge page sizes besides HPAGE_SIZE.
+# The software support is currently only present in the TILE-Gx
+# hypervisor. TILEPro in any case does not support page sizes
+# larger than the default HPAGE_SIZE.
+config HUGETLB_SUPER_PAGES
+        depends on HUGETLB_PAGE && TILEGX
+        def_bool y
+
 # FIXME: tilegx can implement a more efficient rwsem.
 config RWSEM_GENERIC_SPINLOCK
         def_bool y
@@ -107,16 +115,14 @@ config HVC_TILE
         select HVC_DRIVER
         def_bool y
 
-# Please note: TILE-Gx support is not yet finalized; this is
-# the preliminary support.  TILE-Gx drivers are only provided
-# with the alpha or beta test versions for Tilera customers.
 config TILEGX
-        depends on EXPERIMENTAL
         bool "Building with TILE-Gx (64-bit) compiler and toolchain"
 
+config TILEPRO
+        def_bool !TILEGX
+
 config 64BIT
-        depends on TILEGX
-        def_bool y
+        def_bool TILEGX
 
 config ARCH_DEFCONFIG
         string
@@ -137,6 +143,31 @@ config NR_CPUS
           smaller kernel memory footprint results from using a smaller
           value on chips with fewer tiles.
 
+if TILEGX
+
+choice
+        prompt "Kernel page size"
+        default PAGE_SIZE_64KB
+        help
+          This lets you select the page size of the kernel.  For best
+          performance on memory-intensive applications, a page size of 64KB
+          is recommended.  For workloads involving many small files, many
+          connections, etc., it may be better to select 16KB, which uses
+          memory more efficiently at some cost in TLB performance.
+
+          Note that this option is TILE-Gx specific; currently
+          TILEPro page size is set by rebuilding the hypervisor.
+
+config PAGE_SIZE_16KB
+        bool "16KB"
+
+config PAGE_SIZE_64KB
+        bool "64KB"
+
+endchoice
+
+endif
+
 source "kernel/Kconfig.hz"
 
 config KEXEC