arch/tile: Allow tilegx to build with either 16K or 64K page size

This change introduces new flags for the hv_install_context()
API that passes a page table pointer to the hypervisor.  Clients
can explicitly request 4K, 16K, or 64K small pages when they
install a new context.  In practice, the page size is fixed at
kernel compile time and the same size is always requested every
time a new page table is installed.

The <hv/hypervisor.h> header changes so that it provides more abstract
macros for managing "page" things like PFNs and page tables.  For
example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old
HV_PAGE_SIZE_SMALL.  The various PFN routines have been eliminated and
only PA- or PTFN-based ones remain (since PTFNs are always expressed
in fixed 2KB "page" size).  The page-table management macros are
renamed with a leading underscore and take page-size arguments with
the presumption that clients will use those macros in some single
place to provide the "real" macros they will use themselves.

I happened to notice the old hv_set_caching() API was totally broken
(it assumed 4KB pages) so I changed it so it would nominally work
correctly with other page sizes.

Tag modules with the page size so you can't load a module built with
a conflicting page size.  (And add a test for SMP while we're at it.)

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

1 files changed, 25 insertions, 0 deletions

diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 74239dd77e06..38c3957e0b40 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -139,6 +139,31 @@ config NR_CPUS
           smaller kernel memory footprint results from using a smaller
           value on chips with fewer tiles.
 
+if TILEGX
+
+choice
+        prompt "Kernel page size"
+        default PAGE_SIZE_64KB
+        help
+          This lets you select the page size of the kernel.  For best
+          performance on memory-intensive applications, a page size of 64KB
+          is recommended.  For workloads involving many small files, many
+          connections, etc., it may be better to select 16KB, which uses
+          memory more efficiently at some cost in TLB performance.
+
+          Note that this option is TILE-Gx specific; currently
+          TILEPro page size is set by rebuilding the hypervisor.
+
+config PAGE_SIZE_16KB
+        bool "16KB"
+
+config PAGE_SIZE_64KB
+        bool "64KB"
+
+endchoice
+
+endif
+
 source "kernel/time/Kconfig"
 
 source "kernel/Kconfig.hz"