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authorAllen Pais <allen.pais@oracle.com>2014-09-08 02:18:55 -0400
committerDavid S. Miller <davem@davemloft.net>2014-09-09 18:24:10 -0400
commit408316258521168614bfb4da0e070490d3e65a17 (patch)
tree87e1d682a650817a9624455be9c7725f67f80146 /arch/sparc
parent9bd3ee33f6b97de092610d8dcabc4cb98d99505c (diff)
sparc64: cpu hardware caps support for sparc M6 and M7
Signed-off-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/kernel/setup_64.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 3fdb455e3318..1c7bfdf83b66 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -500,12 +500,16 @@ static void __init init_sparc64_elf_hwcap(void)
500 sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || 500 sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
501 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || 501 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
502 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 || 502 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
503 sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
504 sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
503 sun4v_chip_type == SUN4V_CHIP_SPARC64X) 505 sun4v_chip_type == SUN4V_CHIP_SPARC64X)
504 cap |= HWCAP_SPARC_BLKINIT; 506 cap |= HWCAP_SPARC_BLKINIT;
505 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 || 507 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
506 sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || 508 sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
507 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || 509 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
508 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 || 510 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
511 sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
512 sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
509 sun4v_chip_type == SUN4V_CHIP_SPARC64X) 513 sun4v_chip_type == SUN4V_CHIP_SPARC64X)
510 cap |= HWCAP_SPARC_N2; 514 cap |= HWCAP_SPARC_N2;
511 } 515 }
@@ -533,6 +537,8 @@ static void __init init_sparc64_elf_hwcap(void)
533 sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || 537 sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
534 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || 538 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
535 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 || 539 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
540 sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
541 sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
536 sun4v_chip_type == SUN4V_CHIP_SPARC64X) 542 sun4v_chip_type == SUN4V_CHIP_SPARC64X)
537 cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 | 543 cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
538 AV_SPARC_ASI_BLK_INIT | 544 AV_SPARC_ASI_BLK_INIT |
@@ -540,6 +546,8 @@ static void __init init_sparc64_elf_hwcap(void)
540 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || 546 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
541 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || 547 sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
542 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 || 548 sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
549 sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
550 sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
543 sun4v_chip_type == SUN4V_CHIP_SPARC64X) 551 sun4v_chip_type == SUN4V_CHIP_SPARC64X)
544 cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC | 552 cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
545 AV_SPARC_FMAF); 553 AV_SPARC_FMAF);