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authorFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>2010-06-29 03:38:02 -0400
committerDavid S. Miller <davem@davemloft.net>2010-06-29 03:38:02 -0400
commitf5fa3cb9b790db1c401f4b506d7fcc503771af0d (patch)
tree3eaebf08f675bc807bda78724b028c83de68e152 /arch/sparc
parentc67dda14389205f0a223c5089307495290939b3b (diff)
sparc: remove homegrown L1_CACHE_ALIGN macro
Let's use the standard L1_CACHE_ALIGN macro instead. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/include/asm/cache.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h
index 0588b8c7faa2..69358b590c91 100644
--- a/arch/sparc/include/asm/cache.h
+++ b/arch/sparc/include/asm/cache.h
@@ -11,7 +11,6 @@
11 11
12#define L1_CACHE_SHIFT 5 12#define L1_CACHE_SHIFT 5
13#define L1_CACHE_BYTES 32 13#define L1_CACHE_BYTES 32
14#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)))
15 14
16#ifdef CONFIG_SPARC32 15#ifdef CONFIG_SPARC32
17#define SMP_CACHE_BYTES_SHIFT 5 16#define SMP_CACHE_BYTES_SHIFT 5