diff options
author | Sam Ravnborg <sam@ravnborg.org> | 2014-07-20 07:39:00 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-07-22 00:43:19 -0400 |
commit | 79294d7eff89f65d2e58021bca81437e88fa61e3 (patch) | |
tree | 9f062eb7092c3f5f024fa06e2525a054870e9d81 /arch/sparc | |
parent | 6b8b5507ed921d8fc5dc44f6eed0c14deb401495 (diff) |
sparc64: remove macro indirection in io_64.h
Most likely for historical reasons io_64.h used an
extra layer of macro indirections.
Fix it so we no longer use these indirections.
In the process we loose a cast to the addr argument for in*()/out*()
but all known affected users has already been fixed so
no warnings are triggered.
For each of the IO functions add a proper define like this:
#define inb inb
This is done to make the code compatible with the way these
functions are defined in asm-generic/io.h with the objective
to later introduce the generic io.h for sparc64.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc')
-rw-r--r-- | arch/sparc/include/asm/io_64.h | 155 |
1 files changed, 66 insertions, 89 deletions
diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h index 05381c3a4228..7db75ebca5a9 100644 --- a/arch/sparc/include/asm/io_64.h +++ b/arch/sparc/include/asm/io_64.h | |||
@@ -16,7 +16,8 @@ | |||
16 | /* BIO layer definitions. */ | 16 | /* BIO layer definitions. */ |
17 | extern unsigned long kern_base, kern_size; | 17 | extern unsigned long kern_base, kern_size; |
18 | 18 | ||
19 | static inline u8 _inb(unsigned long addr) | 19 | #define inb inb |
20 | static inline u8 inb(unsigned long addr) | ||
20 | { | 21 | { |
21 | u8 ret; | 22 | u8 ret; |
22 | 23 | ||
@@ -28,7 +29,8 @@ static inline u8 _inb(unsigned long addr) | |||
28 | return ret; | 29 | return ret; |
29 | } | 30 | } |
30 | 31 | ||
31 | static inline u16 _inw(unsigned long addr) | 32 | #define inw inw |
33 | static inline u16 inw(unsigned long addr) | ||
32 | { | 34 | { |
33 | u16 ret; | 35 | u16 ret; |
34 | 36 | ||
@@ -40,7 +42,8 @@ static inline u16 _inw(unsigned long addr) | |||
40 | return ret; | 42 | return ret; |
41 | } | 43 | } |
42 | 44 | ||
43 | static inline u32 _inl(unsigned long addr) | 45 | #define inl inl |
46 | static inline u32 inl(unsigned long addr) | ||
44 | { | 47 | { |
45 | u32 ret; | 48 | u32 ret; |
46 | 49 | ||
@@ -52,7 +55,8 @@ static inline u32 _inl(unsigned long addr) | |||
52 | return ret; | 55 | return ret; |
53 | } | 56 | } |
54 | 57 | ||
55 | static inline void _outb(u8 b, unsigned long addr) | 58 | #define outb outb |
59 | static inline void outb(u8 b, unsigned long addr) | ||
56 | { | 60 | { |
57 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" | 61 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" |
58 | : /* no outputs */ | 62 | : /* no outputs */ |
@@ -60,7 +64,8 @@ static inline void _outb(u8 b, unsigned long addr) | |||
60 | : "memory"); | 64 | : "memory"); |
61 | } | 65 | } |
62 | 66 | ||
63 | static inline void _outw(u16 w, unsigned long addr) | 67 | #define outw outw |
68 | static inline void outw(u16 w, unsigned long addr) | ||
64 | { | 69 | { |
65 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" | 70 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" |
66 | : /* no outputs */ | 71 | : /* no outputs */ |
@@ -68,7 +73,8 @@ static inline void _outw(u16 w, unsigned long addr) | |||
68 | : "memory"); | 73 | : "memory"); |
69 | } | 74 | } |
70 | 75 | ||
71 | static inline void _outl(u32 l, unsigned long addr) | 76 | #define outl outl |
77 | static inline void outl(u32 l, unsigned long addr) | ||
72 | { | 78 | { |
73 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" | 79 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" |
74 | : /* no outputs */ | 80 | : /* no outputs */ |
@@ -76,12 +82,6 @@ static inline void _outl(u32 l, unsigned long addr) | |||
76 | : "memory"); | 82 | : "memory"); |
77 | } | 83 | } |
78 | 84 | ||
79 | #define inb(__addr) (_inb((unsigned long)(__addr))) | ||
80 | #define inw(__addr) (_inw((unsigned long)(__addr))) | ||
81 | #define inl(__addr) (_inl((unsigned long)(__addr))) | ||
82 | #define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr))) | ||
83 | #define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr))) | ||
84 | #define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr))) | ||
85 | 85 | ||
86 | #define inb_p(__addr) inb(__addr) | 86 | #define inb_p(__addr) inb(__addr) |
87 | #define outb_p(__b, __addr) outb(__b, __addr) | 87 | #define outb_p(__b, __addr) outb(__b, __addr) |
@@ -127,7 +127,8 @@ static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned l | |||
127 | } | 127 | } |
128 | 128 | ||
129 | /* Memory functions, same as I/O accesses on Ultra. */ | 129 | /* Memory functions, same as I/O accesses on Ultra. */ |
130 | static inline u8 _readb(const volatile void __iomem *addr) | 130 | #define readb readb |
131 | static inline u8 readb(const volatile void __iomem *addr) | ||
131 | { u8 ret; | 132 | { u8 ret; |
132 | 133 | ||
133 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" | 134 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" |
@@ -137,7 +138,8 @@ static inline u8 _readb(const volatile void __iomem *addr) | |||
137 | return ret; | 138 | return ret; |
138 | } | 139 | } |
139 | 140 | ||
140 | static inline u16 _readw(const volatile void __iomem *addr) | 141 | #define readw readw |
142 | static inline u16 readw(const volatile void __iomem *addr) | ||
141 | { u16 ret; | 143 | { u16 ret; |
142 | 144 | ||
143 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" | 145 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" |
@@ -148,7 +150,8 @@ static inline u16 _readw(const volatile void __iomem *addr) | |||
148 | return ret; | 150 | return ret; |
149 | } | 151 | } |
150 | 152 | ||
151 | static inline u32 _readl(const volatile void __iomem *addr) | 153 | #define readl readl |
154 | static inline u32 readl(const volatile void __iomem *addr) | ||
152 | { u32 ret; | 155 | { u32 ret; |
153 | 156 | ||
154 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" | 157 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" |
@@ -159,7 +162,8 @@ static inline u32 _readl(const volatile void __iomem *addr) | |||
159 | return ret; | 162 | return ret; |
160 | } | 163 | } |
161 | 164 | ||
162 | static inline u64 _readq(const volatile void __iomem *addr) | 165 | #define readq readq |
166 | static inline u64 readq(const volatile void __iomem *addr) | ||
163 | { u64 ret; | 167 | { u64 ret; |
164 | 168 | ||
165 | __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" | 169 | __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" |
@@ -170,7 +174,8 @@ static inline u64 _readq(const volatile void __iomem *addr) | |||
170 | return ret; | 174 | return ret; |
171 | } | 175 | } |
172 | 176 | ||
173 | static inline void _writeb(u8 b, volatile void __iomem *addr) | 177 | #define writeb writeb |
178 | static inline void writeb(u8 b, volatile void __iomem *addr) | ||
174 | { | 179 | { |
175 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" | 180 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" |
176 | : /* no outputs */ | 181 | : /* no outputs */ |
@@ -178,7 +183,8 @@ static inline void _writeb(u8 b, volatile void __iomem *addr) | |||
178 | : "memory"); | 183 | : "memory"); |
179 | } | 184 | } |
180 | 185 | ||
181 | static inline void _writew(u16 w, volatile void __iomem *addr) | 186 | #define writew writew |
187 | static inline void writew(u16 w, volatile void __iomem *addr) | ||
182 | { | 188 | { |
183 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" | 189 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" |
184 | : /* no outputs */ | 190 | : /* no outputs */ |
@@ -186,7 +192,8 @@ static inline void _writew(u16 w, volatile void __iomem *addr) | |||
186 | : "memory"); | 192 | : "memory"); |
187 | } | 193 | } |
188 | 194 | ||
189 | static inline void _writel(u32 l, volatile void __iomem *addr) | 195 | #define writel writel |
196 | static inline void writel(u32 l, volatile void __iomem *addr) | ||
190 | { | 197 | { |
191 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" | 198 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" |
192 | : /* no outputs */ | 199 | : /* no outputs */ |
@@ -194,7 +201,8 @@ static inline void _writel(u32 l, volatile void __iomem *addr) | |||
194 | : "memory"); | 201 | : "memory"); |
195 | } | 202 | } |
196 | 203 | ||
197 | static inline void _writeq(u64 q, volatile void __iomem *addr) | 204 | #define writeq writeq |
205 | static inline void writeq(u64 q, volatile void __iomem *addr) | ||
198 | { | 206 | { |
199 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" | 207 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" |
200 | : /* no outputs */ | 208 | : /* no outputs */ |
@@ -202,21 +210,14 @@ static inline void _writeq(u64 q, volatile void __iomem *addr) | |||
202 | : "memory"); | 210 | : "memory"); |
203 | } | 211 | } |
204 | 212 | ||
205 | #define readb(__addr) _readb(__addr) | 213 | #define readb_relaxed(__addr) readb(__addr) |
206 | #define readw(__addr) _readw(__addr) | 214 | #define readw_relaxed(__addr) readw(__addr) |
207 | #define readl(__addr) _readl(__addr) | 215 | #define readl_relaxed(__addr) readl(__addr) |
208 | #define readq(__addr) _readq(__addr) | 216 | #define readq_relaxed(__addr) readq(__addr) |
209 | #define readb_relaxed(__addr) _readb(__addr) | ||
210 | #define readw_relaxed(__addr) _readw(__addr) | ||
211 | #define readl_relaxed(__addr) _readl(__addr) | ||
212 | #define readq_relaxed(__addr) _readq(__addr) | ||
213 | #define writeb(__b, __addr) _writeb(__b, __addr) | ||
214 | #define writew(__w, __addr) _writew(__w, __addr) | ||
215 | #define writel(__l, __addr) _writel(__l, __addr) | ||
216 | #define writeq(__q, __addr) _writeq(__q, __addr) | ||
217 | 217 | ||
218 | /* Now versions without byte-swapping. */ | 218 | /* Now versions without byte-swapping. */ |
219 | static inline u8 _raw_readb(unsigned long addr) | 219 | #define __raw_readb __raw_readb |
220 | static inline u8 __raw_readb(const volatile void __iomem *addr) | ||
220 | { | 221 | { |
221 | u8 ret; | 222 | u8 ret; |
222 | 223 | ||
@@ -227,7 +228,8 @@ static inline u8 _raw_readb(unsigned long addr) | |||
227 | return ret; | 228 | return ret; |
228 | } | 229 | } |
229 | 230 | ||
230 | static inline u16 _raw_readw(unsigned long addr) | 231 | #define __raw_readw __raw_readw |
232 | static inline u16 __raw_readw(const volatile void __iomem *addr) | ||
231 | { | 233 | { |
232 | u16 ret; | 234 | u16 ret; |
233 | 235 | ||
@@ -238,7 +240,8 @@ static inline u16 _raw_readw(unsigned long addr) | |||
238 | return ret; | 240 | return ret; |
239 | } | 241 | } |
240 | 242 | ||
241 | static inline u32 _raw_readl(unsigned long addr) | 243 | #define __raw_readl __raw_readl |
244 | static inline u32 __raw_readl(const volatile void __iomem *addr) | ||
242 | { | 245 | { |
243 | u32 ret; | 246 | u32 ret; |
244 | 247 | ||
@@ -249,7 +252,8 @@ static inline u32 _raw_readl(unsigned long addr) | |||
249 | return ret; | 252 | return ret; |
250 | } | 253 | } |
251 | 254 | ||
252 | static inline u64 _raw_readq(unsigned long addr) | 255 | #define __raw_readq __raw_readq |
256 | static inline u64 __raw_readq(const volatile void __iomem *addr) | ||
253 | { | 257 | { |
254 | u64 ret; | 258 | u64 ret; |
255 | 259 | ||
@@ -260,42 +264,38 @@ static inline u64 _raw_readq(unsigned long addr) | |||
260 | return ret; | 264 | return ret; |
261 | } | 265 | } |
262 | 266 | ||
263 | static inline void _raw_writeb(u8 b, unsigned long addr) | 267 | #define __raw_writeb __raw_writeb |
268 | static inline void __raw_writeb(u8 b, const volatile void __iomem *addr) | ||
264 | { | 269 | { |
265 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" | 270 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" |
266 | : /* no outputs */ | 271 | : /* no outputs */ |
267 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 272 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
268 | } | 273 | } |
269 | 274 | ||
270 | static inline void _raw_writew(u16 w, unsigned long addr) | 275 | #define __raw_writew __raw_writew |
276 | static inline void __raw_writew(u16 w, const volatile void __iomem *addr) | ||
271 | { | 277 | { |
272 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" | 278 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" |
273 | : /* no outputs */ | 279 | : /* no outputs */ |
274 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 280 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
275 | } | 281 | } |
276 | 282 | ||
277 | static inline void _raw_writel(u32 l, unsigned long addr) | 283 | #define __raw_writel __raw_writel |
284 | static inline void __raw_writel(u32 l, const volatile void __iomem *addr) | ||
278 | { | 285 | { |
279 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" | 286 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" |
280 | : /* no outputs */ | 287 | : /* no outputs */ |
281 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 288 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
282 | } | 289 | } |
283 | 290 | ||
284 | static inline void _raw_writeq(u64 q, unsigned long addr) | 291 | #define __raw_writeq __raw_writeq |
292 | static inline void __raw_writeq(u64 q, const volatile void __iomem *addr) | ||
285 | { | 293 | { |
286 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" | 294 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" |
287 | : /* no outputs */ | 295 | : /* no outputs */ |
288 | : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 296 | : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
289 | } | 297 | } |
290 | 298 | ||
291 | #define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr))) | ||
292 | #define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr))) | ||
293 | #define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr))) | ||
294 | #define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr))) | ||
295 | #define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr))) | ||
296 | #define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr))) | ||
297 | #define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr))) | ||
298 | #define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr))) | ||
299 | 299 | ||
300 | /* Valid I/O Space regions are anywhere, because each PCI bus supported | 300 | /* Valid I/O Space regions are anywhere, because each PCI bus supported |
301 | * can live in an arbitrary area of the physical address range. | 301 | * can live in an arbitrary area of the physical address range. |
@@ -305,7 +305,7 @@ static inline void _raw_writeq(u64 q, unsigned long addr) | |||
305 | /* Now, SBUS variants, only difference from PCI is that we do | 305 | /* Now, SBUS variants, only difference from PCI is that we do |
306 | * not use little-endian ASIs. | 306 | * not use little-endian ASIs. |
307 | */ | 307 | */ |
308 | static inline u8 _sbus_readb(const volatile void __iomem *addr) | 308 | static inline u8 sbus_readb(const volatile void __iomem *addr) |
309 | { | 309 | { |
310 | u8 ret; | 310 | u8 ret; |
311 | 311 | ||
@@ -317,7 +317,7 @@ static inline u8 _sbus_readb(const volatile void __iomem *addr) | |||
317 | return ret; | 317 | return ret; |
318 | } | 318 | } |
319 | 319 | ||
320 | static inline u16 _sbus_readw(const volatile void __iomem *addr) | 320 | static inline u16 sbus_readw(const volatile void __iomem *addr) |
321 | { | 321 | { |
322 | u16 ret; | 322 | u16 ret; |
323 | 323 | ||
@@ -329,7 +329,7 @@ static inline u16 _sbus_readw(const volatile void __iomem *addr) | |||
329 | return ret; | 329 | return ret; |
330 | } | 330 | } |
331 | 331 | ||
332 | static inline u32 _sbus_readl(const volatile void __iomem *addr) | 332 | static inline u32 sbus_readl(const volatile void __iomem *addr) |
333 | { | 333 | { |
334 | u32 ret; | 334 | u32 ret; |
335 | 335 | ||
@@ -341,7 +341,7 @@ static inline u32 _sbus_readl(const volatile void __iomem *addr) | |||
341 | return ret; | 341 | return ret; |
342 | } | 342 | } |
343 | 343 | ||
344 | static inline u64 _sbus_readq(const volatile void __iomem *addr) | 344 | static inline u64 sbus_readq(const volatile void __iomem *addr) |
345 | { | 345 | { |
346 | u64 ret; | 346 | u64 ret; |
347 | 347 | ||
@@ -353,7 +353,7 @@ static inline u64 _sbus_readq(const volatile void __iomem *addr) | |||
353 | return ret; | 353 | return ret; |
354 | } | 354 | } |
355 | 355 | ||
356 | static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) | 356 | static inline void sbus_writeb(u8 b, volatile void __iomem *addr) |
357 | { | 357 | { |
358 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" | 358 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" |
359 | : /* no outputs */ | 359 | : /* no outputs */ |
@@ -361,7 +361,7 @@ static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) | |||
361 | : "memory"); | 361 | : "memory"); |
362 | } | 362 | } |
363 | 363 | ||
364 | static inline void _sbus_writew(u16 w, volatile void __iomem *addr) | 364 | static inline void sbus_writew(u16 w, volatile void __iomem *addr) |
365 | { | 365 | { |
366 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" | 366 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" |
367 | : /* no outputs */ | 367 | : /* no outputs */ |
@@ -369,7 +369,7 @@ static inline void _sbus_writew(u16 w, volatile void __iomem *addr) | |||
369 | : "memory"); | 369 | : "memory"); |
370 | } | 370 | } |
371 | 371 | ||
372 | static inline void _sbus_writel(u32 l, volatile void __iomem *addr) | 372 | static inline void sbus_writel(u32 l, volatile void __iomem *addr) |
373 | { | 373 | { |
374 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" | 374 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" |
375 | : /* no outputs */ | 375 | : /* no outputs */ |
@@ -377,7 +377,7 @@ static inline void _sbus_writel(u32 l, volatile void __iomem *addr) | |||
377 | : "memory"); | 377 | : "memory"); |
378 | } | 378 | } |
379 | 379 | ||
380 | static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) | 380 | static inline void sbus_writeq(u64 l, volatile void __iomem *addr) |
381 | { | 381 | { |
382 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" | 382 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" |
383 | : /* no outputs */ | 383 | : /* no outputs */ |
@@ -385,16 +385,7 @@ static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) | |||
385 | : "memory"); | 385 | : "memory"); |
386 | } | 386 | } |
387 | 387 | ||
388 | #define sbus_readb(__addr) _sbus_readb(__addr) | 388 | static inline void sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) |
389 | #define sbus_readw(__addr) _sbus_readw(__addr) | ||
390 | #define sbus_readl(__addr) _sbus_readl(__addr) | ||
391 | #define sbus_readq(__addr) _sbus_readq(__addr) | ||
392 | #define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) | ||
393 | #define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) | ||
394 | #define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) | ||
395 | #define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr) | ||
396 | |||
397 | static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) | ||
398 | { | 389 | { |
399 | while(n--) { | 390 | while(n--) { |
400 | sbus_writeb(c, dst); | 391 | sbus_writeb(c, dst); |
@@ -402,10 +393,7 @@ static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_s | |||
402 | } | 393 | } |
403 | } | 394 | } |
404 | 395 | ||
405 | #define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz) | 396 | static inline void memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) |
406 | |||
407 | static inline void | ||
408 | _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) | ||
409 | { | 397 | { |
410 | volatile void __iomem *d = dst; | 398 | volatile void __iomem *d = dst; |
411 | 399 | ||
@@ -415,11 +403,8 @@ _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) | |||
415 | } | 403 | } |
416 | } | 404 | } |
417 | 405 | ||
418 | #define memset_io(d,c,sz) _memset_io(d,c,sz) | 406 | static inline void sbus_memcpy_fromio(void *dst, const volatile void __iomem *src, |
419 | 407 | __kernel_size_t n) | |
420 | static inline void | ||
421 | _sbus_memcpy_fromio(void *dst, const volatile void __iomem *src, | ||
422 | __kernel_size_t n) | ||
423 | { | 408 | { |
424 | char *d = dst; | 409 | char *d = dst; |
425 | 410 | ||
@@ -430,10 +415,9 @@ _sbus_memcpy_fromio(void *dst, const volatile void __iomem *src, | |||
430 | } | 415 | } |
431 | } | 416 | } |
432 | 417 | ||
433 | #define sbus_memcpy_fromio(d, s, sz) _sbus_memcpy_fromio(d, s, sz) | ||
434 | 418 | ||
435 | static inline void | 419 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, |
436 | _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) | 420 | __kernel_size_t n) |
437 | { | 421 | { |
438 | char *d = dst; | 422 | char *d = dst; |
439 | 423 | ||
@@ -444,11 +428,8 @@ _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) | |||
444 | } | 428 | } |
445 | } | 429 | } |
446 | 430 | ||
447 | #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) | 431 | static inline void sbus_memcpy_toio(volatile void __iomem *dst, const void *src, |
448 | 432 | __kernel_size_t n) | |
449 | static inline void | ||
450 | _sbus_memcpy_toio(volatile void __iomem *dst, const void *src, | ||
451 | __kernel_size_t n) | ||
452 | { | 433 | { |
453 | const char *s = src; | 434 | const char *s = src; |
454 | volatile void __iomem *d = dst; | 435 | volatile void __iomem *d = dst; |
@@ -460,10 +441,8 @@ _sbus_memcpy_toio(volatile void __iomem *dst, const void *src, | |||
460 | } | 441 | } |
461 | } | 442 | } |
462 | 443 | ||
463 | #define sbus_memcpy_toio(d, s, sz) _sbus_memcpy_toio(d, s, sz) | 444 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, |
464 | 445 | __kernel_size_t n) | |
465 | static inline void | ||
466 | _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) | ||
467 | { | 446 | { |
468 | const char *s = src; | 447 | const char *s = src; |
469 | volatile void __iomem *d = dst; | 448 | volatile void __iomem *d = dst; |
@@ -475,8 +454,6 @@ _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) | |||
475 | } | 454 | } |
476 | } | 455 | } |
477 | 456 | ||
478 | #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) | ||
479 | |||
480 | #define mmiowb() | 457 | #define mmiowb() |
481 | 458 | ||
482 | #ifdef __KERNEL__ | 459 | #ifdef __KERNEL__ |