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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-13 10:00:22 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-13 10:00:22 -0500
commit4de3a8e101150feaefa1139611a50ff37467f33e (patch)
treedaada742542518b02d7db7c5d32e715eaa5f166d /arch/sparc
parent294064f58953f9964e5945424b09c51800330a83 (diff)
parent099469502f62fbe0d7e4f0b83a2f22538367f734 (diff)
Merge branch 'master' into fixes
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/Kconfig4
-rw-r--r--arch/sparc/include/asm/atomic_32.h104
-rw-r--r--arch/sparc/include/asm/io_32.h2
-rw-r--r--arch/sparc/include/asm/io_64.h2
-rw-r--r--arch/sparc/include/asm/page_32.h10
-rw-r--r--arch/sparc/include/asm/pci_32.h5
-rw-r--r--arch/sparc/include/asm/pci_64.h5
-rw-r--r--arch/sparc/include/asm/pgtsun4.h171
-rw-r--r--arch/sparc/include/asm/posix_types.h2
-rw-r--r--arch/sparc/include/asm/signal.h3
-rw-r--r--arch/sparc/include/asm/thread_info_32.h4
-rw-r--r--arch/sparc/include/asm/thread_info_64.h2
-rw-r--r--arch/sparc/include/asm/types.h6
-rw-r--r--arch/sparc/kernel/leon_pci.c25
-rw-r--r--arch/sparc/kernel/pci.c22
-rw-r--r--arch/sparc/kernel/smp_64.c2
-rw-r--r--arch/sparc/kernel/sysfs.c122
-rw-r--r--arch/sparc/lib/atomic_32.S55
-rw-r--r--arch/sparc/lib/iomap.c23
-rw-r--r--arch/sparc/lib/ksyms.c6
20 files changed, 92 insertions, 483 deletions
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 70ae9d81870e..96657992a72e 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -28,9 +28,11 @@ config SPARC
28 select HAVE_GENERIC_HARDIRQS 28 select HAVE_GENERIC_HARDIRQS
29 select GENERIC_IRQ_SHOW 29 select GENERIC_IRQ_SHOW
30 select USE_GENERIC_SMP_HELPERS if SMP 30 select USE_GENERIC_SMP_HELPERS if SMP
31 select GENERIC_PCI_IOMAP
31 32
32config SPARC32 33config SPARC32
33 def_bool !64BIT 34 def_bool !64BIT
35 select GENERIC_ATOMIC64
34 36
35config SPARC64 37config SPARC64
36 def_bool 64BIT 38 def_bool 64BIT
@@ -383,9 +385,7 @@ config SCHED_MC
383 making when dealing with multi-core CPU chips at a cost of slightly 385 making when dealing with multi-core CPU chips at a cost of slightly
384 increased overhead in some places. If unsure say N here. 386 increased overhead in some places. If unsure say N here.
385 387
386if SPARC64
387source "kernel/Kconfig.preempt" 388source "kernel/Kconfig.preempt"
388endif
389 389
390config CMDLINE_BOOL 390config CMDLINE_BOOL
391 bool "Default bootloader kernel arguments" 391 bool "Default bootloader kernel arguments"
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index 5c3c8b69884d..9dd0a769fa18 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -13,7 +13,7 @@
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15 15
16#ifdef __KERNEL__ 16#include <asm-generic/atomic64.h>
17 17
18#include <asm/system.h> 18#include <asm/system.h>
19 19
@@ -52,112 +52,10 @@ extern void atomic_set(atomic_t *, int);
52#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) 52#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
53#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) 53#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
54 54
55
56/* This is the old 24-bit implementation. It's still used internally
57 * by some sparc-specific code, notably the semaphore implementation.
58 */
59typedef struct { volatile int counter; } atomic24_t;
60
61#ifndef CONFIG_SMP
62
63#define ATOMIC24_INIT(i) { (i) }
64#define atomic24_read(v) ((v)->counter)
65#define atomic24_set(v, i) (((v)->counter) = i)
66
67#else
68/* We do the bulk of the actual work out of line in two common
69 * routines in assembler, see arch/sparc/lib/atomic.S for the
70 * "fun" details.
71 *
72 * For SMP the trick is you embed the spin lock byte within
73 * the word, use the low byte so signedness is easily retained
74 * via a quick arithmetic shift. It looks like this:
75 *
76 * ----------------------------------------
77 * | signed 24-bit counter value | lock | atomic_t
78 * ----------------------------------------
79 * 31 8 7 0
80 */
81
82#define ATOMIC24_INIT(i) { ((i) << 8) }
83
84static inline int atomic24_read(const atomic24_t *v)
85{
86 int ret = v->counter;
87
88 while(ret & 0xff)
89 ret = v->counter;
90
91 return ret >> 8;
92}
93
94#define atomic24_set(v, i) (((v)->counter) = ((i) << 8))
95#endif
96
97static inline int __atomic24_add(int i, atomic24_t *v)
98{
99 register volatile int *ptr asm("g1");
100 register int increment asm("g2");
101 register int tmp1 asm("g3");
102 register int tmp2 asm("g4");
103 register int tmp3 asm("g7");
104
105 ptr = &v->counter;
106 increment = i;
107
108 __asm__ __volatile__(
109 "mov %%o7, %%g4\n\t"
110 "call ___atomic24_add\n\t"
111 " add %%o7, 8, %%o7\n"
112 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
113 : "0" (increment), "r" (ptr)
114 : "memory", "cc");
115
116 return increment;
117}
118
119static inline int __atomic24_sub(int i, atomic24_t *v)
120{
121 register volatile int *ptr asm("g1");
122 register int increment asm("g2");
123 register int tmp1 asm("g3");
124 register int tmp2 asm("g4");
125 register int tmp3 asm("g7");
126
127 ptr = &v->counter;
128 increment = i;
129
130 __asm__ __volatile__(
131 "mov %%o7, %%g4\n\t"
132 "call ___atomic24_sub\n\t"
133 " add %%o7, 8, %%o7\n"
134 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
135 : "0" (increment), "r" (ptr)
136 : "memory", "cc");
137
138 return increment;
139}
140
141#define atomic24_add(i, v) ((void)__atomic24_add((i), (v)))
142#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v)))
143
144#define atomic24_dec_return(v) __atomic24_sub(1, (v))
145#define atomic24_inc_return(v) __atomic24_add(1, (v))
146
147#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0)
148#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0)
149
150#define atomic24_inc(v) ((void)__atomic24_add(1, (v)))
151#define atomic24_dec(v) ((void)__atomic24_sub(1, (v)))
152
153#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0)
154
155/* Atomic operations are already serializing */ 55/* Atomic operations are already serializing */
156#define smp_mb__before_atomic_dec() barrier() 56#define smp_mb__before_atomic_dec() barrier()
157#define smp_mb__after_atomic_dec() barrier() 57#define smp_mb__after_atomic_dec() barrier()
158#define smp_mb__before_atomic_inc() barrier() 58#define smp_mb__before_atomic_inc() barrier()
159#define smp_mb__after_atomic_inc() barrier() 59#define smp_mb__after_atomic_inc() barrier()
160 60
161#endif /* !(__KERNEL__) */
162
163#endif /* !(__ARCH_SPARC_ATOMIC__) */ 61#endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/arch/sparc/include/asm/io_32.h b/arch/sparc/include/asm/io_32.h
index c2ced21c9dc1..2006e5d359df 100644
--- a/arch/sparc/include/asm/io_32.h
+++ b/arch/sparc/include/asm/io_32.h
@@ -7,6 +7,7 @@
7 7
8#include <asm/page.h> /* IO address mapping routines need this */ 8#include <asm/page.h> /* IO address mapping routines need this */
9#include <asm/system.h> 9#include <asm/system.h>
10#include <asm-generic/pci_iomap.h>
10 11
11#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 12#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
12 13
@@ -324,7 +325,6 @@ extern void ioport_unmap(void __iomem *);
324 325
325/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ 326/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
326struct pci_dev; 327struct pci_dev;
327extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
328extern void pci_iounmap(struct pci_dev *dev, void __iomem *); 328extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
329 329
330/* 330/*
diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
index 9c8965415f0a..9481e5a6fa90 100644
--- a/arch/sparc/include/asm/io_64.h
+++ b/arch/sparc/include/asm/io_64.h
@@ -8,6 +8,7 @@
8#include <asm/page.h> /* IO address mapping routines need this */ 8#include <asm/page.h> /* IO address mapping routines need this */
9#include <asm/system.h> 9#include <asm/system.h>
10#include <asm/asi.h> 10#include <asm/asi.h>
11#include <asm-generic/pci_iomap.h>
11 12
12/* PC crapola... */ 13/* PC crapola... */
13#define __SLOW_DOWN_IO do { } while (0) 14#define __SLOW_DOWN_IO do { } while (0)
@@ -514,7 +515,6 @@ extern void ioport_unmap(void __iomem *);
514 515
515/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ 516/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
516struct pci_dev; 517struct pci_dev;
517extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
518extern void pci_iounmap(struct pci_dev *dev, void __iomem *); 518extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
519 519
520static inline int sbus_can_dma_64bit(void) 520static inline int sbus_can_dma_64bit(void)
diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h
index 156707b0f18d..bb5c2ac4055d 100644
--- a/arch/sparc/include/asm/page_32.h
+++ b/arch/sparc/include/asm/page_32.h
@@ -8,14 +8,10 @@
8#ifndef _SPARC_PAGE_H 8#ifndef _SPARC_PAGE_H
9#define _SPARC_PAGE_H 9#define _SPARC_PAGE_H
10 10
11#define PAGE_SHIFT 12 11#include <linux/const.h>
12 12
13#ifndef __ASSEMBLY__ 13#define PAGE_SHIFT 12
14/* I have my suspicions... -DaveM */ 14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
15#define PAGE_SIZE (1UL << PAGE_SHIFT)
16#else
17#define PAGE_SIZE (1 << PAGE_SHIFT)
18#endif
19#define PAGE_MASK (~(PAGE_SIZE-1)) 15#define PAGE_MASK (~(PAGE_SIZE-1))
20 16
21#include <asm/btfixup.h> 17#include <asm/btfixup.h>
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 02939abd356c..6de7f7bf956a 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -16,11 +16,6 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19static inline void pcibios_set_master(struct pci_dev *dev)
20{
21 /* No special bus mastering setup handling */
22}
23
24static inline void pcibios_penalize_isa_irq(int irq, int active) 19static inline void pcibios_penalize_isa_irq(int irq, int active)
25{ 20{
26 /* We don't do dynamic PCI IRQ allocation */ 21 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 2614d96141c9..755a4bb6bcd3 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,11 +16,6 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19static inline void pcibios_set_master(struct pci_dev *dev)
20{
21 /* No special bus mastering setup handling */
22}
23
24static inline void pcibios_penalize_isa_irq(int irq, int active) 19static inline void pcibios_penalize_isa_irq(int irq, int active)
25{ 20{
26 /* We don't do dynamic PCI IRQ allocation */ 21 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/include/asm/pgtsun4.h b/arch/sparc/include/asm/pgtsun4.h
deleted file mode 100644
index 5a0d661fb82e..000000000000
--- a/arch/sparc/include/asm/pgtsun4.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * pgtsun4.h: Sun4 specific pgtable.h defines and code.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7#ifndef _SPARC_PGTSUN4C_H
8#define _SPARC_PGTSUN4C_H
9
10#include <asm/contregs.h>
11
12/* PMD_SHIFT determines the size of the area a second-level page table can map */
13#define SUN4C_PMD_SHIFT 23
14
15/* PGDIR_SHIFT determines what a third-level page table entry can map */
16#define SUN4C_PGDIR_SHIFT 23
17#define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT)
18#define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1))
19#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
20
21/* To represent how the sun4c mmu really lays things out. */
22#define SUN4C_REAL_PGDIR_SHIFT 18
23#define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT)
24#define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1))
25#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
26
27/* 19 bit PFN on sun4 */
28#define SUN4C_PFN_MASK 0x7ffff
29
30/* Don't increase these unless the structures in sun4c.c are fixed */
31#define SUN4C_MAX_SEGMAPS 256
32#define SUN4C_MAX_CONTEXTS 16
33
34/*
35 * To be efficient, and not have to worry about allocating such
36 * a huge pgd, we make the kernel sun4c tables each hold 1024
37 * entries and the pgd similarly just like the i386 tables.
38 */
39#define SUN4C_PTRS_PER_PTE 1024
40#define SUN4C_PTRS_PER_PMD 1
41#define SUN4C_PTRS_PER_PGD 1024
42
43/*
44 * Sparc SUN4C pte fields.
45 */
46#define _SUN4C_PAGE_VALID 0x80000000
47#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */
48#define _SUN4C_PAGE_DIRTY 0x40000000
49#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */
50#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */
51#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */
52#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */
53#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */
54#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */
55#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */
56#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */
57#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */
58#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */
59
60#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\
61 _SUN4C_PAGE_ACCESSED)
62#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\
63 _SUN4C_PAGE_MODIFIED)
64
65#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED)
66
67#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT)
68#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\
69 _SUN4C_PAGE_WRITE)
70#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
71#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
72#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\
73 _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV)
74
75/* SUN4C swap entry encoding
76 *
77 * We use 5 bits for the type and 19 for the offset. This gives us
78 * 32 swapfiles of 4GB each. Encoding looks like:
79 *
80 * RRRRRRRRooooooooooooooooooottttt
81 * fedcba9876543210fedcba9876543210
82 *
83 * The top 8 bits are reserved for protection and status bits, especially
84 * FILE and PRESENT.
85 */
86#define SUN4C_SWP_TYPE_MASK 0x1f
87#define SUN4C_SWP_OFF_MASK 0x7ffff
88#define SUN4C_SWP_OFF_SHIFT 5
89
90#ifndef __ASSEMBLY__
91
92static inline unsigned long sun4c_get_synchronous_error(void)
93{
94 unsigned long sync_err;
95
96 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
97 "=r" (sync_err) :
98 "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
99 return sync_err;
100}
101
102static inline unsigned long sun4c_get_synchronous_address(void)
103{
104 unsigned long sync_addr;
105
106 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
107 "=r" (sync_addr) :
108 "r" (AC_SYNC_VA), "i" (ASI_CONTROL));
109 return sync_addr;
110}
111
112/* SUN4 pte, segmap, and context manipulation */
113static inline unsigned long sun4c_get_segmap(unsigned long addr)
114{
115 register unsigned long entry;
116
117 __asm__ __volatile__("\n\tlduha [%1] %2, %0\n\t" :
118 "=r" (entry) :
119 "r" (addr), "i" (ASI_SEGMAP));
120 return entry;
121}
122
123static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry)
124{
125 __asm__ __volatile__("\n\tstha %1, [%0] %2; nop; nop; nop;\n\t" : :
126 "r" (addr), "r" (entry),
127 "i" (ASI_SEGMAP)
128 : "memory");
129}
130
131static inline unsigned long sun4c_get_pte(unsigned long addr)
132{
133 register unsigned long entry;
134
135 __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" :
136 "=r" (entry) :
137 "r" (addr), "i" (ASI_PTE));
138 return entry;
139}
140
141static inline void sun4c_put_pte(unsigned long addr, unsigned long entry)
142{
143 __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : :
144 "r" (addr),
145 "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)
146 : "memory");
147}
148
149static inline int sun4c_get_context(void)
150{
151 register int ctx;
152
153 __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
154 "=r" (ctx) :
155 "r" (AC_CONTEXT), "i" (ASI_CONTROL));
156
157 return ctx;
158}
159
160static inline int sun4c_set_context(int ctx)
161{
162 __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : :
163 "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)
164 : "memory");
165
166 return ctx;
167}
168
169#endif /* !(__ASSEMBLY__) */
170
171#endif /* !(_SPARC_PGTSUN4_H) */
diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/asm/posix_types.h
index 98d6ebb922fb..dbfc1a34b3a2 100644
--- a/arch/sparc/include/asm/posix_types.h
+++ b/arch/sparc/include/asm/posix_types.h
@@ -20,7 +20,6 @@ typedef unsigned int __kernel_uid_t;
20typedef unsigned int __kernel_gid_t; 20typedef unsigned int __kernel_gid_t;
21typedef unsigned long __kernel_ino_t; 21typedef unsigned long __kernel_ino_t;
22typedef unsigned int __kernel_mode_t; 22typedef unsigned int __kernel_mode_t;
23typedef unsigned short __kernel_umode_t;
24typedef unsigned int __kernel_nlink_t; 23typedef unsigned int __kernel_nlink_t;
25typedef int __kernel_daddr_t; 24typedef int __kernel_daddr_t;
26typedef long __kernel_off_t; 25typedef long __kernel_off_t;
@@ -55,7 +54,6 @@ typedef unsigned short __kernel_uid_t;
55typedef unsigned short __kernel_gid_t; 54typedef unsigned short __kernel_gid_t;
56typedef unsigned long __kernel_ino_t; 55typedef unsigned long __kernel_ino_t;
57typedef unsigned short __kernel_mode_t; 56typedef unsigned short __kernel_mode_t;
58typedef unsigned short __kernel_umode_t;
59typedef short __kernel_nlink_t; 57typedef short __kernel_nlink_t;
60typedef long __kernel_daddr_t; 58typedef long __kernel_daddr_t;
61typedef long __kernel_off_t; 59typedef long __kernel_off_t;
diff --git a/arch/sparc/include/asm/signal.h b/arch/sparc/include/asm/signal.h
index e49b828a2471..aa42fe30d5b9 100644
--- a/arch/sparc/include/asm/signal.h
+++ b/arch/sparc/include/asm/signal.h
@@ -143,10 +143,11 @@ struct sigstack {
143#define SA_ONSTACK _SV_SSTACK 143#define SA_ONSTACK _SV_SSTACK
144#define SA_RESTART _SV_INTR 144#define SA_RESTART _SV_INTR
145#define SA_ONESHOT _SV_RESET 145#define SA_ONESHOT _SV_RESET
146#define SA_NOMASK 0x20u 146#define SA_NODEFER 0x20u
147#define SA_NOCLDWAIT 0x100u 147#define SA_NOCLDWAIT 0x100u
148#define SA_SIGINFO 0x200u 148#define SA_SIGINFO 0x200u
149 149
150#define SA_NOMASK SA_NODEFER
150 151
151#define SIG_BLOCK 0x01 /* for blocking signals */ 152#define SIG_BLOCK 0x01 /* for blocking signals */
152#define SIG_UNBLOCK 0x02 /* for unblocking signals */ 153#define SIG_UNBLOCK 0x02 /* for unblocking signals */
diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h
index fa5753233410..c2a1080cdd3b 100644
--- a/arch/sparc/include/asm/thread_info_32.h
+++ b/arch/sparc/include/asm/thread_info_32.h
@@ -95,7 +95,7 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
95 * Observe the order of get_free_pages() in alloc_thread_info_node(). 95 * Observe the order of get_free_pages() in alloc_thread_info_node().
96 * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. 96 * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste.
97 */ 97 */
98#define THREAD_SIZE 8192 98#define THREAD_SIZE (2 * PAGE_SIZE)
99 99
100/* 100/*
101 * Offsets in thread_info structure, used in assembly code 101 * Offsets in thread_info structure, used in assembly code
@@ -133,7 +133,6 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
133#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling 133#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling
134 * TIF_NEED_RESCHED */ 134 * TIF_NEED_RESCHED */
135#define TIF_MEMDIE 10 /* is terminating due to OOM killer */ 135#define TIF_MEMDIE 10 /* is terminating due to OOM killer */
136#define TIF_FREEZE 11 /* is freezing for suspend */
137 136
138/* as above, but as bit values */ 137/* as above, but as bit values */
139#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 138#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -147,7 +146,6 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
147#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | \ 146#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | \
148 _TIF_SIGPENDING | \ 147 _TIF_SIGPENDING | \
149 _TIF_RESTORE_SIGMASK) 148 _TIF_RESTORE_SIGMASK)
150#define _TIF_FREEZE (1<<TIF_FREEZE)
151 149
152#endif /* __KERNEL__ */ 150#endif /* __KERNEL__ */
153 151
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 60d86be1a533..01d057fe6a3f 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -225,7 +225,6 @@ register struct thread_info *current_thread_info_reg asm("g6");
225/* flag bit 12 is available */ 225/* flag bit 12 is available */
226#define TIF_MEMDIE 13 /* is terminating due to OOM killer */ 226#define TIF_MEMDIE 13 /* is terminating due to OOM killer */
227#define TIF_POLLING_NRFLAG 14 227#define TIF_POLLING_NRFLAG 14
228#define TIF_FREEZE 15 /* is freezing for suspend */
229 228
230#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 229#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
231#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 230#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
@@ -237,7 +236,6 @@ register struct thread_info *current_thread_info_reg asm("g6");
237#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 236#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
238#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) 237#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
239#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 238#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
240#define _TIF_FREEZE (1<<TIF_FREEZE)
241 239
242#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ 240#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
243 _TIF_DO_NOTIFY_RESUME_MASK | \ 241 _TIF_DO_NOTIFY_RESUME_MASK | \
diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h
index 91e5a034f987..383d156cde9c 100644
--- a/arch/sparc/include/asm/types.h
+++ b/arch/sparc/include/asm/types.h
@@ -12,12 +12,6 @@
12 12
13#include <asm-generic/int-ll64.h> 13#include <asm-generic/int-ll64.h>
14 14
15#ifndef __ASSEMBLY__
16
17typedef unsigned short umode_t;
18
19#endif /* __ASSEMBLY__ */
20
21#endif /* defined(__sparc__) */ 15#endif /* defined(__sparc__) */
22 16
23#endif /* defined(_SPARC_TYPES_H) */ 17#endif /* defined(_SPARC_TYPES_H) */
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index f1cf6ef011a7..c7bec25fdb1c 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -19,22 +19,22 @@
19 */ 19 */
20void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info) 20void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
21{ 21{
22 LIST_HEAD(resources);
22 struct pci_bus *root_bus; 23 struct pci_bus *root_bus;
23 24
24 root_bus = pci_scan_bus_parented(&ofdev->dev, 0, info->ops, info); 25 pci_add_resource(&resources, &info->io_space);
25 if (root_bus) { 26 pci_add_resource(&resources, &info->mem_space);
26 root_bus->resource[0] = &info->io_space;
27 root_bus->resource[1] = &info->mem_space;
28 root_bus->resource[2] = NULL;
29
30 /* Init all PCI devices into PCI tree */
31 pci_bus_add_devices(root_bus);
32 27
28 root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
29 &resources);
30 if (root_bus) {
33 /* Setup IRQs of all devices using custom routines */ 31 /* Setup IRQs of all devices using custom routines */
34 pci_fixup_irqs(pci_common_swizzle, info->map_irq); 32 pci_fixup_irqs(pci_common_swizzle, info->map_irq);
35 33
36 /* Assign devices with resources */ 34 /* Assign devices with resources */
37 pci_assign_unassigned_resources(); 35 pci_assign_unassigned_resources();
36 } else {
37 pci_free_resource_list(&resources);
38 } 38 }
39} 39}
40 40
@@ -83,15 +83,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
83 int i, has_io, has_mem; 83 int i, has_io, has_mem;
84 u16 cmd; 84 u16 cmd;
85 85
86 /* Generic PCI bus probing sets these to point at
87 * &io{port,mem}_resouce which is wrong for us.
88 */
89 if (pbus->self == NULL) {
90 pbus->resource[0] = &info->io_space;
91 pbus->resource[1] = &info->mem_space;
92 pbus->resource[2] = NULL;
93 }
94
95 list_for_each_entry(dev, &pbus->devices, bus_list) { 86 list_for_each_entry(dev, &pbus->devices, bus_list) {
96 /* 87 /*
97 * We can not rely on that the bootloader has enabled I/O 88 * We can not rely on that the bootloader has enabled I/O
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 31111e35281e..bb8bc2e519ac 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -685,23 +685,25 @@ static void __devinit pci_bus_register_of_sysfs(struct pci_bus *bus)
685struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, 685struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
686 struct device *parent) 686 struct device *parent)
687{ 687{
688 LIST_HEAD(resources);
688 struct device_node *node = pbm->op->dev.of_node; 689 struct device_node *node = pbm->op->dev.of_node;
689 struct pci_bus *bus; 690 struct pci_bus *bus;
690 691
691 printk("PCI: Scanning PBM %s\n", node->full_name); 692 printk("PCI: Scanning PBM %s\n", node->full_name);
692 693
693 bus = pci_create_bus(parent, pbm->pci_first_busno, pbm->pci_ops, pbm); 694 pci_add_resource(&resources, &pbm->io_space);
695 pci_add_resource(&resources, &pbm->mem_space);
696 bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
697 pbm, &resources);
694 if (!bus) { 698 if (!bus) {
695 printk(KERN_ERR "Failed to create bus for %s\n", 699 printk(KERN_ERR "Failed to create bus for %s\n",
696 node->full_name); 700 node->full_name);
701 pci_free_resource_list(&resources);
697 return NULL; 702 return NULL;
698 } 703 }
699 bus->secondary = pbm->pci_first_busno; 704 bus->secondary = pbm->pci_first_busno;
700 bus->subordinate = pbm->pci_last_busno; 705 bus->subordinate = pbm->pci_last_busno;
701 706
702 bus->resource[0] = &pbm->io_space;
703 bus->resource[1] = &pbm->mem_space;
704
705 pci_of_scan_bus(pbm, node, bus); 707 pci_of_scan_bus(pbm, node, bus);
706 pci_bus_add_devices(bus); 708 pci_bus_add_devices(bus);
707 pci_bus_register_of_sysfs(bus); 709 pci_bus_register_of_sysfs(bus);
@@ -711,13 +713,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
711 713
712void __devinit pcibios_fixup_bus(struct pci_bus *pbus) 714void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
713{ 715{
714 struct pci_pbm_info *pbm = pbus->sysdata;
715
716 /* Generic PCI bus probing sets these to point at
717 * &io{port,mem}_resouce which is wrong for us.
718 */
719 pbus->resource[0] = &pbm->io_space;
720 pbus->resource[1] = &pbm->mem_space;
721} 716}
722 717
723void pcibios_update_irq(struct pci_dev *pdev, int irq) 718void pcibios_update_irq(struct pci_dev *pdev, int irq)
@@ -1083,6 +1078,11 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
1083 *end = rp->end - offset; 1078 *end = rp->end - offset;
1084} 1079}
1085 1080
1081void pcibios_set_master(struct pci_dev *dev)
1082{
1083 /* No special bus mastering setup handling */
1084}
1085
1086static int __init pcibios_init(void) 1086static int __init pcibios_init(void)
1087{ 1087{
1088 pci_dfl_cache_line_size = 64 >> 2; 1088 pci_dfl_cache_line_size = 64 >> 2;
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 75607724d290..3b1bd7c50164 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -840,7 +840,7 @@ static void tsb_sync(void *info)
840 struct trap_per_cpu *tp = &trap_block[raw_smp_processor_id()]; 840 struct trap_per_cpu *tp = &trap_block[raw_smp_processor_id()];
841 struct mm_struct *mm = info; 841 struct mm_struct *mm = info;
842 842
843 /* It is not valid to test "currrent->active_mm == mm" here. 843 /* It is not valid to test "current->active_mm == mm" here.
844 * 844 *
845 * The value of "current" is not changed atomically with 845 * The value of "current" is not changed atomically with
846 * switch_mm(). But that's OK, we just need to check the 846 * switch_mm(). But that's OK, we just need to check the
diff --git a/arch/sparc/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c
index 7408201d7efb..654e8aad3bbe 100644
--- a/arch/sparc/kernel/sysfs.c
+++ b/arch/sparc/kernel/sysfs.c
@@ -3,7 +3,7 @@
3 * Copyright (C) 2007 David S. Miller <davem@davemloft.net> 3 * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
4 */ 4 */
5#include <linux/sched.h> 5#include <linux/sched.h>
6#include <linux/sysdev.h> 6#include <linux/device.h>
7#include <linux/cpu.h> 7#include <linux/cpu.h>
8#include <linux/smp.h> 8#include <linux/smp.h>
9#include <linux/percpu.h> 9#include <linux/percpu.h>
@@ -16,13 +16,13 @@
16static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64))); 16static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64)));
17 17
18#define SHOW_MMUSTAT_ULONG(NAME) \ 18#define SHOW_MMUSTAT_ULONG(NAME) \
19static ssize_t show_##NAME(struct sys_device *dev, \ 19static ssize_t show_##NAME(struct device *dev, \
20 struct sysdev_attribute *attr, char *buf) \ 20 struct device_attribute *attr, char *buf) \
21{ \ 21{ \
22 struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \ 22 struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \
23 return sprintf(buf, "%lu\n", p->NAME); \ 23 return sprintf(buf, "%lu\n", p->NAME); \
24} \ 24} \
25static SYSDEV_ATTR(NAME, 0444, show_##NAME, NULL) 25static DEVICE_ATTR(NAME, 0444, show_##NAME, NULL)
26 26
27SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte); 27SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte);
28SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte); 28SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte);
@@ -58,38 +58,38 @@ SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_256mb_tte);
58SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte); 58SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte);
59 59
60static struct attribute *mmu_stat_attrs[] = { 60static struct attribute *mmu_stat_attrs[] = {
61 &attr_immu_tsb_hits_ctx0_8k_tte.attr, 61 &dev_attr_immu_tsb_hits_ctx0_8k_tte.attr,
62 &attr_immu_tsb_ticks_ctx0_8k_tte.attr, 62 &dev_attr_immu_tsb_ticks_ctx0_8k_tte.attr,
63 &attr_immu_tsb_hits_ctx0_64k_tte.attr, 63 &dev_attr_immu_tsb_hits_ctx0_64k_tte.attr,
64 &attr_immu_tsb_ticks_ctx0_64k_tte.attr, 64 &dev_attr_immu_tsb_ticks_ctx0_64k_tte.attr,
65 &attr_immu_tsb_hits_ctx0_4mb_tte.attr, 65 &dev_attr_immu_tsb_hits_ctx0_4mb_tte.attr,
66 &attr_immu_tsb_ticks_ctx0_4mb_tte.attr, 66 &dev_attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
67 &attr_immu_tsb_hits_ctx0_256mb_tte.attr, 67 &dev_attr_immu_tsb_hits_ctx0_256mb_tte.attr,
68 &attr_immu_tsb_ticks_ctx0_256mb_tte.attr, 68 &dev_attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
69 &attr_immu_tsb_hits_ctxnon0_8k_tte.attr, 69 &dev_attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
70 &attr_immu_tsb_ticks_ctxnon0_8k_tte.attr, 70 &dev_attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
71 &attr_immu_tsb_hits_ctxnon0_64k_tte.attr, 71 &dev_attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
72 &attr_immu_tsb_ticks_ctxnon0_64k_tte.attr, 72 &dev_attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
73 &attr_immu_tsb_hits_ctxnon0_4mb_tte.attr, 73 &dev_attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
74 &attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr, 74 &dev_attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
75 &attr_immu_tsb_hits_ctxnon0_256mb_tte.attr, 75 &dev_attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
76 &attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr, 76 &dev_attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
77 &attr_dmmu_tsb_hits_ctx0_8k_tte.attr, 77 &dev_attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
78 &attr_dmmu_tsb_ticks_ctx0_8k_tte.attr, 78 &dev_attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
79 &attr_dmmu_tsb_hits_ctx0_64k_tte.attr, 79 &dev_attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
80 &attr_dmmu_tsb_ticks_ctx0_64k_tte.attr, 80 &dev_attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
81 &attr_dmmu_tsb_hits_ctx0_4mb_tte.attr, 81 &dev_attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
82 &attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr, 82 &dev_attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
83 &attr_dmmu_tsb_hits_ctx0_256mb_tte.attr, 83 &dev_attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
84 &attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr, 84 &dev_attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
85 &attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr, 85 &dev_attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
86 &attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr, 86 &dev_attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
87 &attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr, 87 &dev_attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
88 &attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr, 88 &dev_attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
89 &attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr, 89 &dev_attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
90 &attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr, 90 &dev_attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
91 &attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr, 91 &dev_attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
92 &attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr, 92 &dev_attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
93 NULL, 93 NULL,
94}; 94};
95 95
@@ -139,15 +139,15 @@ static unsigned long write_mmustat_enable(unsigned long val)
139 return sun4v_mmustat_conf(ra, &orig_ra); 139 return sun4v_mmustat_conf(ra, &orig_ra);
140} 140}
141 141
142static ssize_t show_mmustat_enable(struct sys_device *s, 142static ssize_t show_mmustat_enable(struct device *s,
143 struct sysdev_attribute *attr, char *buf) 143 struct device_attribute *attr, char *buf)
144{ 144{
145 unsigned long val = run_on_cpu(s->id, read_mmustat_enable, 0); 145 unsigned long val = run_on_cpu(s->id, read_mmustat_enable, 0);
146 return sprintf(buf, "%lx\n", val); 146 return sprintf(buf, "%lx\n", val);
147} 147}
148 148
149static ssize_t store_mmustat_enable(struct sys_device *s, 149static ssize_t store_mmustat_enable(struct device *s,
150 struct sysdev_attribute *attr, const char *buf, 150 struct device_attribute *attr, const char *buf,
151 size_t count) 151 size_t count)
152{ 152{
153 unsigned long val, err; 153 unsigned long val, err;
@@ -163,39 +163,39 @@ static ssize_t store_mmustat_enable(struct sys_device *s,
163 return count; 163 return count;
164} 164}
165 165
166static SYSDEV_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable); 166static DEVICE_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);
167 167
168static int mmu_stats_supported; 168static int mmu_stats_supported;
169 169
170static int register_mmu_stats(struct sys_device *s) 170static int register_mmu_stats(struct device *s)
171{ 171{
172 if (!mmu_stats_supported) 172 if (!mmu_stats_supported)
173 return 0; 173 return 0;
174 sysdev_create_file(s, &attr_mmustat_enable); 174 device_create_file(s, &dev_attr_mmustat_enable);
175 return sysfs_create_group(&s->kobj, &mmu_stat_group); 175 return sysfs_create_group(&s->kobj, &mmu_stat_group);
176} 176}
177 177
178#ifdef CONFIG_HOTPLUG_CPU 178#ifdef CONFIG_HOTPLUG_CPU
179static void unregister_mmu_stats(struct sys_device *s) 179static void unregister_mmu_stats(struct device *s)
180{ 180{
181 if (!mmu_stats_supported) 181 if (!mmu_stats_supported)
182 return; 182 return;
183 sysfs_remove_group(&s->kobj, &mmu_stat_group); 183 sysfs_remove_group(&s->kobj, &mmu_stat_group);
184 sysdev_remove_file(s, &attr_mmustat_enable); 184 device_remove_file(s, &dev_attr_mmustat_enable);
185} 185}
186#endif 186#endif
187 187
188#define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \ 188#define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \
189static ssize_t show_##NAME(struct sys_device *dev, \ 189static ssize_t show_##NAME(struct device *dev, \
190 struct sysdev_attribute *attr, char *buf) \ 190 struct device_attribute *attr, char *buf) \
191{ \ 191{ \
192 cpuinfo_sparc *c = &cpu_data(dev->id); \ 192 cpuinfo_sparc *c = &cpu_data(dev->id); \
193 return sprintf(buf, "%lu\n", c->MEMBER); \ 193 return sprintf(buf, "%lu\n", c->MEMBER); \
194} 194}
195 195
196#define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \ 196#define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \
197static ssize_t show_##NAME(struct sys_device *dev, \ 197static ssize_t show_##NAME(struct device *dev, \
198 struct sysdev_attribute *attr, char *buf) \ 198 struct device_attribute *attr, char *buf) \
199{ \ 199{ \
200 cpuinfo_sparc *c = &cpu_data(dev->id); \ 200 cpuinfo_sparc *c = &cpu_data(dev->id); \
201 return sprintf(buf, "%u\n", c->MEMBER); \ 201 return sprintf(buf, "%u\n", c->MEMBER); \
@@ -209,14 +209,14 @@ SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size);
209SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size); 209SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size);
210SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size); 210SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size);
211 211
212static struct sysdev_attribute cpu_core_attrs[] = { 212static struct device_attribute cpu_core_attrs[] = {
213 _SYSDEV_ATTR(clock_tick, 0444, show_clock_tick, NULL), 213 __ATTR(clock_tick, 0444, show_clock_tick, NULL),
214 _SYSDEV_ATTR(l1_dcache_size, 0444, show_l1_dcache_size, NULL), 214 __ATTR(l1_dcache_size, 0444, show_l1_dcache_size, NULL),
215 _SYSDEV_ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL), 215 __ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
216 _SYSDEV_ATTR(l1_icache_size, 0444, show_l1_icache_size, NULL), 216 __ATTR(l1_icache_size, 0444, show_l1_icache_size, NULL),
217 _SYSDEV_ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL), 217 __ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
218 _SYSDEV_ATTR(l2_cache_size, 0444, show_l2_cache_size, NULL), 218 __ATTR(l2_cache_size, 0444, show_l2_cache_size, NULL),
219 _SYSDEV_ATTR(l2_cache_line_size, 0444, show_l2_cache_line_size, NULL), 219 __ATTR(l2_cache_line_size, 0444, show_l2_cache_line_size, NULL),
220}; 220};
221 221
222static DEFINE_PER_CPU(struct cpu, cpu_devices); 222static DEFINE_PER_CPU(struct cpu, cpu_devices);
@@ -224,11 +224,11 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
224static void register_cpu_online(unsigned int cpu) 224static void register_cpu_online(unsigned int cpu)
225{ 225{
226 struct cpu *c = &per_cpu(cpu_devices, cpu); 226 struct cpu *c = &per_cpu(cpu_devices, cpu);
227 struct sys_device *s = &c->sysdev; 227 struct device *s = &c->dev;
228 int i; 228 int i;
229 229
230 for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++) 230 for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
231 sysdev_create_file(s, &cpu_core_attrs[i]); 231 device_create_file(s, &cpu_core_attrs[i]);
232 232
233 register_mmu_stats(s); 233 register_mmu_stats(s);
234} 234}
@@ -237,12 +237,12 @@ static void register_cpu_online(unsigned int cpu)
237static void unregister_cpu_online(unsigned int cpu) 237static void unregister_cpu_online(unsigned int cpu)
238{ 238{
239 struct cpu *c = &per_cpu(cpu_devices, cpu); 239 struct cpu *c = &per_cpu(cpu_devices, cpu);
240 struct sys_device *s = &c->sysdev; 240 struct device *s = &c->dev;
241 int i; 241 int i;
242 242
243 unregister_mmu_stats(s); 243 unregister_mmu_stats(s);
244 for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++) 244 for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
245 sysdev_remove_file(s, &cpu_core_attrs[i]); 245 device_remove_file(s, &cpu_core_attrs[i]);
246} 246}
247#endif 247#endif
248 248
diff --git a/arch/sparc/lib/atomic_32.S b/arch/sparc/lib/atomic_32.S
index 178cbb8ae1b9..eb6c7359cbd1 100644
--- a/arch/sparc/lib/atomic_32.S
+++ b/arch/sparc/lib/atomic_32.S
@@ -40,60 +40,5 @@ ___xchg32_sun4md:
40 mov %g4, %o7 40 mov %g4, %o7
41#endif 41#endif
42 42
43 /* Read asm-sparc/atomic.h carefully to understand how this works for SMP.
44 * Really, some things here for SMP are overly clever, go read the header.
45 */
46 .globl ___atomic24_add
47___atomic24_add:
48 rd %psr, %g3 ! Keep the code small, old way was stupid
49 nop; nop; nop; ! Let the bits set
50 or %g3, PSR_PIL, %g7 ! Disable interrupts
51 wr %g7, 0x0, %psr ! Set %psr
52 nop; nop; nop; ! Let the bits set
53#ifdef CONFIG_SMP
541: ldstub [%g1 + 3], %g7 ! Spin on the byte lock for SMP.
55 orcc %g7, 0x0, %g0 ! Did we get it?
56 bne 1b ! Nope...
57 ld [%g1], %g7 ! Load locked atomic24_t
58 sra %g7, 8, %g7 ! Get signed 24-bit integer
59 add %g7, %g2, %g2 ! Add in argument
60 sll %g2, 8, %g7 ! Transpose back to atomic24_t
61 st %g7, [%g1] ! Clever: This releases the lock as well.
62#else
63 ld [%g1], %g7 ! Load locked atomic24_t
64 add %g7, %g2, %g2 ! Add in argument
65 st %g2, [%g1] ! Store it back
66#endif
67 wr %g3, 0x0, %psr ! Restore original PSR_PIL
68 nop; nop; nop; ! Let the bits set
69 jmpl %o7, %g0 ! NOTE: not + 8, see callers in atomic.h
70 mov %g4, %o7 ! Restore %o7
71
72 .globl ___atomic24_sub
73___atomic24_sub:
74 rd %psr, %g3 ! Keep the code small, old way was stupid
75 nop; nop; nop; ! Let the bits set
76 or %g3, PSR_PIL, %g7 ! Disable interrupts
77 wr %g7, 0x0, %psr ! Set %psr
78 nop; nop; nop; ! Let the bits set
79#ifdef CONFIG_SMP
801: ldstub [%g1 + 3], %g7 ! Spin on the byte lock for SMP.
81 orcc %g7, 0x0, %g0 ! Did we get it?
82 bne 1b ! Nope...
83 ld [%g1], %g7 ! Load locked atomic24_t
84 sra %g7, 8, %g7 ! Get signed 24-bit integer
85 sub %g7, %g2, %g2 ! Subtract argument
86 sll %g2, 8, %g7 ! Transpose back to atomic24_t
87 st %g7, [%g1] ! Clever: This releases the lock as well
88#else
89 ld [%g1], %g7 ! Load locked atomic24_t
90 sub %g7, %g2, %g2 ! Subtract argument
91 st %g2, [%g1] ! Store it back
92#endif
93 wr %g3, 0x0, %psr ! Restore original PSR_PIL
94 nop; nop; nop; ! Let the bits set
95 jmpl %o7, %g0 ! NOTE: not + 8, see callers in atomic.h
96 mov %g4, %o7 ! Restore %o7
97
98 .globl __atomic_end 43 .globl __atomic_end
99__atomic_end: 44__atomic_end:
diff --git a/arch/sparc/lib/iomap.c b/arch/sparc/lib/iomap.c
index 9ef37e13a920..c4d42a50ebc0 100644
--- a/arch/sparc/lib/iomap.c
+++ b/arch/sparc/lib/iomap.c
@@ -18,31 +18,8 @@ void ioport_unmap(void __iomem *addr)
18EXPORT_SYMBOL(ioport_map); 18EXPORT_SYMBOL(ioport_map);
19EXPORT_SYMBOL(ioport_unmap); 19EXPORT_SYMBOL(ioport_unmap);
20 20
21/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
22void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
23{
24 resource_size_t start = pci_resource_start(dev, bar);
25 resource_size_t len = pci_resource_len(dev, bar);
26 unsigned long flags = pci_resource_flags(dev, bar);
27
28 if (!len || !start)
29 return NULL;
30 if (maxlen && len > maxlen)
31 len = maxlen;
32 if (flags & IORESOURCE_IO)
33 return ioport_map(start, len);
34 if (flags & IORESOURCE_MEM) {
35 if (flags & IORESOURCE_CACHEABLE)
36 return ioremap(start, len);
37 return ioremap_nocache(start, len);
38 }
39 /* What? */
40 return NULL;
41}
42
43void pci_iounmap(struct pci_dev *dev, void __iomem * addr) 21void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
44{ 22{
45 /* nothing to do */ 23 /* nothing to do */
46} 24}
47EXPORT_SYMBOL(pci_iomap);
48EXPORT_SYMBOL(pci_iounmap); 25EXPORT_SYMBOL(pci_iounmap);
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c
index 1b30bb3bfdb1..f73c2240fe60 100644
--- a/arch/sparc/lib/ksyms.c
+++ b/arch/sparc/lib/ksyms.c
@@ -62,8 +62,6 @@ extern void ___rw_read_enter(void);
62extern void ___rw_read_try(void); 62extern void ___rw_read_try(void);
63extern void ___rw_read_exit(void); 63extern void ___rw_read_exit(void);
64extern void ___rw_write_enter(void); 64extern void ___rw_write_enter(void);
65extern void ___atomic24_add(void);
66extern void ___atomic24_sub(void);
67 65
68/* Alias functions whose names begin with "." and export the aliases. 66/* Alias functions whose names begin with "." and export the aliases.
69 * The module references will be fixed up by module_frob_arch_sections. 67 * The module references will be fixed up by module_frob_arch_sections.
@@ -97,10 +95,6 @@ EXPORT_SYMBOL(___rw_read_exit);
97EXPORT_SYMBOL(___rw_write_enter); 95EXPORT_SYMBOL(___rw_write_enter);
98#endif 96#endif
99 97
100/* Atomic operations. */
101EXPORT_SYMBOL(___atomic24_add);
102EXPORT_SYMBOL(___atomic24_sub);
103
104EXPORT_SYMBOL(__ashrdi3); 98EXPORT_SYMBOL(__ashrdi3);
105EXPORT_SYMBOL(__ashldi3); 99EXPORT_SYMBOL(__ashldi3);
106EXPORT_SYMBOL(__lshrdi3); 100EXPORT_SYMBOL(__lshrdi3);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-06 04:11:19 -0500