diff options
author | Tejun Heo <tj@kernel.org> | 2010-02-02 00:38:15 -0500 |
---|---|---|
committer | Tejun Heo <tj@kernel.org> | 2010-02-02 00:38:15 -0500 |
commit | ab386128f20c44c458a90039ab1bdc265ac474c9 (patch) | |
tree | 2ad188744922b1bb951fd10ff50dc04c83acce22 /arch/sparc | |
parent | dbfc196a3cc1a2514ad0737a82f764de23bd65e6 (diff) | |
parent | ab658321f32770b903a4426e2a6fae0392757755 (diff) |
Merge branch 'master' into percpu
Diffstat (limited to 'arch/sparc')
-rw-r--r-- | arch/sparc/Kconfig | 5 | ||||
-rw-r--r-- | arch/sparc/configs/sparc32_defconfig | 87 | ||||
-rw-r--r-- | arch/sparc/configs/sparc64_defconfig | 131 | ||||
-rw-r--r-- | arch/sparc/include/asm/elf_64.h | 13 | ||||
-rw-r--r-- | arch/sparc/include/asm/io_32.h | 2 | ||||
-rw-r--r-- | arch/sparc/include/asm/page_32.h | 2 | ||||
-rw-r--r-- | arch/sparc/include/asm/param.h | 19 | ||||
-rw-r--r-- | arch/sparc/include/asm/thread_info_64.h | 4 | ||||
-rw-r--r-- | arch/sparc/include/asm/timex_32.h | 1 | ||||
-rw-r--r-- | arch/sparc/include/asm/topology_64.h | 4 | ||||
-rw-r--r-- | arch/sparc/include/asm/uaccess_32.h | 2 | ||||
-rw-r--r-- | arch/sparc/include/asm/uaccess_64.h | 2 | ||||
-rw-r--r-- | arch/sparc/kernel/central.c | 4 | ||||
-rw-r--r-- | arch/sparc/kernel/irq_64.c | 41 | ||||
-rw-r--r-- | arch/sparc/kernel/nmi.c | 3 | ||||
-rw-r--r-- | arch/sparc/kernel/pcic.c | 103 | ||||
-rw-r--r-- | arch/sparc/kernel/perf_event.c | 638 | ||||
-rw-r--r-- | arch/sparc/kernel/process_64.c | 8 | ||||
-rw-r--r-- | arch/sparc/kernel/sys_sparc_64.c | 6 | ||||
-rw-r--r-- | arch/sparc/kernel/time_32.c | 116 | ||||
-rw-r--r-- | arch/sparc/mm/fault_32.c | 12 | ||||
-rw-r--r-- | arch/sparc/mm/fault_64.c | 13 |
22 files changed, 767 insertions, 449 deletions
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 108197ac0d56..4097f6a10860 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig | |||
@@ -64,8 +64,11 @@ config BITS | |||
64 | default 64 if SPARC64 | 64 | default 64 if SPARC64 |
65 | 65 | ||
66 | config GENERIC_TIME | 66 | config GENERIC_TIME |
67 | def_bool y | ||
68 | |||
69 | config ARCH_USES_GETTIMEOFFSET | ||
67 | bool | 70 | bool |
68 | default y if SPARC64 | 71 | default y if SPARC32 |
69 | 72 | ||
70 | config GENERIC_CMOS_UPDATE | 73 | config GENERIC_CMOS_UPDATE |
71 | bool | 74 | bool |
diff --git a/arch/sparc/configs/sparc32_defconfig b/arch/sparc/configs/sparc32_defconfig index 983d59824a28..99a1f191497b 100644 --- a/arch/sparc/configs/sparc32_defconfig +++ b/arch/sparc/configs/sparc32_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.31 | 3 | # Linux kernel version: 2.6.33-rc2 |
4 | # Wed Sep 16 00:03:43 2009 | 4 | # Mon Jan 11 23:20:31 2010 |
5 | # | 5 | # |
6 | # CONFIG_64BIT is not set | 6 | # CONFIG_64BIT is not set |
7 | CONFIG_SPARC=y | 7 | CONFIG_SPARC=y |
@@ -41,6 +41,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y | |||
41 | # | 41 | # |
42 | CONFIG_TREE_RCU=y | 42 | CONFIG_TREE_RCU=y |
43 | # CONFIG_TREE_PREEMPT_RCU is not set | 43 | # CONFIG_TREE_PREEMPT_RCU is not set |
44 | # CONFIG_TINY_RCU is not set | ||
44 | # CONFIG_RCU_TRACE is not set | 45 | # CONFIG_RCU_TRACE is not set |
45 | CONFIG_RCU_FANOUT=32 | 46 | CONFIG_RCU_FANOUT=32 |
46 | # CONFIG_RCU_FANOUT_EXACT is not set | 47 | # CONFIG_RCU_FANOUT_EXACT is not set |
@@ -88,21 +89,21 @@ CONFIG_TIMERFD=y | |||
88 | CONFIG_EVENTFD=y | 89 | CONFIG_EVENTFD=y |
89 | CONFIG_SHMEM=y | 90 | CONFIG_SHMEM=y |
90 | CONFIG_AIO=y | 91 | CONFIG_AIO=y |
91 | CONFIG_HAVE_PERF_COUNTERS=y | 92 | CONFIG_HAVE_PERF_EVENTS=y |
93 | CONFIG_PERF_USE_VMALLOC=y | ||
92 | 94 | ||
93 | # | 95 | # |
94 | # Performance Counters | 96 | # Kernel Performance Events And Counters |
95 | # | 97 | # |
98 | # CONFIG_PERF_EVENTS is not set | ||
96 | # CONFIG_PERF_COUNTERS is not set | 99 | # CONFIG_PERF_COUNTERS is not set |
97 | CONFIG_VM_EVENT_COUNTERS=y | 100 | CONFIG_VM_EVENT_COUNTERS=y |
98 | CONFIG_PCI_QUIRKS=y | 101 | CONFIG_PCI_QUIRKS=y |
99 | # CONFIG_STRIP_ASM_SYMS is not set | ||
100 | CONFIG_COMPAT_BRK=y | 102 | CONFIG_COMPAT_BRK=y |
101 | CONFIG_SLAB=y | 103 | CONFIG_SLAB=y |
102 | # CONFIG_SLUB is not set | 104 | # CONFIG_SLUB is not set |
103 | # CONFIG_SLOB is not set | 105 | # CONFIG_SLOB is not set |
104 | # CONFIG_PROFILING is not set | 106 | # CONFIG_PROFILING is not set |
105 | # CONFIG_MARKERS is not set | ||
106 | CONFIG_HAVE_OPROFILE=y | 107 | CONFIG_HAVE_OPROFILE=y |
107 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 108 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
108 | CONFIG_HAVE_DMA_ATTRS=y | 109 | CONFIG_HAVE_DMA_ATTRS=y |
@@ -131,14 +132,41 @@ CONFIG_LBDAF=y | |||
131 | # IO Schedulers | 132 | # IO Schedulers |
132 | # | 133 | # |
133 | CONFIG_IOSCHED_NOOP=y | 134 | CONFIG_IOSCHED_NOOP=y |
134 | CONFIG_IOSCHED_AS=y | ||
135 | CONFIG_IOSCHED_DEADLINE=y | 135 | CONFIG_IOSCHED_DEADLINE=y |
136 | CONFIG_IOSCHED_CFQ=y | 136 | CONFIG_IOSCHED_CFQ=y |
137 | # CONFIG_DEFAULT_AS is not set | ||
138 | # CONFIG_DEFAULT_DEADLINE is not set | 137 | # CONFIG_DEFAULT_DEADLINE is not set |
139 | CONFIG_DEFAULT_CFQ=y | 138 | CONFIG_DEFAULT_CFQ=y |
140 | # CONFIG_DEFAULT_NOOP is not set | 139 | # CONFIG_DEFAULT_NOOP is not set |
141 | CONFIG_DEFAULT_IOSCHED="cfq" | 140 | CONFIG_DEFAULT_IOSCHED="cfq" |
141 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
142 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
143 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
144 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
145 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
146 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
147 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
148 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
149 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
150 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
151 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
152 | # CONFIG_INLINE_READ_LOCK is not set | ||
153 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
154 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
155 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
156 | CONFIG_INLINE_READ_UNLOCK=y | ||
157 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
158 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
159 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
160 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
161 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
162 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
163 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
164 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
165 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
166 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
167 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
168 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
169 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
142 | # CONFIG_FREEZER is not set | 170 | # CONFIG_FREEZER is not set |
143 | 171 | ||
144 | # | 172 | # |
@@ -168,8 +196,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
168 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 196 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
169 | CONFIG_ZONE_DMA_FLAG=1 | 197 | CONFIG_ZONE_DMA_FLAG=1 |
170 | CONFIG_BOUNCE=y | 198 | CONFIG_BOUNCE=y |
171 | CONFIG_HAVE_MLOCK=y | 199 | # CONFIG_KSM is not set |
172 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
173 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 200 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
174 | CONFIG_SUN_PM=y | 201 | CONFIG_SUN_PM=y |
175 | # CONFIG_SPARC_LED is not set | 202 | # CONFIG_SPARC_LED is not set |
@@ -257,6 +284,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m | |||
257 | CONFIG_INET6_XFRM_MODE_BEET=m | 284 | CONFIG_INET6_XFRM_MODE_BEET=m |
258 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | 285 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set |
259 | CONFIG_IPV6_SIT=m | 286 | CONFIG_IPV6_SIT=m |
287 | # CONFIG_IPV6_SIT_6RD is not set | ||
260 | CONFIG_IPV6_NDISC_NODETYPE=y | 288 | CONFIG_IPV6_NDISC_NODETYPE=y |
261 | CONFIG_IPV6_TUNNEL=m | 289 | CONFIG_IPV6_TUNNEL=m |
262 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 290 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
@@ -295,9 +323,6 @@ CONFIG_NET_PKTGEN=m | |||
295 | # CONFIG_AF_RXRPC is not set | 323 | # CONFIG_AF_RXRPC is not set |
296 | CONFIG_WIRELESS=y | 324 | CONFIG_WIRELESS=y |
297 | # CONFIG_CFG80211 is not set | 325 | # CONFIG_CFG80211 is not set |
298 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
299 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
300 | # CONFIG_WIRELESS_EXT is not set | ||
301 | # CONFIG_LIB80211 is not set | 326 | # CONFIG_LIB80211 is not set |
302 | 327 | ||
303 | # | 328 | # |
@@ -335,6 +360,10 @@ CONFIG_BLK_DEV=y | |||
335 | # CONFIG_BLK_DEV_COW_COMMON is not set | 360 | # CONFIG_BLK_DEV_COW_COMMON is not set |
336 | CONFIG_BLK_DEV_LOOP=m | 361 | CONFIG_BLK_DEV_LOOP=m |
337 | CONFIG_BLK_DEV_CRYPTOLOOP=m | 362 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
363 | |||
364 | # | ||
365 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
366 | # | ||
338 | # CONFIG_BLK_DEV_NBD is not set | 367 | # CONFIG_BLK_DEV_NBD is not set |
339 | # CONFIG_BLK_DEV_SX8 is not set | 368 | # CONFIG_BLK_DEV_SX8 is not set |
340 | CONFIG_BLK_DEV_RAM=y | 369 | CONFIG_BLK_DEV_RAM=y |
@@ -398,8 +427,11 @@ CONFIG_SCSI_LOWLEVEL=y | |||
398 | # CONFIG_ISCSI_TCP is not set | 427 | # CONFIG_ISCSI_TCP is not set |
399 | # CONFIG_SCSI_CXGB3_ISCSI is not set | 428 | # CONFIG_SCSI_CXGB3_ISCSI is not set |
400 | # CONFIG_SCSI_BNX2_ISCSI is not set | 429 | # CONFIG_SCSI_BNX2_ISCSI is not set |
430 | # CONFIG_BE2ISCSI is not set | ||
401 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 431 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
432 | # CONFIG_SCSI_HPSA is not set | ||
402 | # CONFIG_SCSI_3W_9XXX is not set | 433 | # CONFIG_SCSI_3W_9XXX is not set |
434 | # CONFIG_SCSI_3W_SAS is not set | ||
403 | # CONFIG_SCSI_ACARD is not set | 435 | # CONFIG_SCSI_ACARD is not set |
404 | # CONFIG_SCSI_AACRAID is not set | 436 | # CONFIG_SCSI_AACRAID is not set |
405 | # CONFIG_SCSI_AIC7XXX is not set | 437 | # CONFIG_SCSI_AIC7XXX is not set |
@@ -434,7 +466,9 @@ CONFIG_SCSI_QLOGICPTI=m | |||
434 | # CONFIG_SCSI_DEBUG is not set | 466 | # CONFIG_SCSI_DEBUG is not set |
435 | CONFIG_SCSI_SUNESP=y | 467 | CONFIG_SCSI_SUNESP=y |
436 | # CONFIG_SCSI_PMCRAID is not set | 468 | # CONFIG_SCSI_PMCRAID is not set |
469 | # CONFIG_SCSI_PM8001 is not set | ||
437 | # CONFIG_SCSI_SRP is not set | 470 | # CONFIG_SCSI_SRP is not set |
471 | # CONFIG_SCSI_BFA_FC is not set | ||
438 | # CONFIG_SCSI_DH is not set | 472 | # CONFIG_SCSI_DH is not set |
439 | # CONFIG_SCSI_OSD_INITIATOR is not set | 473 | # CONFIG_SCSI_OSD_INITIATOR is not set |
440 | # CONFIG_ATA is not set | 474 | # CONFIG_ATA is not set |
@@ -450,7 +484,7 @@ CONFIG_SCSI_SUNESP=y | |||
450 | # | 484 | # |
451 | 485 | ||
452 | # | 486 | # |
453 | # See the help texts for more information. | 487 | # The newer stack is recommended. |
454 | # | 488 | # |
455 | # CONFIG_FIREWIRE is not set | 489 | # CONFIG_FIREWIRE is not set |
456 | # CONFIG_IEEE1394 is not set | 490 | # CONFIG_IEEE1394 is not set |
@@ -487,6 +521,7 @@ CONFIG_SUNQE=m | |||
487 | # CONFIG_NET_PCI is not set | 521 | # CONFIG_NET_PCI is not set |
488 | # CONFIG_B44 is not set | 522 | # CONFIG_B44 is not set |
489 | # CONFIG_KS8842 is not set | 523 | # CONFIG_KS8842 is not set |
524 | # CONFIG_KS8851_MLL is not set | ||
490 | # CONFIG_ATL2 is not set | 525 | # CONFIG_ATL2 is not set |
491 | CONFIG_NETDEV_1000=y | 526 | CONFIG_NETDEV_1000=y |
492 | # CONFIG_ACENIC is not set | 527 | # CONFIG_ACENIC is not set |
@@ -546,6 +581,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
546 | # CONFIG_NETCONSOLE is not set | 581 | # CONFIG_NETCONSOLE is not set |
547 | # CONFIG_NETPOLL is not set | 582 | # CONFIG_NETPOLL is not set |
548 | # CONFIG_NET_POLL_CONTROLLER is not set | 583 | # CONFIG_NET_POLL_CONTROLLER is not set |
584 | # CONFIG_VMXNET3 is not set | ||
549 | # CONFIG_ISDN is not set | 585 | # CONFIG_ISDN is not set |
550 | # CONFIG_PHONE is not set | 586 | # CONFIG_PHONE is not set |
551 | 587 | ||
@@ -555,6 +591,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
555 | CONFIG_INPUT=y | 591 | CONFIG_INPUT=y |
556 | # CONFIG_INPUT_FF_MEMLESS is not set | 592 | # CONFIG_INPUT_FF_MEMLESS is not set |
557 | # CONFIG_INPUT_POLLDEV is not set | 593 | # CONFIG_INPUT_POLLDEV is not set |
594 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
558 | 595 | ||
559 | # | 596 | # |
560 | # Userland interfaces | 597 | # Userland interfaces |
@@ -574,6 +611,7 @@ CONFIG_INPUT_KEYBOARD=y | |||
574 | CONFIG_KEYBOARD_ATKBD=m | 611 | CONFIG_KEYBOARD_ATKBD=m |
575 | # CONFIG_KEYBOARD_LKKBD is not set | 612 | # CONFIG_KEYBOARD_LKKBD is not set |
576 | # CONFIG_KEYBOARD_NEWTON is not set | 613 | # CONFIG_KEYBOARD_NEWTON is not set |
614 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
577 | # CONFIG_KEYBOARD_STOWAWAY is not set | 615 | # CONFIG_KEYBOARD_STOWAWAY is not set |
578 | CONFIG_KEYBOARD_SUNKBD=m | 616 | CONFIG_KEYBOARD_SUNKBD=m |
579 | # CONFIG_KEYBOARD_XTKBD is not set | 617 | # CONFIG_KEYBOARD_XTKBD is not set |
@@ -604,6 +642,7 @@ CONFIG_SERIO_SERPORT=m | |||
604 | # CONFIG_SERIO_PCIPS2 is not set | 642 | # CONFIG_SERIO_PCIPS2 is not set |
605 | CONFIG_SERIO_LIBPS2=m | 643 | CONFIG_SERIO_LIBPS2=m |
606 | # CONFIG_SERIO_RAW is not set | 644 | # CONFIG_SERIO_RAW is not set |
645 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
607 | # CONFIG_GAMEPORT is not set | 646 | # CONFIG_GAMEPORT is not set |
608 | 647 | ||
609 | # | 648 | # |
@@ -636,6 +675,7 @@ CONFIG_SERIAL_CORE=y | |||
636 | CONFIG_SERIAL_CORE_CONSOLE=y | 675 | CONFIG_SERIAL_CORE_CONSOLE=y |
637 | CONFIG_CONSOLE_POLL=y | 676 | CONFIG_CONSOLE_POLL=y |
638 | # CONFIG_SERIAL_JSM is not set | 677 | # CONFIG_SERIAL_JSM is not set |
678 | # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set | ||
639 | CONFIG_UNIX98_PTYS=y | 679 | CONFIG_UNIX98_PTYS=y |
640 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 680 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
641 | CONFIG_LEGACY_PTYS=y | 681 | CONFIG_LEGACY_PTYS=y |
@@ -661,6 +701,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | |||
661 | # CONFIG_POWER_SUPPLY is not set | 701 | # CONFIG_POWER_SUPPLY is not set |
662 | CONFIG_HWMON=y | 702 | CONFIG_HWMON=y |
663 | # CONFIG_HWMON_VID is not set | 703 | # CONFIG_HWMON_VID is not set |
704 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
705 | |||
706 | # | ||
707 | # Native drivers | ||
708 | # | ||
664 | # CONFIG_SENSORS_I5K_AMB is not set | 709 | # CONFIG_SENSORS_I5K_AMB is not set |
665 | # CONFIG_SENSORS_F71805F is not set | 710 | # CONFIG_SENSORS_F71805F is not set |
666 | # CONFIG_SENSORS_F71882FG is not set | 711 | # CONFIG_SENSORS_F71882FG is not set |
@@ -675,9 +720,7 @@ CONFIG_HWMON=y | |||
675 | # CONFIG_SENSORS_VT8231 is not set | 720 | # CONFIG_SENSORS_VT8231 is not set |
676 | # CONFIG_SENSORS_W83627HF is not set | 721 | # CONFIG_SENSORS_W83627HF is not set |
677 | # CONFIG_SENSORS_W83627EHF is not set | 722 | # CONFIG_SENSORS_W83627EHF is not set |
678 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
679 | # CONFIG_THERMAL is not set | 723 | # CONFIG_THERMAL is not set |
680 | # CONFIG_THERMAL_HWMON is not set | ||
681 | # CONFIG_WATCHDOG is not set | 724 | # CONFIG_WATCHDOG is not set |
682 | CONFIG_SSB_POSSIBLE=y | 725 | CONFIG_SSB_POSSIBLE=y |
683 | 726 | ||
@@ -699,6 +742,7 @@ CONFIG_SSB_POSSIBLE=y | |||
699 | # | 742 | # |
700 | # Graphics support | 743 | # Graphics support |
701 | # | 744 | # |
745 | CONFIG_VGA_ARB=y | ||
702 | # CONFIG_VGASTATE is not set | 746 | # CONFIG_VGASTATE is not set |
703 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 747 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
704 | # CONFIG_FB is not set | 748 | # CONFIG_FB is not set |
@@ -776,7 +820,9 @@ CONFIG_RTC_INTF_DEV=y | |||
776 | # CONFIG_RTC_DRV_M48T86 is not set | 820 | # CONFIG_RTC_DRV_M48T86 is not set |
777 | # CONFIG_RTC_DRV_M48T35 is not set | 821 | # CONFIG_RTC_DRV_M48T35 is not set |
778 | CONFIG_RTC_DRV_M48T59=y | 822 | CONFIG_RTC_DRV_M48T59=y |
823 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
779 | # CONFIG_RTC_DRV_BQ4802 is not set | 824 | # CONFIG_RTC_DRV_BQ4802 is not set |
825 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
780 | # CONFIG_RTC_DRV_V3020 is not set | 826 | # CONFIG_RTC_DRV_V3020 is not set |
781 | 827 | ||
782 | # | 828 | # |
@@ -955,6 +1001,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
955 | CONFIG_ENABLE_MUST_CHECK=y | 1001 | CONFIG_ENABLE_MUST_CHECK=y |
956 | CONFIG_FRAME_WARN=1024 | 1002 | CONFIG_FRAME_WARN=1024 |
957 | CONFIG_MAGIC_SYSRQ=y | 1003 | CONFIG_MAGIC_SYSRQ=y |
1004 | # CONFIG_STRIP_ASM_SYMS is not set | ||
958 | # CONFIG_UNUSED_SYMBOLS is not set | 1005 | # CONFIG_UNUSED_SYMBOLS is not set |
959 | # CONFIG_DEBUG_FS is not set | 1006 | # CONFIG_DEBUG_FS is not set |
960 | # CONFIG_HEADERS_CHECK is not set | 1007 | # CONFIG_HEADERS_CHECK is not set |
@@ -1003,9 +1050,9 @@ CONFIG_KGDB=y | |||
1003 | CONFIG_KGDB_SERIAL_CONSOLE=y | 1050 | CONFIG_KGDB_SERIAL_CONSOLE=y |
1004 | CONFIG_KGDB_TESTS=y | 1051 | CONFIG_KGDB_TESTS=y |
1005 | # CONFIG_KGDB_TESTS_ON_BOOT is not set | 1052 | # CONFIG_KGDB_TESTS_ON_BOOT is not set |
1006 | # CONFIG_KMEMCHECK is not set | ||
1007 | # CONFIG_DEBUG_STACK_USAGE is not set | 1053 | # CONFIG_DEBUG_STACK_USAGE is not set |
1008 | # CONFIG_STACK_DEBUG is not set | 1054 | # CONFIG_STACK_DEBUG is not set |
1055 | # CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set | ||
1009 | 1056 | ||
1010 | # | 1057 | # |
1011 | # Security options | 1058 | # Security options |
@@ -1013,7 +1060,11 @@ CONFIG_KGDB_TESTS=y | |||
1013 | # CONFIG_KEYS is not set | 1060 | # CONFIG_KEYS is not set |
1014 | # CONFIG_SECURITY is not set | 1061 | # CONFIG_SECURITY is not set |
1015 | # CONFIG_SECURITYFS is not set | 1062 | # CONFIG_SECURITYFS is not set |
1016 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1063 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
1064 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
1065 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
1066 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
1067 | CONFIG_DEFAULT_SECURITY="" | ||
1017 | CONFIG_CRYPTO=y | 1068 | CONFIG_CRYPTO=y |
1018 | 1069 | ||
1019 | # | 1070 | # |
diff --git a/arch/sparc/configs/sparc64_defconfig b/arch/sparc/configs/sparc64_defconfig index f80b881dfea7..41c5a56aa6f2 100644 --- a/arch/sparc/configs/sparc64_defconfig +++ b/arch/sparc/configs/sparc64_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.31 | 3 | # Linux kernel version: 2.6.33-rc2 |
4 | # Tue Sep 15 17:06:03 2009 | 4 | # Wed Jan 20 16:31:47 2010 |
5 | # | 5 | # |
6 | CONFIG_64BIT=y | 6 | CONFIG_64BIT=y |
7 | CONFIG_SPARC=y | 7 | CONFIG_SPARC=y |
@@ -20,6 +20,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y | |||
20 | CONFIG_AUDIT_ARCH=y | 20 | CONFIG_AUDIT_ARCH=y |
21 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | 21 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y |
22 | CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y | 22 | CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y |
23 | CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y | ||
23 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
24 | CONFIG_MMU=y | 25 | CONFIG_MMU=y |
25 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | 26 | CONFIG_ARCH_NO_VIRT_TO_BUS=y |
@@ -50,6 +51,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y | |||
50 | # | 51 | # |
51 | CONFIG_TREE_RCU=y | 52 | CONFIG_TREE_RCU=y |
52 | # CONFIG_TREE_PREEMPT_RCU is not set | 53 | # CONFIG_TREE_PREEMPT_RCU is not set |
54 | # CONFIG_TINY_RCU is not set | ||
53 | # CONFIG_RCU_TRACE is not set | 55 | # CONFIG_RCU_TRACE is not set |
54 | CONFIG_RCU_FANOUT=64 | 56 | CONFIG_RCU_FANOUT=64 |
55 | # CONFIG_RCU_FANOUT_EXACT is not set | 57 | # CONFIG_RCU_FANOUT_EXACT is not set |
@@ -62,8 +64,7 @@ CONFIG_RT_GROUP_SCHED=y | |||
62 | CONFIG_USER_SCHED=y | 64 | CONFIG_USER_SCHED=y |
63 | # CONFIG_CGROUP_SCHED is not set | 65 | # CONFIG_CGROUP_SCHED is not set |
64 | # CONFIG_CGROUPS is not set | 66 | # CONFIG_CGROUPS is not set |
65 | CONFIG_SYSFS_DEPRECATED=y | 67 | # CONFIG_SYSFS_DEPRECATED_V2 is not set |
66 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
67 | CONFIG_RELAY=y | 68 | CONFIG_RELAY=y |
68 | CONFIG_NAMESPACES=y | 69 | CONFIG_NAMESPACES=y |
69 | # CONFIG_UTS_NS is not set | 70 | # CONFIG_UTS_NS is not set |
@@ -97,24 +98,25 @@ CONFIG_TIMERFD=y | |||
97 | CONFIG_EVENTFD=y | 98 | CONFIG_EVENTFD=y |
98 | CONFIG_SHMEM=y | 99 | CONFIG_SHMEM=y |
99 | CONFIG_AIO=y | 100 | CONFIG_AIO=y |
100 | CONFIG_HAVE_PERF_COUNTERS=y | 101 | CONFIG_HAVE_PERF_EVENTS=y |
102 | CONFIG_PERF_USE_VMALLOC=y | ||
101 | 103 | ||
102 | # | 104 | # |
103 | # Performance Counters | 105 | # Kernel Performance Events And Counters |
104 | # | 106 | # |
105 | CONFIG_PERF_COUNTERS=y | 107 | CONFIG_PERF_EVENTS=y |
106 | CONFIG_EVENT_PROFILE=y | 108 | CONFIG_EVENT_PROFILE=y |
109 | CONFIG_PERF_COUNTERS=y | ||
110 | # CONFIG_DEBUG_PERF_USE_VMALLOC is not set | ||
107 | CONFIG_VM_EVENT_COUNTERS=y | 111 | CONFIG_VM_EVENT_COUNTERS=y |
108 | CONFIG_PCI_QUIRKS=y | 112 | CONFIG_PCI_QUIRKS=y |
109 | CONFIG_SLUB_DEBUG=y | 113 | CONFIG_SLUB_DEBUG=y |
110 | # CONFIG_STRIP_ASM_SYMS is not set | ||
111 | # CONFIG_COMPAT_BRK is not set | 114 | # CONFIG_COMPAT_BRK is not set |
112 | # CONFIG_SLAB is not set | 115 | # CONFIG_SLAB is not set |
113 | CONFIG_SLUB=y | 116 | CONFIG_SLUB=y |
114 | # CONFIG_SLOB is not set | 117 | # CONFIG_SLOB is not set |
115 | CONFIG_PROFILING=y | 118 | CONFIG_PROFILING=y |
116 | CONFIG_TRACEPOINTS=y | 119 | CONFIG_TRACEPOINTS=y |
117 | CONFIG_MARKERS=y | ||
118 | CONFIG_OPROFILE=m | 120 | CONFIG_OPROFILE=m |
119 | CONFIG_HAVE_OPROFILE=y | 121 | CONFIG_HAVE_OPROFILE=y |
120 | CONFIG_KPROBES=y | 122 | CONFIG_KPROBES=y |
@@ -152,14 +154,41 @@ CONFIG_BLOCK_COMPAT=y | |||
152 | # IO Schedulers | 154 | # IO Schedulers |
153 | # | 155 | # |
154 | CONFIG_IOSCHED_NOOP=y | 156 | CONFIG_IOSCHED_NOOP=y |
155 | CONFIG_IOSCHED_AS=y | ||
156 | CONFIG_IOSCHED_DEADLINE=y | 157 | CONFIG_IOSCHED_DEADLINE=y |
157 | CONFIG_IOSCHED_CFQ=y | 158 | CONFIG_IOSCHED_CFQ=y |
158 | CONFIG_DEFAULT_AS=y | ||
159 | # CONFIG_DEFAULT_DEADLINE is not set | 159 | # CONFIG_DEFAULT_DEADLINE is not set |
160 | # CONFIG_DEFAULT_CFQ is not set | 160 | CONFIG_DEFAULT_CFQ=y |
161 | # CONFIG_DEFAULT_NOOP is not set | 161 | # CONFIG_DEFAULT_NOOP is not set |
162 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 162 | CONFIG_DEFAULT_IOSCHED="cfq" |
163 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
164 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
165 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
166 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
167 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
168 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
169 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
170 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
171 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
172 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
173 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
174 | # CONFIG_INLINE_READ_LOCK is not set | ||
175 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
176 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
177 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
178 | CONFIG_INLINE_READ_UNLOCK=y | ||
179 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
180 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
181 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
182 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
183 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
184 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
185 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
186 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
187 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
188 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
189 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
190 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
191 | CONFIG_MUTEX_SPIN_ON_OWNER=y | ||
163 | # CONFIG_FREEZER is not set | 192 | # CONFIG_FREEZER is not set |
164 | 193 | ||
165 | # | 194 | # |
@@ -179,6 +208,7 @@ CONFIG_GENERIC_HWEIGHT=y | |||
179 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 208 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
180 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | 209 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y |
181 | CONFIG_SPARC64_SMP=y | 210 | CONFIG_SPARC64_SMP=y |
211 | CONFIG_EARLYFB=y | ||
182 | CONFIG_SPARC64_PAGE_SIZE_8KB=y | 212 | CONFIG_SPARC64_PAGE_SIZE_8KB=y |
183 | # CONFIG_SPARC64_PAGE_SIZE_64KB is not set | 213 | # CONFIG_SPARC64_PAGE_SIZE_64KB is not set |
184 | CONFIG_SECCOMP=y | 214 | CONFIG_SECCOMP=y |
@@ -216,8 +246,7 @@ CONFIG_MIGRATION=y | |||
216 | CONFIG_PHYS_ADDR_T_64BIT=y | 246 | CONFIG_PHYS_ADDR_T_64BIT=y |
217 | CONFIG_ZONE_DMA_FLAG=0 | 247 | CONFIG_ZONE_DMA_FLAG=0 |
218 | CONFIG_NR_QUICK=1 | 248 | CONFIG_NR_QUICK=1 |
219 | CONFIG_HAVE_MLOCK=y | 249 | # CONFIG_KSM is not set |
220 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
221 | CONFIG_DEFAULT_MMAP_MIN_ADDR=8192 | 250 | CONFIG_DEFAULT_MMAP_MIN_ADDR=8192 |
222 | CONFIG_SCHED_SMT=y | 251 | CONFIG_SCHED_SMT=y |
223 | CONFIG_SCHED_MC=y | 252 | CONFIG_SCHED_MC=y |
@@ -315,6 +344,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m | |||
315 | CONFIG_INET6_XFRM_MODE_BEET=m | 344 | CONFIG_INET6_XFRM_MODE_BEET=m |
316 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | 345 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set |
317 | CONFIG_IPV6_SIT=m | 346 | CONFIG_IPV6_SIT=m |
347 | # CONFIG_IPV6_SIT_6RD is not set | ||
318 | CONFIG_IPV6_NDISC_NODETYPE=y | 348 | CONFIG_IPV6_NDISC_NODETYPE=y |
319 | CONFIG_IPV6_TUNNEL=m | 349 | CONFIG_IPV6_TUNNEL=m |
320 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 350 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
@@ -356,9 +386,6 @@ CONFIG_NET_TCPPROBE=m | |||
356 | # CONFIG_AF_RXRPC is not set | 386 | # CONFIG_AF_RXRPC is not set |
357 | CONFIG_WIRELESS=y | 387 | CONFIG_WIRELESS=y |
358 | # CONFIG_CFG80211 is not set | 388 | # CONFIG_CFG80211 is not set |
359 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
360 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
361 | # CONFIG_WIRELESS_EXT is not set | ||
362 | # CONFIG_LIB80211 is not set | 389 | # CONFIG_LIB80211 is not set |
363 | 390 | ||
364 | # | 391 | # |
@@ -376,6 +403,7 @@ CONFIG_WIRELESS_OLD_REGULATORY=y | |||
376 | # Generic Driver Options | 403 | # Generic Driver Options |
377 | # | 404 | # |
378 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 405 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
406 | # CONFIG_DEVTMPFS is not set | ||
379 | CONFIG_STANDALONE=y | 407 | CONFIG_STANDALONE=y |
380 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | 408 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set |
381 | CONFIG_FW_LOADER=y | 409 | CONFIG_FW_LOADER=y |
@@ -397,6 +425,11 @@ CONFIG_BLK_DEV=y | |||
397 | # CONFIG_BLK_DEV_COW_COMMON is not set | 425 | # CONFIG_BLK_DEV_COW_COMMON is not set |
398 | CONFIG_BLK_DEV_LOOP=m | 426 | CONFIG_BLK_DEV_LOOP=m |
399 | CONFIG_BLK_DEV_CRYPTOLOOP=m | 427 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
428 | |||
429 | # | ||
430 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
431 | # | ||
432 | # CONFIG_BLK_DEV_DRBD is not set | ||
400 | CONFIG_BLK_DEV_NBD=m | 433 | CONFIG_BLK_DEV_NBD=m |
401 | # CONFIG_BLK_DEV_SX8 is not set | 434 | # CONFIG_BLK_DEV_SX8 is not set |
402 | # CONFIG_BLK_DEV_UB is not set | 435 | # CONFIG_BLK_DEV_UB is not set |
@@ -408,6 +441,7 @@ CONFIG_ATA_OVER_ETH=m | |||
408 | CONFIG_SUNVDC=m | 441 | CONFIG_SUNVDC=m |
409 | # CONFIG_BLK_DEV_HD is not set | 442 | # CONFIG_BLK_DEV_HD is not set |
410 | CONFIG_MISC_DEVICES=y | 443 | CONFIG_MISC_DEVICES=y |
444 | # CONFIG_AD525X_DPOT is not set | ||
411 | # CONFIG_PHANTOM is not set | 445 | # CONFIG_PHANTOM is not set |
412 | # CONFIG_SGI_IOC4 is not set | 446 | # CONFIG_SGI_IOC4 is not set |
413 | # CONFIG_TIFM_CORE is not set | 447 | # CONFIG_TIFM_CORE is not set |
@@ -415,6 +449,7 @@ CONFIG_MISC_DEVICES=y | |||
415 | # CONFIG_ENCLOSURE_SERVICES is not set | 449 | # CONFIG_ENCLOSURE_SERVICES is not set |
416 | # CONFIG_HP_ILO is not set | 450 | # CONFIG_HP_ILO is not set |
417 | # CONFIG_ISL29003 is not set | 451 | # CONFIG_ISL29003 is not set |
452 | # CONFIG_DS1682 is not set | ||
418 | # CONFIG_C2PORT is not set | 453 | # CONFIG_C2PORT is not set |
419 | 454 | ||
420 | # | 455 | # |
@@ -522,8 +557,11 @@ CONFIG_SCSI_LOWLEVEL=y | |||
522 | # CONFIG_ISCSI_TCP is not set | 557 | # CONFIG_ISCSI_TCP is not set |
523 | # CONFIG_SCSI_CXGB3_ISCSI is not set | 558 | # CONFIG_SCSI_CXGB3_ISCSI is not set |
524 | # CONFIG_SCSI_BNX2_ISCSI is not set | 559 | # CONFIG_SCSI_BNX2_ISCSI is not set |
560 | # CONFIG_BE2ISCSI is not set | ||
525 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 561 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
562 | # CONFIG_SCSI_HPSA is not set | ||
526 | # CONFIG_SCSI_3W_9XXX is not set | 563 | # CONFIG_SCSI_3W_9XXX is not set |
564 | # CONFIG_SCSI_3W_SAS is not set | ||
527 | # CONFIG_SCSI_ACARD is not set | 565 | # CONFIG_SCSI_ACARD is not set |
528 | # CONFIG_SCSI_AACRAID is not set | 566 | # CONFIG_SCSI_AACRAID is not set |
529 | # CONFIG_SCSI_AIC7XXX is not set | 567 | # CONFIG_SCSI_AIC7XXX is not set |
@@ -557,7 +595,9 @@ CONFIG_SCSI_LOWLEVEL=y | |||
557 | # CONFIG_SCSI_DEBUG is not set | 595 | # CONFIG_SCSI_DEBUG is not set |
558 | # CONFIG_SCSI_SUNESP is not set | 596 | # CONFIG_SCSI_SUNESP is not set |
559 | # CONFIG_SCSI_PMCRAID is not set | 597 | # CONFIG_SCSI_PMCRAID is not set |
598 | # CONFIG_SCSI_PM8001 is not set | ||
560 | # CONFIG_SCSI_SRP is not set | 599 | # CONFIG_SCSI_SRP is not set |
600 | # CONFIG_SCSI_BFA_FC is not set | ||
561 | # CONFIG_SCSI_DH is not set | 601 | # CONFIG_SCSI_DH is not set |
562 | # CONFIG_SCSI_OSD_INITIATOR is not set | 602 | # CONFIG_SCSI_OSD_INITIATOR is not set |
563 | # CONFIG_ATA is not set | 603 | # CONFIG_ATA is not set |
@@ -568,7 +608,9 @@ CONFIG_MD_RAID0=m | |||
568 | CONFIG_MD_RAID1=m | 608 | CONFIG_MD_RAID1=m |
569 | CONFIG_MD_RAID10=m | 609 | CONFIG_MD_RAID10=m |
570 | CONFIG_MD_RAID456=m | 610 | CONFIG_MD_RAID456=m |
611 | # CONFIG_MULTICORE_RAID456 is not set | ||
571 | CONFIG_MD_RAID6_PQ=m | 612 | CONFIG_MD_RAID6_PQ=m |
613 | # CONFIG_ASYNC_RAID6_TEST is not set | ||
572 | CONFIG_MD_MULTIPATH=m | 614 | CONFIG_MD_MULTIPATH=m |
573 | # CONFIG_MD_FAULTY is not set | 615 | # CONFIG_MD_FAULTY is not set |
574 | CONFIG_BLK_DEV_DM=m | 616 | CONFIG_BLK_DEV_DM=m |
@@ -592,7 +634,7 @@ CONFIG_DM_ZERO=m | |||
592 | # | 634 | # |
593 | 635 | ||
594 | # | 636 | # |
595 | # See the help texts for more information. | 637 | # The newer stack is recommended. |
596 | # | 638 | # |
597 | # CONFIG_FIREWIRE is not set | 639 | # CONFIG_FIREWIRE is not set |
598 | # CONFIG_IEEE1394 is not set | 640 | # CONFIG_IEEE1394 is not set |
@@ -664,6 +706,7 @@ CONFIG_NET_PCI=y | |||
664 | # CONFIG_SUNDANCE is not set | 706 | # CONFIG_SUNDANCE is not set |
665 | # CONFIG_TLAN is not set | 707 | # CONFIG_TLAN is not set |
666 | # CONFIG_KS8842 is not set | 708 | # CONFIG_KS8842 is not set |
709 | # CONFIG_KS8851_MLL is not set | ||
667 | # CONFIG_VIA_RHINE is not set | 710 | # CONFIG_VIA_RHINE is not set |
668 | # CONFIG_SC92031 is not set | 711 | # CONFIG_SC92031 is not set |
669 | # CONFIG_ATL2 is not set | 712 | # CONFIG_ATL2 is not set |
@@ -745,6 +788,7 @@ CONFIG_SLHC=m | |||
745 | # CONFIG_NETCONSOLE is not set | 788 | # CONFIG_NETCONSOLE is not set |
746 | # CONFIG_NETPOLL is not set | 789 | # CONFIG_NETPOLL is not set |
747 | # CONFIG_NET_POLL_CONTROLLER is not set | 790 | # CONFIG_NET_POLL_CONTROLLER is not set |
791 | # CONFIG_VMXNET3 is not set | ||
748 | # CONFIG_ISDN is not set | 792 | # CONFIG_ISDN is not set |
749 | # CONFIG_PHONE is not set | 793 | # CONFIG_PHONE is not set |
750 | 794 | ||
@@ -754,6 +798,7 @@ CONFIG_SLHC=m | |||
754 | CONFIG_INPUT=y | 798 | CONFIG_INPUT=y |
755 | # CONFIG_INPUT_FF_MEMLESS is not set | 799 | # CONFIG_INPUT_FF_MEMLESS is not set |
756 | # CONFIG_INPUT_POLLDEV is not set | 800 | # CONFIG_INPUT_POLLDEV is not set |
801 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
757 | 802 | ||
758 | # | 803 | # |
759 | # Userland interfaces | 804 | # Userland interfaces |
@@ -770,9 +815,13 @@ CONFIG_INPUT_EVDEV=y | |||
770 | # Input Device Drivers | 815 | # Input Device Drivers |
771 | # | 816 | # |
772 | CONFIG_INPUT_KEYBOARD=y | 817 | CONFIG_INPUT_KEYBOARD=y |
818 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
773 | CONFIG_KEYBOARD_ATKBD=y | 819 | CONFIG_KEYBOARD_ATKBD=y |
820 | # CONFIG_QT2160 is not set | ||
774 | CONFIG_KEYBOARD_LKKBD=m | 821 | CONFIG_KEYBOARD_LKKBD=m |
822 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
775 | # CONFIG_KEYBOARD_NEWTON is not set | 823 | # CONFIG_KEYBOARD_NEWTON is not set |
824 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
776 | # CONFIG_KEYBOARD_STOWAWAY is not set | 825 | # CONFIG_KEYBOARD_STOWAWAY is not set |
777 | CONFIG_KEYBOARD_SUNKBD=y | 826 | CONFIG_KEYBOARD_SUNKBD=y |
778 | # CONFIG_KEYBOARD_XTKBD is not set | 827 | # CONFIG_KEYBOARD_XTKBD is not set |
@@ -812,6 +861,7 @@ CONFIG_SERIO_I8042=y | |||
812 | CONFIG_SERIO_PCIPS2=m | 861 | CONFIG_SERIO_PCIPS2=m |
813 | CONFIG_SERIO_LIBPS2=y | 862 | CONFIG_SERIO_LIBPS2=y |
814 | CONFIG_SERIO_RAW=m | 863 | CONFIG_SERIO_RAW=m |
864 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
815 | # CONFIG_GAMEPORT is not set | 865 | # CONFIG_GAMEPORT is not set |
816 | 866 | ||
817 | # | 867 | # |
@@ -844,6 +894,7 @@ CONFIG_SERIAL_SUNHV=y | |||
844 | CONFIG_SERIAL_CORE=y | 894 | CONFIG_SERIAL_CORE=y |
845 | CONFIG_SERIAL_CORE_CONSOLE=y | 895 | CONFIG_SERIAL_CORE_CONSOLE=y |
846 | # CONFIG_SERIAL_JSM is not set | 896 | # CONFIG_SERIAL_JSM is not set |
897 | # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set | ||
847 | CONFIG_UNIX98_PTYS=y | 898 | CONFIG_UNIX98_PTYS=y |
848 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 899 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
849 | # CONFIG_LEGACY_PTYS is not set | 900 | # CONFIG_LEGACY_PTYS is not set |
@@ -858,6 +909,7 @@ CONFIG_HW_RANDOM_N2RNG=m | |||
858 | CONFIG_DEVPORT=y | 909 | CONFIG_DEVPORT=y |
859 | CONFIG_I2C=y | 910 | CONFIG_I2C=y |
860 | CONFIG_I2C_BOARDINFO=y | 911 | CONFIG_I2C_BOARDINFO=y |
912 | CONFIG_I2C_COMPAT=y | ||
861 | # CONFIG_I2C_CHARDEV is not set | 913 | # CONFIG_I2C_CHARDEV is not set |
862 | CONFIG_I2C_HELPER_AUTO=y | 914 | CONFIG_I2C_HELPER_AUTO=y |
863 | CONFIG_I2C_ALGOBIT=y | 915 | CONFIG_I2C_ALGOBIT=y |
@@ -898,11 +950,6 @@ CONFIG_I2C_ALGOBIT=y | |||
898 | # CONFIG_I2C_TINY_USB is not set | 950 | # CONFIG_I2C_TINY_USB is not set |
899 | 951 | ||
900 | # | 952 | # |
901 | # Graphics adapter I2C/DDC channel drivers | ||
902 | # | ||
903 | # CONFIG_I2C_VOODOO3 is not set | ||
904 | |||
905 | # | ||
906 | # Other I2C/SMBus bus drivers | 953 | # Other I2C/SMBus bus drivers |
907 | # | 954 | # |
908 | # CONFIG_I2C_PCA_PLATFORM is not set | 955 | # CONFIG_I2C_PCA_PLATFORM is not set |
@@ -911,10 +958,6 @@ CONFIG_I2C_ALGOBIT=y | |||
911 | # | 958 | # |
912 | # Miscellaneous I2C Chip support | 959 | # Miscellaneous I2C Chip support |
913 | # | 960 | # |
914 | # CONFIG_DS1682 is not set | ||
915 | # CONFIG_SENSORS_PCF8574 is not set | ||
916 | # CONFIG_PCF8575 is not set | ||
917 | # CONFIG_SENSORS_PCA9539 is not set | ||
918 | # CONFIG_SENSORS_TSL2550 is not set | 961 | # CONFIG_SENSORS_TSL2550 is not set |
919 | # CONFIG_I2C_DEBUG_CORE is not set | 962 | # CONFIG_I2C_DEBUG_CORE is not set |
920 | # CONFIG_I2C_DEBUG_ALGO is not set | 963 | # CONFIG_I2C_DEBUG_ALGO is not set |
@@ -932,6 +975,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | |||
932 | # CONFIG_POWER_SUPPLY is not set | 975 | # CONFIG_POWER_SUPPLY is not set |
933 | CONFIG_HWMON=y | 976 | CONFIG_HWMON=y |
934 | # CONFIG_HWMON_VID is not set | 977 | # CONFIG_HWMON_VID is not set |
978 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
979 | |||
980 | # | ||
981 | # Native drivers | ||
982 | # | ||
935 | # CONFIG_SENSORS_AD7414 is not set | 983 | # CONFIG_SENSORS_AD7414 is not set |
936 | # CONFIG_SENSORS_AD7418 is not set | 984 | # CONFIG_SENSORS_AD7418 is not set |
937 | # CONFIG_SENSORS_ADM1021 is not set | 985 | # CONFIG_SENSORS_ADM1021 is not set |
@@ -955,6 +1003,7 @@ CONFIG_HWMON=y | |||
955 | # CONFIG_SENSORS_GL520SM is not set | 1003 | # CONFIG_SENSORS_GL520SM is not set |
956 | # CONFIG_SENSORS_IT87 is not set | 1004 | # CONFIG_SENSORS_IT87 is not set |
957 | # CONFIG_SENSORS_LM63 is not set | 1005 | # CONFIG_SENSORS_LM63 is not set |
1006 | # CONFIG_SENSORS_LM73 is not set | ||
958 | # CONFIG_SENSORS_LM75 is not set | 1007 | # CONFIG_SENSORS_LM75 is not set |
959 | # CONFIG_SENSORS_LM77 is not set | 1008 | # CONFIG_SENSORS_LM77 is not set |
960 | # CONFIG_SENSORS_LM78 is not set | 1009 | # CONFIG_SENSORS_LM78 is not set |
@@ -981,6 +1030,7 @@ CONFIG_HWMON=y | |||
981 | # CONFIG_SENSORS_ADS7828 is not set | 1030 | # CONFIG_SENSORS_ADS7828 is not set |
982 | # CONFIG_SENSORS_THMC50 is not set | 1031 | # CONFIG_SENSORS_THMC50 is not set |
983 | # CONFIG_SENSORS_TMP401 is not set | 1032 | # CONFIG_SENSORS_TMP401 is not set |
1033 | # CONFIG_SENSORS_TMP421 is not set | ||
984 | # CONFIG_SENSORS_VIA686A is not set | 1034 | # CONFIG_SENSORS_VIA686A is not set |
985 | # CONFIG_SENSORS_VT1211 is not set | 1035 | # CONFIG_SENSORS_VT1211 is not set |
986 | # CONFIG_SENSORS_VT8231 is not set | 1036 | # CONFIG_SENSORS_VT8231 is not set |
@@ -993,9 +1043,8 @@ CONFIG_HWMON=y | |||
993 | # CONFIG_SENSORS_W83627HF is not set | 1043 | # CONFIG_SENSORS_W83627HF is not set |
994 | # CONFIG_SENSORS_W83627EHF is not set | 1044 | # CONFIG_SENSORS_W83627EHF is not set |
995 | # CONFIG_SENSORS_ULTRA45 is not set | 1045 | # CONFIG_SENSORS_ULTRA45 is not set |
996 | # CONFIG_HWMON_DEBUG_CHIP is not set | 1046 | # CONFIG_SENSORS_LIS3_I2C is not set |
997 | # CONFIG_THERMAL is not set | 1047 | # CONFIG_THERMAL is not set |
998 | # CONFIG_THERMAL_HWMON is not set | ||
999 | # CONFIG_WATCHDOG is not set | 1048 | # CONFIG_WATCHDOG is not set |
1000 | CONFIG_SSB_POSSIBLE=y | 1049 | CONFIG_SSB_POSSIBLE=y |
1001 | 1050 | ||
@@ -1013,16 +1062,20 @@ CONFIG_SSB_POSSIBLE=y | |||
1013 | # CONFIG_TWL4030_CORE is not set | 1062 | # CONFIG_TWL4030_CORE is not set |
1014 | # CONFIG_MFD_TMIO is not set | 1063 | # CONFIG_MFD_TMIO is not set |
1015 | # CONFIG_PMIC_DA903X is not set | 1064 | # CONFIG_PMIC_DA903X is not set |
1065 | # CONFIG_PMIC_ADP5520 is not set | ||
1016 | # CONFIG_MFD_WM8400 is not set | 1066 | # CONFIG_MFD_WM8400 is not set |
1067 | # CONFIG_MFD_WM831X is not set | ||
1017 | # CONFIG_MFD_WM8350_I2C is not set | 1068 | # CONFIG_MFD_WM8350_I2C is not set |
1018 | # CONFIG_MFD_PCF50633 is not set | 1069 | # CONFIG_MFD_PCF50633 is not set |
1019 | # CONFIG_AB3100_CORE is not set | 1070 | # CONFIG_AB3100_CORE is not set |
1071 | # CONFIG_MFD_88PM8607 is not set | ||
1020 | # CONFIG_REGULATOR is not set | 1072 | # CONFIG_REGULATOR is not set |
1021 | # CONFIG_MEDIA_SUPPORT is not set | 1073 | # CONFIG_MEDIA_SUPPORT is not set |
1022 | 1074 | ||
1023 | # | 1075 | # |
1024 | # Graphics support | 1076 | # Graphics support |
1025 | # | 1077 | # |
1078 | CONFIG_VGA_ARB=y | ||
1026 | # CONFIG_DRM is not set | 1079 | # CONFIG_DRM is not set |
1027 | # CONFIG_VGASTATE is not set | 1080 | # CONFIG_VGASTATE is not set |
1028 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 1081 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
@@ -1176,6 +1229,7 @@ CONFIG_SND_ALI5451=m | |||
1176 | # CONFIG_SND_OXYGEN is not set | 1229 | # CONFIG_SND_OXYGEN is not set |
1177 | # CONFIG_SND_CS4281 is not set | 1230 | # CONFIG_SND_CS4281 is not set |
1178 | # CONFIG_SND_CS46XX is not set | 1231 | # CONFIG_SND_CS46XX is not set |
1232 | # CONFIG_SND_CS5535AUDIO is not set | ||
1179 | # CONFIG_SND_CTXFI is not set | 1233 | # CONFIG_SND_CTXFI is not set |
1180 | # CONFIG_SND_DARLA20 is not set | 1234 | # CONFIG_SND_DARLA20 is not set |
1181 | # CONFIG_SND_GINA20 is not set | 1235 | # CONFIG_SND_GINA20 is not set |
@@ -1311,6 +1365,7 @@ CONFIG_USB_EHCI_HCD=m | |||
1311 | # CONFIG_USB_OXU210HP_HCD is not set | 1365 | # CONFIG_USB_OXU210HP_HCD is not set |
1312 | # CONFIG_USB_ISP116X_HCD is not set | 1366 | # CONFIG_USB_ISP116X_HCD is not set |
1313 | # CONFIG_USB_ISP1760_HCD is not set | 1367 | # CONFIG_USB_ISP1760_HCD is not set |
1368 | # CONFIG_USB_ISP1362_HCD is not set | ||
1314 | CONFIG_USB_OHCI_HCD=y | 1369 | CONFIG_USB_OHCI_HCD=y |
1315 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1370 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
1316 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1371 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
@@ -1426,6 +1481,7 @@ CONFIG_RTC_INTF_DEV=y | |||
1426 | # CONFIG_RTC_DRV_PCF8563 is not set | 1481 | # CONFIG_RTC_DRV_PCF8563 is not set |
1427 | # CONFIG_RTC_DRV_PCF8583 is not set | 1482 | # CONFIG_RTC_DRV_PCF8583 is not set |
1428 | # CONFIG_RTC_DRV_M41T80 is not set | 1483 | # CONFIG_RTC_DRV_M41T80 is not set |
1484 | # CONFIG_RTC_DRV_BQ32K is not set | ||
1429 | # CONFIG_RTC_DRV_S35390A is not set | 1485 | # CONFIG_RTC_DRV_S35390A is not set |
1430 | # CONFIG_RTC_DRV_FM3130 is not set | 1486 | # CONFIG_RTC_DRV_FM3130 is not set |
1431 | # CONFIG_RTC_DRV_RX8581 is not set | 1487 | # CONFIG_RTC_DRV_RX8581 is not set |
@@ -1447,7 +1503,9 @@ CONFIG_RTC_DRV_CMOS=y | |||
1447 | # CONFIG_RTC_DRV_M48T86 is not set | 1503 | # CONFIG_RTC_DRV_M48T86 is not set |
1448 | # CONFIG_RTC_DRV_M48T35 is not set | 1504 | # CONFIG_RTC_DRV_M48T35 is not set |
1449 | CONFIG_RTC_DRV_M48T59=y | 1505 | CONFIG_RTC_DRV_M48T59=y |
1506 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
1450 | CONFIG_RTC_DRV_BQ4802=y | 1507 | CONFIG_RTC_DRV_BQ4802=y |
1508 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
1451 | # CONFIG_RTC_DRV_V3020 is not set | 1509 | # CONFIG_RTC_DRV_V3020 is not set |
1452 | 1510 | ||
1453 | # | 1511 | # |
@@ -1625,6 +1683,7 @@ CONFIG_PRINTK_TIME=y | |||
1625 | CONFIG_ENABLE_MUST_CHECK=y | 1683 | CONFIG_ENABLE_MUST_CHECK=y |
1626 | CONFIG_FRAME_WARN=2048 | 1684 | CONFIG_FRAME_WARN=2048 |
1627 | CONFIG_MAGIC_SYSRQ=y | 1685 | CONFIG_MAGIC_SYSRQ=y |
1686 | # CONFIG_STRIP_ASM_SYMS is not set | ||
1628 | # CONFIG_UNUSED_SYMBOLS is not set | 1687 | # CONFIG_UNUSED_SYMBOLS is not set |
1629 | CONFIG_DEBUG_FS=y | 1688 | CONFIG_DEBUG_FS=y |
1630 | # CONFIG_HEADERS_CHECK is not set | 1689 | # CONFIG_HEADERS_CHECK is not set |
@@ -1678,9 +1737,11 @@ CONFIG_NOP_TRACER=y | |||
1678 | CONFIG_HAVE_FUNCTION_TRACER=y | 1737 | CONFIG_HAVE_FUNCTION_TRACER=y |
1679 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1738 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
1680 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 1739 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
1740 | CONFIG_HAVE_SYSCALL_TRACEPOINTS=y | ||
1681 | CONFIG_RING_BUFFER=y | 1741 | CONFIG_RING_BUFFER=y |
1682 | CONFIG_EVENT_TRACING=y | 1742 | CONFIG_EVENT_TRACING=y |
1683 | CONFIG_CONTEXT_SWITCH_TRACER=y | 1743 | CONFIG_CONTEXT_SWITCH_TRACER=y |
1744 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
1684 | CONFIG_TRACING=y | 1745 | CONFIG_TRACING=y |
1685 | CONFIG_GENERIC_TRACER=y | 1746 | CONFIG_GENERIC_TRACER=y |
1686 | CONFIG_TRACING_SUPPORT=y | 1747 | CONFIG_TRACING_SUPPORT=y |
@@ -1688,6 +1749,7 @@ CONFIG_FTRACE=y | |||
1688 | # CONFIG_FUNCTION_TRACER is not set | 1749 | # CONFIG_FUNCTION_TRACER is not set |
1689 | # CONFIG_IRQSOFF_TRACER is not set | 1750 | # CONFIG_IRQSOFF_TRACER is not set |
1690 | # CONFIG_SCHED_TRACER is not set | 1751 | # CONFIG_SCHED_TRACER is not set |
1752 | # CONFIG_FTRACE_SYSCALLS is not set | ||
1691 | # CONFIG_BOOT_TRACER is not set | 1753 | # CONFIG_BOOT_TRACER is not set |
1692 | CONFIG_BRANCH_PROFILE_NONE=y | 1754 | CONFIG_BRANCH_PROFILE_NONE=y |
1693 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | 1755 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set |
@@ -1706,6 +1768,7 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
1706 | # CONFIG_DEBUG_STACK_USAGE is not set | 1768 | # CONFIG_DEBUG_STACK_USAGE is not set |
1707 | # CONFIG_DEBUG_DCFLUSH is not set | 1769 | # CONFIG_DEBUG_DCFLUSH is not set |
1708 | # CONFIG_STACK_DEBUG is not set | 1770 | # CONFIG_STACK_DEBUG is not set |
1771 | # CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set | ||
1709 | 1772 | ||
1710 | # | 1773 | # |
1711 | # Security options | 1774 | # Security options |
@@ -1714,11 +1777,17 @@ CONFIG_KEYS=y | |||
1714 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set | 1777 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set |
1715 | # CONFIG_SECURITY is not set | 1778 | # CONFIG_SECURITY is not set |
1716 | # CONFIG_SECURITYFS is not set | 1779 | # CONFIG_SECURITYFS is not set |
1717 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1780 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
1781 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
1782 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
1783 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
1784 | CONFIG_DEFAULT_SECURITY="" | ||
1718 | CONFIG_XOR_BLOCKS=m | 1785 | CONFIG_XOR_BLOCKS=m |
1719 | CONFIG_ASYNC_CORE=m | 1786 | CONFIG_ASYNC_CORE=m |
1720 | CONFIG_ASYNC_MEMCPY=m | 1787 | CONFIG_ASYNC_MEMCPY=m |
1721 | CONFIG_ASYNC_XOR=m | 1788 | CONFIG_ASYNC_XOR=m |
1789 | CONFIG_ASYNC_PQ=m | ||
1790 | CONFIG_ASYNC_RAID6_RECOV=m | ||
1722 | CONFIG_CRYPTO=y | 1791 | CONFIG_CRYPTO=y |
1723 | 1792 | ||
1724 | # | 1793 | # |
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h index ff66bb88537b..e67880381b84 100644 --- a/arch/sparc/include/asm/elf_64.h +++ b/arch/sparc/include/asm/elf_64.h | |||
@@ -195,17 +195,10 @@ static inline unsigned int sparc64_elf_hwcap(void) | |||
195 | #define ELF_PLATFORM (NULL) | 195 | #define ELF_PLATFORM (NULL) |
196 | 196 | ||
197 | #define SET_PERSONALITY(ex) \ | 197 | #define SET_PERSONALITY(ex) \ |
198 | do { unsigned long new_flags = current_thread_info()->flags; \ | 198 | do { if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ |
199 | new_flags &= _TIF_32BIT; \ | 199 | set_thread_flag(TIF_32BIT); \ |
200 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ | ||
201 | new_flags |= _TIF_32BIT; \ | ||
202 | else \ | 200 | else \ |
203 | new_flags &= ~_TIF_32BIT; \ | 201 | clear_thread_flag(TIF_32BIT); \ |
204 | if ((current_thread_info()->flags & _TIF_32BIT) \ | ||
205 | != new_flags) \ | ||
206 | set_thread_flag(TIF_ABI_PENDING); \ | ||
207 | else \ | ||
208 | clear_thread_flag(TIF_ABI_PENDING); \ | ||
209 | /* flush_thread will update pgd cache */ \ | 202 | /* flush_thread will update pgd cache */ \ |
210 | if (personality(current->personality) != PER_LINUX32) \ | 203 | if (personality(current->personality) != PER_LINUX32) \ |
211 | set_personality(PER_LINUX | \ | 204 | set_personality(PER_LINUX | \ |
diff --git a/arch/sparc/include/asm/io_32.h b/arch/sparc/include/asm/io_32.h index 93fe21e02c86..679c7504625a 100644 --- a/arch/sparc/include/asm/io_32.h +++ b/arch/sparc/include/asm/io_32.h | |||
@@ -8,7 +8,7 @@ | |||
8 | #include <asm/page.h> /* IO address mapping routines need this */ | 8 | #include <asm/page.h> /* IO address mapping routines need this */ |
9 | #include <asm/system.h> | 9 | #include <asm/system.h> |
10 | 10 | ||
11 | #define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) | 11 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) |
12 | 12 | ||
13 | static inline u32 flip_dword (u32 l) | 13 | static inline u32 flip_dword (u32 l) |
14 | { | 14 | { |
diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h index f72080bdda94..156707b0f18d 100644 --- a/arch/sparc/include/asm/page_32.h +++ b/arch/sparc/include/asm/page_32.h | |||
@@ -143,7 +143,7 @@ extern unsigned long pfn_base; | |||
143 | #define phys_to_virt __va | 143 | #define phys_to_virt __va |
144 | 144 | ||
145 | #define ARCH_PFN_OFFSET (pfn_base) | 145 | #define ARCH_PFN_OFFSET (pfn_base) |
146 | #define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT))) | 146 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) |
147 | 147 | ||
148 | #define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) | 148 | #define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) |
149 | #define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) | 149 | #define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) |
diff --git a/arch/sparc/include/asm/param.h b/arch/sparc/include/asm/param.h index 9836d9a3cb9a..0bc356bf8c50 100644 --- a/arch/sparc/include/asm/param.h +++ b/arch/sparc/include/asm/param.h | |||
@@ -1,22 +1,7 @@ | |||
1 | #ifndef _ASMSPARC_PARAM_H | 1 | #ifndef _ASMSPARC_PARAM_H |
2 | #define _ASMSPARC_PARAM_H | 2 | #define _ASMSPARC_PARAM_H |
3 | 3 | ||
4 | #ifdef __KERNEL__ | ||
5 | # define HZ CONFIG_HZ /* Internal kernel timer frequency */ | ||
6 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ | ||
7 | # define CLOCKS_PER_SEC (USER_HZ) | ||
8 | #endif | ||
9 | |||
10 | #ifndef HZ | ||
11 | #define HZ 100 | ||
12 | #endif | ||
13 | |||
14 | #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */ | 4 | #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */ |
5 | #include <asm-generic/param.h> | ||
15 | 6 | ||
16 | #ifndef NOGROUP | 7 | #endif /* _ASMSPARC_PARAM_H */ |
17 | #define NOGROUP (-1) | ||
18 | #endif | ||
19 | |||
20 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
21 | |||
22 | #endif | ||
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index 7257ebb8f394..39be9f256e5a 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h | |||
@@ -228,12 +228,11 @@ register struct thread_info *current_thread_info_reg asm("g6"); | |||
228 | #define TIF_SECCOMP 9 /* secure computing */ | 228 | #define TIF_SECCOMP 9 /* secure computing */ |
229 | #define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ | 229 | #define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ |
230 | #define TIF_SYSCALL_TRACEPOINT 11 /* syscall tracepoint instrumentation */ | 230 | #define TIF_SYSCALL_TRACEPOINT 11 /* syscall tracepoint instrumentation */ |
231 | /* flag bit 11 is available */ | ||
232 | /* NOTE: Thread flags >= 12 should be ones we have no interest | 231 | /* NOTE: Thread flags >= 12 should be ones we have no interest |
233 | * in using in assembly, else we can't use the mask as | 232 | * in using in assembly, else we can't use the mask as |
234 | * an immediate value in instructions such as andcc. | 233 | * an immediate value in instructions such as andcc. |
235 | */ | 234 | */ |
236 | #define TIF_ABI_PENDING 12 | 235 | /* flag bit 12 is available */ |
237 | #define TIF_MEMDIE 13 | 236 | #define TIF_MEMDIE 13 |
238 | #define TIF_POLLING_NRFLAG 14 | 237 | #define TIF_POLLING_NRFLAG 14 |
239 | #define TIF_FREEZE 15 /* is freezing for suspend */ | 238 | #define TIF_FREEZE 15 /* is freezing for suspend */ |
@@ -248,7 +247,6 @@ register struct thread_info *current_thread_info_reg asm("g6"); | |||
248 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) | 247 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) |
249 | #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) | 248 | #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) |
250 | #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) | 249 | #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) |
251 | #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) | ||
252 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | 250 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) |
253 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 251 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
254 | 252 | ||
diff --git a/arch/sparc/include/asm/timex_32.h b/arch/sparc/include/asm/timex_32.h index b6ccdb0d6f7d..a254750e4c03 100644 --- a/arch/sparc/include/asm/timex_32.h +++ b/arch/sparc/include/asm/timex_32.h | |||
@@ -12,4 +12,5 @@ | |||
12 | typedef unsigned long cycles_t; | 12 | typedef unsigned long cycles_t; |
13 | #define get_cycles() (0) | 13 | #define get_cycles() (0) |
14 | 14 | ||
15 | extern u32 (*do_arch_gettimeoffset)(void); | ||
15 | #endif | 16 | #endif |
diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h index 600a79035fa1..1c79f32734a0 100644 --- a/arch/sparc/include/asm/topology_64.h +++ b/arch/sparc/include/asm/topology_64.h | |||
@@ -12,7 +12,9 @@ static inline int cpu_to_node(int cpu) | |||
12 | 12 | ||
13 | #define parent_node(node) (node) | 13 | #define parent_node(node) (node) |
14 | 14 | ||
15 | #define cpumask_of_node(node) (&numa_cpumask_lookup_table[node]) | 15 | #define cpumask_of_node(node) ((node) == -1 ? \ |
16 | cpu_all_mask : \ | ||
17 | &numa_cpumask_lookup_table[node]) | ||
16 | 18 | ||
17 | struct pci_bus; | 19 | struct pci_bus; |
18 | #ifdef CONFIG_PCI | 20 | #ifdef CONFIG_PCI |
diff --git a/arch/sparc/include/asm/uaccess_32.h b/arch/sparc/include/asm/uaccess_32.h index 489d2ba92bcb..25f1d10155e8 100644 --- a/arch/sparc/include/asm/uaccess_32.h +++ b/arch/sparc/include/asm/uaccess_32.h | |||
@@ -274,7 +274,7 @@ static inline unsigned long copy_from_user(void *to, const void __user *from, un | |||
274 | 274 | ||
275 | if (unlikely(sz != -1 && sz < n)) { | 275 | if (unlikely(sz != -1 && sz < n)) { |
276 | copy_from_user_overflow(); | 276 | copy_from_user_overflow(); |
277 | return -EFAULT; | 277 | return n; |
278 | } | 278 | } |
279 | 279 | ||
280 | if (n && __access_ok((unsigned long) from, n)) | 280 | if (n && __access_ok((unsigned long) from, n)) |
diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h index dbc141660994..2406788bfe5f 100644 --- a/arch/sparc/include/asm/uaccess_64.h +++ b/arch/sparc/include/asm/uaccess_64.h | |||
@@ -221,8 +221,8 @@ extern unsigned long copy_from_user_fixup(void *to, const void __user *from, | |||
221 | static inline unsigned long __must_check | 221 | static inline unsigned long __must_check |
222 | copy_from_user(void *to, const void __user *from, unsigned long size) | 222 | copy_from_user(void *to, const void __user *from, unsigned long size) |
223 | { | 223 | { |
224 | unsigned long ret = (unsigned long) -EFAULT; | ||
225 | int sz = __compiletime_object_size(to); | 224 | int sz = __compiletime_object_size(to); |
225 | unsigned long ret = size; | ||
226 | 226 | ||
227 | if (likely(sz == -1 || sz >= size)) { | 227 | if (likely(sz == -1 || sz >= size)) { |
228 | ret = ___copy_from_user(to, from, size); | 228 | ret = ___copy_from_user(to, from, size); |
diff --git a/arch/sparc/kernel/central.c b/arch/sparc/kernel/central.c index f3b5466c389c..4589ca33220f 100644 --- a/arch/sparc/kernel/central.c +++ b/arch/sparc/kernel/central.c | |||
@@ -99,7 +99,7 @@ static int __devinit clock_board_probe(struct of_device *op, | |||
99 | 99 | ||
100 | p->leds_resource.start = (unsigned long) | 100 | p->leds_resource.start = (unsigned long) |
101 | (p->clock_regs + CLOCK_CTRL); | 101 | (p->clock_regs + CLOCK_CTRL); |
102 | p->leds_resource.end = p->leds_resource.end; | 102 | p->leds_resource.end = p->leds_resource.start; |
103 | p->leds_resource.name = "leds"; | 103 | p->leds_resource.name = "leds"; |
104 | 104 | ||
105 | p->leds_pdev.name = "sunfire-clockboard-leds"; | 105 | p->leds_pdev.name = "sunfire-clockboard-leds"; |
@@ -194,7 +194,7 @@ static int __devinit fhc_probe(struct of_device *op, | |||
194 | if (!p->central) { | 194 | if (!p->central) { |
195 | p->leds_resource.start = (unsigned long) | 195 | p->leds_resource.start = (unsigned long) |
196 | (p->pregs + FHC_PREGS_CTRL); | 196 | (p->pregs + FHC_PREGS_CTRL); |
197 | p->leds_resource.end = p->leds_resource.end; | 197 | p->leds_resource.end = p->leds_resource.start; |
198 | p->leds_resource.name = "leds"; | 198 | p->leds_resource.name = "leds"; |
199 | 199 | ||
200 | p->leds_pdev.name = "sunfire-fhc-leds"; | 200 | p->leds_pdev.name = "sunfire-fhc-leds"; |
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c index 8d6882bb480a..e1cbdb94d97b 100644 --- a/arch/sparc/kernel/irq_64.c +++ b/arch/sparc/kernel/irq_64.c | |||
@@ -250,12 +250,12 @@ struct irq_handler_data { | |||
250 | }; | 250 | }; |
251 | 251 | ||
252 | #ifdef CONFIG_SMP | 252 | #ifdef CONFIG_SMP |
253 | static int irq_choose_cpu(unsigned int virt_irq) | 253 | static int irq_choose_cpu(unsigned int virt_irq, const struct cpumask *affinity) |
254 | { | 254 | { |
255 | cpumask_t mask; | 255 | cpumask_t mask; |
256 | int cpuid; | 256 | int cpuid; |
257 | 257 | ||
258 | cpumask_copy(&mask, irq_desc[virt_irq].affinity); | 258 | cpumask_copy(&mask, affinity); |
259 | if (cpus_equal(mask, cpu_online_map)) { | 259 | if (cpus_equal(mask, cpu_online_map)) { |
260 | cpuid = map_to_cpu(virt_irq); | 260 | cpuid = map_to_cpu(virt_irq); |
261 | } else { | 261 | } else { |
@@ -268,10 +268,8 @@ static int irq_choose_cpu(unsigned int virt_irq) | |||
268 | return cpuid; | 268 | return cpuid; |
269 | } | 269 | } |
270 | #else | 270 | #else |
271 | static int irq_choose_cpu(unsigned int virt_irq) | 271 | #define irq_choose_cpu(virt_irq, affinity) \ |
272 | { | 272 | real_hard_smp_processor_id() |
273 | return real_hard_smp_processor_id(); | ||
274 | } | ||
275 | #endif | 273 | #endif |
276 | 274 | ||
277 | static void sun4u_irq_enable(unsigned int virt_irq) | 275 | static void sun4u_irq_enable(unsigned int virt_irq) |
@@ -282,7 +280,8 @@ static void sun4u_irq_enable(unsigned int virt_irq) | |||
282 | unsigned long cpuid, imap, val; | 280 | unsigned long cpuid, imap, val; |
283 | unsigned int tid; | 281 | unsigned int tid; |
284 | 282 | ||
285 | cpuid = irq_choose_cpu(virt_irq); | 283 | cpuid = irq_choose_cpu(virt_irq, |
284 | irq_desc[virt_irq].affinity); | ||
286 | imap = data->imap; | 285 | imap = data->imap; |
287 | 286 | ||
288 | tid = sun4u_compute_tid(imap, cpuid); | 287 | tid = sun4u_compute_tid(imap, cpuid); |
@@ -299,7 +298,24 @@ static void sun4u_irq_enable(unsigned int virt_irq) | |||
299 | static int sun4u_set_affinity(unsigned int virt_irq, | 298 | static int sun4u_set_affinity(unsigned int virt_irq, |
300 | const struct cpumask *mask) | 299 | const struct cpumask *mask) |
301 | { | 300 | { |
302 | sun4u_irq_enable(virt_irq); | 301 | struct irq_handler_data *data = get_irq_chip_data(virt_irq); |
302 | |||
303 | if (likely(data)) { | ||
304 | unsigned long cpuid, imap, val; | ||
305 | unsigned int tid; | ||
306 | |||
307 | cpuid = irq_choose_cpu(virt_irq, mask); | ||
308 | imap = data->imap; | ||
309 | |||
310 | tid = sun4u_compute_tid(imap, cpuid); | ||
311 | |||
312 | val = upa_readq(imap); | ||
313 | val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS | | ||
314 | IMAP_AID_SAFARI | IMAP_NID_SAFARI); | ||
315 | val |= tid | IMAP_VALID; | ||
316 | upa_writeq(val, imap); | ||
317 | upa_writeq(ICLR_IDLE, data->iclr); | ||
318 | } | ||
303 | 319 | ||
304 | return 0; | 320 | return 0; |
305 | } | 321 | } |
@@ -340,7 +356,8 @@ static void sun4u_irq_eoi(unsigned int virt_irq) | |||
340 | static void sun4v_irq_enable(unsigned int virt_irq) | 356 | static void sun4v_irq_enable(unsigned int virt_irq) |
341 | { | 357 | { |
342 | unsigned int ino = virt_irq_table[virt_irq].dev_ino; | 358 | unsigned int ino = virt_irq_table[virt_irq].dev_ino; |
343 | unsigned long cpuid = irq_choose_cpu(virt_irq); | 359 | unsigned long cpuid = irq_choose_cpu(virt_irq, |
360 | irq_desc[virt_irq].affinity); | ||
344 | int err; | 361 | int err; |
345 | 362 | ||
346 | err = sun4v_intr_settarget(ino, cpuid); | 363 | err = sun4v_intr_settarget(ino, cpuid); |
@@ -361,7 +378,7 @@ static int sun4v_set_affinity(unsigned int virt_irq, | |||
361 | const struct cpumask *mask) | 378 | const struct cpumask *mask) |
362 | { | 379 | { |
363 | unsigned int ino = virt_irq_table[virt_irq].dev_ino; | 380 | unsigned int ino = virt_irq_table[virt_irq].dev_ino; |
364 | unsigned long cpuid = irq_choose_cpu(virt_irq); | 381 | unsigned long cpuid = irq_choose_cpu(virt_irq, mask); |
365 | int err; | 382 | int err; |
366 | 383 | ||
367 | err = sun4v_intr_settarget(ino, cpuid); | 384 | err = sun4v_intr_settarget(ino, cpuid); |
@@ -403,7 +420,7 @@ static void sun4v_virq_enable(unsigned int virt_irq) | |||
403 | unsigned long cpuid, dev_handle, dev_ino; | 420 | unsigned long cpuid, dev_handle, dev_ino; |
404 | int err; | 421 | int err; |
405 | 422 | ||
406 | cpuid = irq_choose_cpu(virt_irq); | 423 | cpuid = irq_choose_cpu(virt_irq, irq_desc[virt_irq].affinity); |
407 | 424 | ||
408 | dev_handle = virt_irq_table[virt_irq].dev_handle; | 425 | dev_handle = virt_irq_table[virt_irq].dev_handle; |
409 | dev_ino = virt_irq_table[virt_irq].dev_ino; | 426 | dev_ino = virt_irq_table[virt_irq].dev_ino; |
@@ -433,7 +450,7 @@ static int sun4v_virt_set_affinity(unsigned int virt_irq, | |||
433 | unsigned long cpuid, dev_handle, dev_ino; | 450 | unsigned long cpuid, dev_handle, dev_ino; |
434 | int err; | 451 | int err; |
435 | 452 | ||
436 | cpuid = irq_choose_cpu(virt_irq); | 453 | cpuid = irq_choose_cpu(virt_irq, mask); |
437 | 454 | ||
438 | dev_handle = virt_irq_table[virt_irq].dev_handle; | 455 | dev_handle = virt_irq_table[virt_irq].dev_handle; |
439 | dev_ino = virt_irq_table[virt_irq].dev_ino; | 456 | dev_ino = virt_irq_table[virt_irq].dev_ino; |
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c index 9b9f5b4e2994..b287b62c7ea3 100644 --- a/arch/sparc/kernel/nmi.c +++ b/arch/sparc/kernel/nmi.c | |||
@@ -95,7 +95,6 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) | |||
95 | int cpu = smp_processor_id(); | 95 | int cpu = smp_processor_id(); |
96 | 96 | ||
97 | clear_softint(1 << irq); | 97 | clear_softint(1 << irq); |
98 | pcr_ops->write(PCR_PIC_PRIV); | ||
99 | 98 | ||
100 | local_cpu_data().__nmi_count++; | 99 | local_cpu_data().__nmi_count++; |
101 | 100 | ||
@@ -104,6 +103,8 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) | |||
104 | if (notify_die(DIE_NMI, "nmi", regs, 0, | 103 | if (notify_die(DIE_NMI, "nmi", regs, 0, |
105 | pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) | 104 | pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) |
106 | touched = 1; | 105 | touched = 1; |
106 | else | ||
107 | pcr_ops->write(PCR_PIC_PRIV); | ||
107 | 108 | ||
108 | sum = kstat_irqs_cpu(0, cpu); | 109 | sum = kstat_irqs_cpu(0, cpu); |
109 | if (__get_cpu_var(nmi_touch)) { | 110 | if (__get_cpu_var(nmi_touch)) { |
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index 85e7037429b9..4e2724ec2bb6 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <asm/oplib.h> | 30 | #include <asm/oplib.h> |
31 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
32 | #include <asm/pcic.h> | 32 | #include <asm/pcic.h> |
33 | #include <asm/timex.h> | ||
33 | #include <asm/timer.h> | 34 | #include <asm/timer.h> |
34 | #include <asm/uaccess.h> | 35 | #include <asm/uaccess.h> |
35 | #include <asm/irq_regs.h> | 36 | #include <asm/irq_regs.h> |
@@ -163,8 +164,6 @@ void __iomem *pcic_regs; | |||
163 | volatile int pcic_speculative; | 164 | volatile int pcic_speculative; |
164 | volatile int pcic_trapped; | 165 | volatile int pcic_trapped; |
165 | 166 | ||
166 | static void pci_do_gettimeofday(struct timeval *tv); | ||
167 | static int pci_do_settimeofday(struct timespec *tv); | ||
168 | 167 | ||
169 | #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3)) | 168 | #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3)) |
170 | 169 | ||
@@ -716,19 +715,27 @@ static irqreturn_t pcic_timer_handler (int irq, void *h) | |||
716 | #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */ | 715 | #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */ |
717 | #define TICK_TIMER_LIMIT ((100*1000000/4)/100) | 716 | #define TICK_TIMER_LIMIT ((100*1000000/4)/100) |
718 | 717 | ||
718 | u32 pci_gettimeoffset(void) | ||
719 | { | ||
720 | /* | ||
721 | * We divide all by 100 | ||
722 | * to have microsecond resolution and to avoid overflow | ||
723 | */ | ||
724 | unsigned long count = | ||
725 | readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW; | ||
726 | count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100); | ||
727 | return count * 1000; | ||
728 | } | ||
729 | |||
730 | |||
719 | void __init pci_time_init(void) | 731 | void __init pci_time_init(void) |
720 | { | 732 | { |
721 | struct linux_pcic *pcic = &pcic0; | 733 | struct linux_pcic *pcic = &pcic0; |
722 | unsigned long v; | 734 | unsigned long v; |
723 | int timer_irq, irq; | 735 | int timer_irq, irq; |
724 | 736 | ||
725 | /* A hack until do_gettimeofday prototype is moved to arch specific headers | 737 | do_arch_gettimeoffset = pci_gettimeoffset; |
726 | and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */ | 738 | |
727 | ((unsigned int *)do_gettimeofday)[0] = | ||
728 | 0x10800000 | ((((unsigned long)pci_do_gettimeofday - | ||
729 | (unsigned long)do_gettimeofday) >> 2) & 0x003fffff); | ||
730 | ((unsigned int *)do_gettimeofday)[1] = 0x01000000; | ||
731 | BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM); | ||
732 | btfixup(); | 739 | btfixup(); |
733 | 740 | ||
734 | writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT); | 741 | writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT); |
@@ -746,84 +753,6 @@ void __init pci_time_init(void) | |||
746 | local_irq_enable(); | 753 | local_irq_enable(); |
747 | } | 754 | } |
748 | 755 | ||
749 | static inline unsigned long do_gettimeoffset(void) | ||
750 | { | ||
751 | /* | ||
752 | * We divide all by 100 | ||
753 | * to have microsecond resolution and to avoid overflow | ||
754 | */ | ||
755 | unsigned long count = | ||
756 | readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW; | ||
757 | count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100); | ||
758 | return count; | ||
759 | } | ||
760 | |||
761 | static void pci_do_gettimeofday(struct timeval *tv) | ||
762 | { | ||
763 | unsigned long flags; | ||
764 | unsigned long seq; | ||
765 | unsigned long usec, sec; | ||
766 | unsigned long max_ntp_tick = tick_usec - tickadj; | ||
767 | |||
768 | do { | ||
769 | seq = read_seqbegin_irqsave(&xtime_lock, flags); | ||
770 | usec = do_gettimeoffset(); | ||
771 | |||
772 | /* | ||
773 | * If time_adjust is negative then NTP is slowing the clock | ||
774 | * so make sure not to go into next possible interval. | ||
775 | * Better to lose some accuracy than have time go backwards.. | ||
776 | */ | ||
777 | if (unlikely(time_adjust < 0)) | ||
778 | usec = min(usec, max_ntp_tick); | ||
779 | |||
780 | sec = xtime.tv_sec; | ||
781 | usec += (xtime.tv_nsec / 1000); | ||
782 | } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); | ||
783 | |||
784 | while (usec >= 1000000) { | ||
785 | usec -= 1000000; | ||
786 | sec++; | ||
787 | } | ||
788 | |||
789 | tv->tv_sec = sec; | ||
790 | tv->tv_usec = usec; | ||
791 | } | ||
792 | |||
793 | static int pci_do_settimeofday(struct timespec *tv) | ||
794 | { | ||
795 | if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) | ||
796 | return -EINVAL; | ||
797 | |||
798 | /* | ||
799 | * This is revolting. We need to set "xtime" correctly. However, the | ||
800 | * value in this location is the value at the most recent update of | ||
801 | * wall time. Discover what correction gettimeofday() would have | ||
802 | * made, and then undo it! | ||
803 | */ | ||
804 | tv->tv_nsec -= 1000 * do_gettimeoffset(); | ||
805 | while (tv->tv_nsec < 0) { | ||
806 | tv->tv_nsec += NSEC_PER_SEC; | ||
807 | tv->tv_sec--; | ||
808 | } | ||
809 | |||
810 | wall_to_monotonic.tv_sec += xtime.tv_sec - tv->tv_sec; | ||
811 | wall_to_monotonic.tv_nsec += xtime.tv_nsec - tv->tv_nsec; | ||
812 | |||
813 | if (wall_to_monotonic.tv_nsec > NSEC_PER_SEC) { | ||
814 | wall_to_monotonic.tv_nsec -= NSEC_PER_SEC; | ||
815 | wall_to_monotonic.tv_sec++; | ||
816 | } | ||
817 | if (wall_to_monotonic.tv_nsec < 0) { | ||
818 | wall_to_monotonic.tv_nsec += NSEC_PER_SEC; | ||
819 | wall_to_monotonic.tv_sec--; | ||
820 | } | ||
821 | |||
822 | xtime.tv_sec = tv->tv_sec; | ||
823 | xtime.tv_nsec = tv->tv_nsec; | ||
824 | ntp_clear(); | ||
825 | return 0; | ||
826 | } | ||
827 | 756 | ||
828 | #if 0 | 757 | #if 0 |
829 | static void watchdog_reset() { | 758 | static void watchdog_reset() { |
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index fa5936e1c3b9..e856456ec02f 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* Performance event support for sparc64. | 1 | /* Performance event support for sparc64. |
2 | * | 2 | * |
3 | * Copyright (C) 2009 David S. Miller <davem@davemloft.net> | 3 | * Copyright (C) 2009, 2010 David S. Miller <davem@davemloft.net> |
4 | * | 4 | * |
5 | * This code is based almost entirely upon the x86 perf event | 5 | * This code is based almost entirely upon the x86 perf event |
6 | * code, which is: | 6 | * code, which is: |
@@ -18,11 +18,15 @@ | |||
18 | #include <linux/kdebug.h> | 18 | #include <linux/kdebug.h> |
19 | #include <linux/mutex.h> | 19 | #include <linux/mutex.h> |
20 | 20 | ||
21 | #include <asm/stacktrace.h> | ||
21 | #include <asm/cpudata.h> | 22 | #include <asm/cpudata.h> |
23 | #include <asm/uaccess.h> | ||
22 | #include <asm/atomic.h> | 24 | #include <asm/atomic.h> |
23 | #include <asm/nmi.h> | 25 | #include <asm/nmi.h> |
24 | #include <asm/pcr.h> | 26 | #include <asm/pcr.h> |
25 | 27 | ||
28 | #include "kstack.h" | ||
29 | |||
26 | /* Sparc64 chips have two performance counters, 32-bits each, with | 30 | /* Sparc64 chips have two performance counters, 32-bits each, with |
27 | * overflow interrupts generated on transition from 0xffffffff to 0. | 31 | * overflow interrupts generated on transition from 0xffffffff to 0. |
28 | * The counters are accessed in one go using a 64-bit register. | 32 | * The counters are accessed in one go using a 64-bit register. |
@@ -51,16 +55,49 @@ | |||
51 | 55 | ||
52 | #define PIC_UPPER_INDEX 0 | 56 | #define PIC_UPPER_INDEX 0 |
53 | #define PIC_LOWER_INDEX 1 | 57 | #define PIC_LOWER_INDEX 1 |
58 | #define PIC_NO_INDEX -1 | ||
54 | 59 | ||
55 | struct cpu_hw_events { | 60 | struct cpu_hw_events { |
56 | struct perf_event *events[MAX_HWEVENTS]; | 61 | /* Number of events currently scheduled onto this cpu. |
57 | unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)]; | 62 | * This tells how many entries in the arrays below |
58 | unsigned long active_mask[BITS_TO_LONGS(MAX_HWEVENTS)]; | 63 | * are valid. |
64 | */ | ||
65 | int n_events; | ||
66 | |||
67 | /* Number of new events added since the last hw_perf_disable(). | ||
68 | * This works because the perf event layer always adds new | ||
69 | * events inside of a perf_{disable,enable}() sequence. | ||
70 | */ | ||
71 | int n_added; | ||
72 | |||
73 | /* Array of events current scheduled on this cpu. */ | ||
74 | struct perf_event *event[MAX_HWEVENTS]; | ||
75 | |||
76 | /* Array of encoded longs, specifying the %pcr register | ||
77 | * encoding and the mask of PIC counters this even can | ||
78 | * be scheduled on. See perf_event_encode() et al. | ||
79 | */ | ||
80 | unsigned long events[MAX_HWEVENTS]; | ||
81 | |||
82 | /* The current counter index assigned to an event. When the | ||
83 | * event hasn't been programmed into the cpu yet, this will | ||
84 | * hold PIC_NO_INDEX. The event->hw.idx value tells us where | ||
85 | * we ought to schedule the event. | ||
86 | */ | ||
87 | int current_idx[MAX_HWEVENTS]; | ||
88 | |||
89 | /* Software copy of %pcr register on this cpu. */ | ||
59 | u64 pcr; | 90 | u64 pcr; |
91 | |||
92 | /* Enabled/disable state. */ | ||
60 | int enabled; | 93 | int enabled; |
61 | }; | 94 | }; |
62 | DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; | 95 | DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; |
63 | 96 | ||
97 | /* An event map describes the characteristics of a performance | ||
98 | * counter event. In particular it gives the encoding as well as | ||
99 | * a mask telling which counters the event can be measured on. | ||
100 | */ | ||
64 | struct perf_event_map { | 101 | struct perf_event_map { |
65 | u16 encoding; | 102 | u16 encoding; |
66 | u8 pic_mask; | 103 | u8 pic_mask; |
@@ -69,15 +106,20 @@ struct perf_event_map { | |||
69 | #define PIC_LOWER 0x02 | 106 | #define PIC_LOWER 0x02 |
70 | }; | 107 | }; |
71 | 108 | ||
109 | /* Encode a perf_event_map entry into a long. */ | ||
72 | static unsigned long perf_event_encode(const struct perf_event_map *pmap) | 110 | static unsigned long perf_event_encode(const struct perf_event_map *pmap) |
73 | { | 111 | { |
74 | return ((unsigned long) pmap->encoding << 16) | pmap->pic_mask; | 112 | return ((unsigned long) pmap->encoding << 16) | pmap->pic_mask; |
75 | } | 113 | } |
76 | 114 | ||
77 | static void perf_event_decode(unsigned long val, u16 *enc, u8 *msk) | 115 | static u8 perf_event_get_msk(unsigned long val) |
78 | { | 116 | { |
79 | *msk = val & 0xff; | 117 | return val & 0xff; |
80 | *enc = val >> 16; | 118 | } |
119 | |||
120 | static u64 perf_event_get_enc(unsigned long val) | ||
121 | { | ||
122 | return val >> 16; | ||
81 | } | 123 | } |
82 | 124 | ||
83 | #define C(x) PERF_COUNT_HW_CACHE_##x | 125 | #define C(x) PERF_COUNT_HW_CACHE_##x |
@@ -491,53 +533,6 @@ static inline void sparc_pmu_disable_event(struct cpu_hw_events *cpuc, struct hw | |||
491 | pcr_ops->write(cpuc->pcr); | 533 | pcr_ops->write(cpuc->pcr); |
492 | } | 534 | } |
493 | 535 | ||
494 | void hw_perf_enable(void) | ||
495 | { | ||
496 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
497 | u64 val; | ||
498 | int i; | ||
499 | |||
500 | if (cpuc->enabled) | ||
501 | return; | ||
502 | |||
503 | cpuc->enabled = 1; | ||
504 | barrier(); | ||
505 | |||
506 | val = cpuc->pcr; | ||
507 | |||
508 | for (i = 0; i < MAX_HWEVENTS; i++) { | ||
509 | struct perf_event *cp = cpuc->events[i]; | ||
510 | struct hw_perf_event *hwc; | ||
511 | |||
512 | if (!cp) | ||
513 | continue; | ||
514 | hwc = &cp->hw; | ||
515 | val |= hwc->config_base; | ||
516 | } | ||
517 | |||
518 | cpuc->pcr = val; | ||
519 | |||
520 | pcr_ops->write(cpuc->pcr); | ||
521 | } | ||
522 | |||
523 | void hw_perf_disable(void) | ||
524 | { | ||
525 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
526 | u64 val; | ||
527 | |||
528 | if (!cpuc->enabled) | ||
529 | return; | ||
530 | |||
531 | cpuc->enabled = 0; | ||
532 | |||
533 | val = cpuc->pcr; | ||
534 | val &= ~(PCR_UTRACE | PCR_STRACE | | ||
535 | sparc_pmu->hv_bit | sparc_pmu->irq_bit); | ||
536 | cpuc->pcr = val; | ||
537 | |||
538 | pcr_ops->write(cpuc->pcr); | ||
539 | } | ||
540 | |||
541 | static u32 read_pmc(int idx) | 536 | static u32 read_pmc(int idx) |
542 | { | 537 | { |
543 | u64 val; | 538 | u64 val; |
@@ -566,6 +561,30 @@ static void write_pmc(int idx, u64 val) | |||
566 | write_pic(pic); | 561 | write_pic(pic); |
567 | } | 562 | } |
568 | 563 | ||
564 | static u64 sparc_perf_event_update(struct perf_event *event, | ||
565 | struct hw_perf_event *hwc, int idx) | ||
566 | { | ||
567 | int shift = 64 - 32; | ||
568 | u64 prev_raw_count, new_raw_count; | ||
569 | s64 delta; | ||
570 | |||
571 | again: | ||
572 | prev_raw_count = atomic64_read(&hwc->prev_count); | ||
573 | new_raw_count = read_pmc(idx); | ||
574 | |||
575 | if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, | ||
576 | new_raw_count) != prev_raw_count) | ||
577 | goto again; | ||
578 | |||
579 | delta = (new_raw_count << shift) - (prev_raw_count << shift); | ||
580 | delta >>= shift; | ||
581 | |||
582 | atomic64_add(delta, &event->count); | ||
583 | atomic64_sub(delta, &hwc->period_left); | ||
584 | |||
585 | return new_raw_count; | ||
586 | } | ||
587 | |||
569 | static int sparc_perf_event_set_period(struct perf_event *event, | 588 | static int sparc_perf_event_set_period(struct perf_event *event, |
570 | struct hw_perf_event *hwc, int idx) | 589 | struct hw_perf_event *hwc, int idx) |
571 | { | 590 | { |
@@ -598,81 +617,166 @@ static int sparc_perf_event_set_period(struct perf_event *event, | |||
598 | return ret; | 617 | return ret; |
599 | } | 618 | } |
600 | 619 | ||
601 | static int sparc_pmu_enable(struct perf_event *event) | 620 | /* If performance event entries have been added, move existing |
621 | * events around (if necessary) and then assign new entries to | ||
622 | * counters. | ||
623 | */ | ||
624 | static u64 maybe_change_configuration(struct cpu_hw_events *cpuc, u64 pcr) | ||
602 | { | 625 | { |
603 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 626 | int i; |
604 | struct hw_perf_event *hwc = &event->hw; | ||
605 | int idx = hwc->idx; | ||
606 | 627 | ||
607 | if (test_and_set_bit(idx, cpuc->used_mask)) | 628 | if (!cpuc->n_added) |
608 | return -EAGAIN; | 629 | goto out; |
609 | 630 | ||
610 | sparc_pmu_disable_event(cpuc, hwc, idx); | 631 | /* Read in the counters which are moving. */ |
632 | for (i = 0; i < cpuc->n_events; i++) { | ||
633 | struct perf_event *cp = cpuc->event[i]; | ||
611 | 634 | ||
612 | cpuc->events[idx] = event; | 635 | if (cpuc->current_idx[i] != PIC_NO_INDEX && |
613 | set_bit(idx, cpuc->active_mask); | 636 | cpuc->current_idx[i] != cp->hw.idx) { |
637 | sparc_perf_event_update(cp, &cp->hw, | ||
638 | cpuc->current_idx[i]); | ||
639 | cpuc->current_idx[i] = PIC_NO_INDEX; | ||
640 | } | ||
641 | } | ||
614 | 642 | ||
615 | sparc_perf_event_set_period(event, hwc, idx); | 643 | /* Assign to counters all unassigned events. */ |
616 | sparc_pmu_enable_event(cpuc, hwc, idx); | 644 | for (i = 0; i < cpuc->n_events; i++) { |
617 | perf_event_update_userpage(event); | 645 | struct perf_event *cp = cpuc->event[i]; |
618 | return 0; | 646 | struct hw_perf_event *hwc = &cp->hw; |
647 | int idx = hwc->idx; | ||
648 | u64 enc; | ||
649 | |||
650 | if (cpuc->current_idx[i] != PIC_NO_INDEX) | ||
651 | continue; | ||
652 | |||
653 | sparc_perf_event_set_period(cp, hwc, idx); | ||
654 | cpuc->current_idx[i] = idx; | ||
655 | |||
656 | enc = perf_event_get_enc(cpuc->events[i]); | ||
657 | pcr |= event_encoding(enc, idx); | ||
658 | } | ||
659 | out: | ||
660 | return pcr; | ||
619 | } | 661 | } |
620 | 662 | ||
621 | static u64 sparc_perf_event_update(struct perf_event *event, | 663 | void hw_perf_enable(void) |
622 | struct hw_perf_event *hwc, int idx) | ||
623 | { | 664 | { |
624 | int shift = 64 - 32; | 665 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
625 | u64 prev_raw_count, new_raw_count; | 666 | u64 pcr; |
626 | s64 delta; | ||
627 | 667 | ||
628 | again: | 668 | if (cpuc->enabled) |
629 | prev_raw_count = atomic64_read(&hwc->prev_count); | 669 | return; |
630 | new_raw_count = read_pmc(idx); | ||
631 | 670 | ||
632 | if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, | 671 | cpuc->enabled = 1; |
633 | new_raw_count) != prev_raw_count) | 672 | barrier(); |
634 | goto again; | ||
635 | 673 | ||
636 | delta = (new_raw_count << shift) - (prev_raw_count << shift); | 674 | pcr = cpuc->pcr; |
637 | delta >>= shift; | 675 | if (!cpuc->n_events) { |
676 | pcr = 0; | ||
677 | } else { | ||
678 | pcr = maybe_change_configuration(cpuc, pcr); | ||
638 | 679 | ||
639 | atomic64_add(delta, &event->count); | 680 | /* We require that all of the events have the same |
640 | atomic64_sub(delta, &hwc->period_left); | 681 | * configuration, so just fetch the settings from the |
682 | * first entry. | ||
683 | */ | ||
684 | cpuc->pcr = pcr | cpuc->event[0]->hw.config_base; | ||
685 | } | ||
641 | 686 | ||
642 | return new_raw_count; | 687 | pcr_ops->write(cpuc->pcr); |
688 | } | ||
689 | |||
690 | void hw_perf_disable(void) | ||
691 | { | ||
692 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
693 | u64 val; | ||
694 | |||
695 | if (!cpuc->enabled) | ||
696 | return; | ||
697 | |||
698 | cpuc->enabled = 0; | ||
699 | cpuc->n_added = 0; | ||
700 | |||
701 | val = cpuc->pcr; | ||
702 | val &= ~(PCR_UTRACE | PCR_STRACE | | ||
703 | sparc_pmu->hv_bit | sparc_pmu->irq_bit); | ||
704 | cpuc->pcr = val; | ||
705 | |||
706 | pcr_ops->write(cpuc->pcr); | ||
643 | } | 707 | } |
644 | 708 | ||
645 | static void sparc_pmu_disable(struct perf_event *event) | 709 | static void sparc_pmu_disable(struct perf_event *event) |
646 | { | 710 | { |
647 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 711 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
648 | struct hw_perf_event *hwc = &event->hw; | 712 | struct hw_perf_event *hwc = &event->hw; |
649 | int idx = hwc->idx; | 713 | unsigned long flags; |
714 | int i; | ||
650 | 715 | ||
651 | clear_bit(idx, cpuc->active_mask); | 716 | local_irq_save(flags); |
652 | sparc_pmu_disable_event(cpuc, hwc, idx); | 717 | perf_disable(); |
718 | |||
719 | for (i = 0; i < cpuc->n_events; i++) { | ||
720 | if (event == cpuc->event[i]) { | ||
721 | int idx = cpuc->current_idx[i]; | ||
722 | |||
723 | /* Shift remaining entries down into | ||
724 | * the existing slot. | ||
725 | */ | ||
726 | while (++i < cpuc->n_events) { | ||
727 | cpuc->event[i - 1] = cpuc->event[i]; | ||
728 | cpuc->events[i - 1] = cpuc->events[i]; | ||
729 | cpuc->current_idx[i - 1] = | ||
730 | cpuc->current_idx[i]; | ||
731 | } | ||
732 | |||
733 | /* Absorb the final count and turn off the | ||
734 | * event. | ||
735 | */ | ||
736 | sparc_pmu_disable_event(cpuc, hwc, idx); | ||
737 | barrier(); | ||
738 | sparc_perf_event_update(event, hwc, idx); | ||
653 | 739 | ||
654 | barrier(); | 740 | perf_event_update_userpage(event); |
655 | 741 | ||
656 | sparc_perf_event_update(event, hwc, idx); | 742 | cpuc->n_events--; |
657 | cpuc->events[idx] = NULL; | 743 | break; |
658 | clear_bit(idx, cpuc->used_mask); | 744 | } |
745 | } | ||
659 | 746 | ||
660 | perf_event_update_userpage(event); | 747 | perf_enable(); |
748 | local_irq_restore(flags); | ||
749 | } | ||
750 | |||
751 | static int active_event_index(struct cpu_hw_events *cpuc, | ||
752 | struct perf_event *event) | ||
753 | { | ||
754 | int i; | ||
755 | |||
756 | for (i = 0; i < cpuc->n_events; i++) { | ||
757 | if (cpuc->event[i] == event) | ||
758 | break; | ||
759 | } | ||
760 | BUG_ON(i == cpuc->n_events); | ||
761 | return cpuc->current_idx[i]; | ||
661 | } | 762 | } |
662 | 763 | ||
663 | static void sparc_pmu_read(struct perf_event *event) | 764 | static void sparc_pmu_read(struct perf_event *event) |
664 | { | 765 | { |
766 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
767 | int idx = active_event_index(cpuc, event); | ||
665 | struct hw_perf_event *hwc = &event->hw; | 768 | struct hw_perf_event *hwc = &event->hw; |
666 | 769 | ||
667 | sparc_perf_event_update(event, hwc, hwc->idx); | 770 | sparc_perf_event_update(event, hwc, idx); |
668 | } | 771 | } |
669 | 772 | ||
670 | static void sparc_pmu_unthrottle(struct perf_event *event) | 773 | static void sparc_pmu_unthrottle(struct perf_event *event) |
671 | { | 774 | { |
672 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 775 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
776 | int idx = active_event_index(cpuc, event); | ||
673 | struct hw_perf_event *hwc = &event->hw; | 777 | struct hw_perf_event *hwc = &event->hw; |
674 | 778 | ||
675 | sparc_pmu_enable_event(cpuc, hwc, hwc->idx); | 779 | sparc_pmu_enable_event(cpuc, hwc, idx); |
676 | } | 780 | } |
677 | 781 | ||
678 | static atomic_t active_events = ATOMIC_INIT(0); | 782 | static atomic_t active_events = ATOMIC_INIT(0); |
@@ -750,43 +854,75 @@ static void hw_perf_event_destroy(struct perf_event *event) | |||
750 | /* Make sure all events can be scheduled into the hardware at | 854 | /* Make sure all events can be scheduled into the hardware at |
751 | * the same time. This is simplified by the fact that we only | 855 | * the same time. This is simplified by the fact that we only |
752 | * need to support 2 simultaneous HW events. | 856 | * need to support 2 simultaneous HW events. |
857 | * | ||
858 | * As a side effect, the evts[]->hw.idx values will be assigned | ||
859 | * on success. These are pending indexes. When the events are | ||
860 | * actually programmed into the chip, these values will propagate | ||
861 | * to the per-cpu cpuc->current_idx[] slots, see the code in | ||
862 | * maybe_change_configuration() for details. | ||
753 | */ | 863 | */ |
754 | static int sparc_check_constraints(unsigned long *events, int n_ev) | 864 | static int sparc_check_constraints(struct perf_event **evts, |
865 | unsigned long *events, int n_ev) | ||
755 | { | 866 | { |
756 | if (n_ev <= perf_max_events) { | 867 | u8 msk0 = 0, msk1 = 0; |
757 | u8 msk1, msk2; | 868 | int idx0 = 0; |
758 | u16 dummy; | 869 | |
759 | 870 | /* This case is possible when we are invoked from | |
760 | if (n_ev == 1) | 871 | * hw_perf_group_sched_in(). |
761 | return 0; | 872 | */ |
762 | BUG_ON(n_ev != 2); | 873 | if (!n_ev) |
763 | perf_event_decode(events[0], &dummy, &msk1); | 874 | return 0; |
764 | perf_event_decode(events[1], &dummy, &msk2); | 875 | |
765 | 876 | if (n_ev > perf_max_events) | |
766 | /* If both events can go on any counter, OK. */ | 877 | return -1; |
767 | if (msk1 == (PIC_UPPER | PIC_LOWER) && | 878 | |
768 | msk2 == (PIC_UPPER | PIC_LOWER)) | 879 | msk0 = perf_event_get_msk(events[0]); |
769 | return 0; | 880 | if (n_ev == 1) { |
770 | 881 | if (msk0 & PIC_LOWER) | |
771 | /* If one event is limited to a specific counter, | 882 | idx0 = 1; |
772 | * and the other can go on both, OK. | 883 | goto success; |
773 | */ | 884 | } |
774 | if ((msk1 == PIC_UPPER || msk1 == PIC_LOWER) && | 885 | BUG_ON(n_ev != 2); |
775 | msk2 == (PIC_UPPER | PIC_LOWER)) | 886 | msk1 = perf_event_get_msk(events[1]); |
776 | return 0; | 887 | |
777 | if ((msk2 == PIC_UPPER || msk2 == PIC_LOWER) && | 888 | /* If both events can go on any counter, OK. */ |
778 | msk1 == (PIC_UPPER | PIC_LOWER)) | 889 | if (msk0 == (PIC_UPPER | PIC_LOWER) && |
779 | return 0; | 890 | msk1 == (PIC_UPPER | PIC_LOWER)) |
780 | 891 | goto success; | |
781 | /* If the events are fixed to different counters, OK. */ | 892 | |
782 | if ((msk1 == PIC_UPPER && msk2 == PIC_LOWER) || | 893 | /* If one event is limited to a specific counter, |
783 | (msk1 == PIC_LOWER && msk2 == PIC_UPPER)) | 894 | * and the other can go on both, OK. |
784 | return 0; | 895 | */ |
785 | 896 | if ((msk0 == PIC_UPPER || msk0 == PIC_LOWER) && | |
786 | /* Otherwise, there is a conflict. */ | 897 | msk1 == (PIC_UPPER | PIC_LOWER)) { |
898 | if (msk0 & PIC_LOWER) | ||
899 | idx0 = 1; | ||
900 | goto success; | ||
787 | } | 901 | } |
788 | 902 | ||
903 | if ((msk1 == PIC_UPPER || msk1 == PIC_LOWER) && | ||
904 | msk0 == (PIC_UPPER | PIC_LOWER)) { | ||
905 | if (msk1 & PIC_UPPER) | ||
906 | idx0 = 1; | ||
907 | goto success; | ||
908 | } | ||
909 | |||
910 | /* If the events are fixed to different counters, OK. */ | ||
911 | if ((msk0 == PIC_UPPER && msk1 == PIC_LOWER) || | ||
912 | (msk0 == PIC_LOWER && msk1 == PIC_UPPER)) { | ||
913 | if (msk0 & PIC_LOWER) | ||
914 | idx0 = 1; | ||
915 | goto success; | ||
916 | } | ||
917 | |||
918 | /* Otherwise, there is a conflict. */ | ||
789 | return -1; | 919 | return -1; |
920 | |||
921 | success: | ||
922 | evts[0]->hw.idx = idx0; | ||
923 | if (n_ev == 2) | ||
924 | evts[1]->hw.idx = idx0 ^ 1; | ||
925 | return 0; | ||
790 | } | 926 | } |
791 | 927 | ||
792 | static int check_excludes(struct perf_event **evts, int n_prev, int n_new) | 928 | static int check_excludes(struct perf_event **evts, int n_prev, int n_new) |
@@ -818,7 +954,8 @@ static int check_excludes(struct perf_event **evts, int n_prev, int n_new) | |||
818 | } | 954 | } |
819 | 955 | ||
820 | static int collect_events(struct perf_event *group, int max_count, | 956 | static int collect_events(struct perf_event *group, int max_count, |
821 | struct perf_event *evts[], unsigned long *events) | 957 | struct perf_event *evts[], unsigned long *events, |
958 | int *current_idx) | ||
822 | { | 959 | { |
823 | struct perf_event *event; | 960 | struct perf_event *event; |
824 | int n = 0; | 961 | int n = 0; |
@@ -827,7 +964,8 @@ static int collect_events(struct perf_event *group, int max_count, | |||
827 | if (n >= max_count) | 964 | if (n >= max_count) |
828 | return -1; | 965 | return -1; |
829 | evts[n] = group; | 966 | evts[n] = group; |
830 | events[n++] = group->hw.event_base; | 967 | events[n] = group->hw.event_base; |
968 | current_idx[n++] = PIC_NO_INDEX; | ||
831 | } | 969 | } |
832 | list_for_each_entry(event, &group->sibling_list, group_entry) { | 970 | list_for_each_entry(event, &group->sibling_list, group_entry) { |
833 | if (!is_software_event(event) && | 971 | if (!is_software_event(event) && |
@@ -835,20 +973,100 @@ static int collect_events(struct perf_event *group, int max_count, | |||
835 | if (n >= max_count) | 973 | if (n >= max_count) |
836 | return -1; | 974 | return -1; |
837 | evts[n] = event; | 975 | evts[n] = event; |
838 | events[n++] = event->hw.event_base; | 976 | events[n] = event->hw.event_base; |
977 | current_idx[n++] = PIC_NO_INDEX; | ||
839 | } | 978 | } |
840 | } | 979 | } |
841 | return n; | 980 | return n; |
842 | } | 981 | } |
843 | 982 | ||
983 | static void event_sched_in(struct perf_event *event, int cpu) | ||
984 | { | ||
985 | event->state = PERF_EVENT_STATE_ACTIVE; | ||
986 | event->oncpu = cpu; | ||
987 | event->tstamp_running += event->ctx->time - event->tstamp_stopped; | ||
988 | if (is_software_event(event)) | ||
989 | event->pmu->enable(event); | ||
990 | } | ||
991 | |||
992 | int hw_perf_group_sched_in(struct perf_event *group_leader, | ||
993 | struct perf_cpu_context *cpuctx, | ||
994 | struct perf_event_context *ctx, int cpu) | ||
995 | { | ||
996 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
997 | struct perf_event *sub; | ||
998 | int n0, n; | ||
999 | |||
1000 | if (!sparc_pmu) | ||
1001 | return 0; | ||
1002 | |||
1003 | n0 = cpuc->n_events; | ||
1004 | n = collect_events(group_leader, perf_max_events - n0, | ||
1005 | &cpuc->event[n0], &cpuc->events[n0], | ||
1006 | &cpuc->current_idx[n0]); | ||
1007 | if (n < 0) | ||
1008 | return -EAGAIN; | ||
1009 | if (check_excludes(cpuc->event, n0, n)) | ||
1010 | return -EINVAL; | ||
1011 | if (sparc_check_constraints(cpuc->event, cpuc->events, n + n0)) | ||
1012 | return -EAGAIN; | ||
1013 | cpuc->n_events = n0 + n; | ||
1014 | cpuc->n_added += n; | ||
1015 | |||
1016 | cpuctx->active_oncpu += n; | ||
1017 | n = 1; | ||
1018 | event_sched_in(group_leader, cpu); | ||
1019 | list_for_each_entry(sub, &group_leader->sibling_list, group_entry) { | ||
1020 | if (sub->state != PERF_EVENT_STATE_OFF) { | ||
1021 | event_sched_in(sub, cpu); | ||
1022 | n++; | ||
1023 | } | ||
1024 | } | ||
1025 | ctx->nr_active += n; | ||
1026 | |||
1027 | return 1; | ||
1028 | } | ||
1029 | |||
1030 | static int sparc_pmu_enable(struct perf_event *event) | ||
1031 | { | ||
1032 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
1033 | int n0, ret = -EAGAIN; | ||
1034 | unsigned long flags; | ||
1035 | |||
1036 | local_irq_save(flags); | ||
1037 | perf_disable(); | ||
1038 | |||
1039 | n0 = cpuc->n_events; | ||
1040 | if (n0 >= perf_max_events) | ||
1041 | goto out; | ||
1042 | |||
1043 | cpuc->event[n0] = event; | ||
1044 | cpuc->events[n0] = event->hw.event_base; | ||
1045 | cpuc->current_idx[n0] = PIC_NO_INDEX; | ||
1046 | |||
1047 | if (check_excludes(cpuc->event, n0, 1)) | ||
1048 | goto out; | ||
1049 | if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) | ||
1050 | goto out; | ||
1051 | |||
1052 | cpuc->n_events++; | ||
1053 | cpuc->n_added++; | ||
1054 | |||
1055 | ret = 0; | ||
1056 | out: | ||
1057 | perf_enable(); | ||
1058 | local_irq_restore(flags); | ||
1059 | return ret; | ||
1060 | } | ||
1061 | |||
844 | static int __hw_perf_event_init(struct perf_event *event) | 1062 | static int __hw_perf_event_init(struct perf_event *event) |
845 | { | 1063 | { |
846 | struct perf_event_attr *attr = &event->attr; | 1064 | struct perf_event_attr *attr = &event->attr; |
847 | struct perf_event *evts[MAX_HWEVENTS]; | 1065 | struct perf_event *evts[MAX_HWEVENTS]; |
848 | struct hw_perf_event *hwc = &event->hw; | 1066 | struct hw_perf_event *hwc = &event->hw; |
849 | unsigned long events[MAX_HWEVENTS]; | 1067 | unsigned long events[MAX_HWEVENTS]; |
1068 | int current_idx_dmy[MAX_HWEVENTS]; | ||
850 | const struct perf_event_map *pmap; | 1069 | const struct perf_event_map *pmap; |
851 | u64 enc; | ||
852 | int n; | 1070 | int n; |
853 | 1071 | ||
854 | if (atomic_read(&nmi_active) < 0) | 1072 | if (atomic_read(&nmi_active) < 0) |
@@ -865,10 +1083,7 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
865 | } else | 1083 | } else |
866 | return -EOPNOTSUPP; | 1084 | return -EOPNOTSUPP; |
867 | 1085 | ||
868 | /* We save the enable bits in the config_base. So to | 1086 | /* We save the enable bits in the config_base. */ |
869 | * turn off sampling just write 'config', and to enable | ||
870 | * things write 'config | config_base'. | ||
871 | */ | ||
872 | hwc->config_base = sparc_pmu->irq_bit; | 1087 | hwc->config_base = sparc_pmu->irq_bit; |
873 | if (!attr->exclude_user) | 1088 | if (!attr->exclude_user) |
874 | hwc->config_base |= PCR_UTRACE; | 1089 | hwc->config_base |= PCR_UTRACE; |
@@ -879,13 +1094,11 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
879 | 1094 | ||
880 | hwc->event_base = perf_event_encode(pmap); | 1095 | hwc->event_base = perf_event_encode(pmap); |
881 | 1096 | ||
882 | enc = pmap->encoding; | ||
883 | |||
884 | n = 0; | 1097 | n = 0; |
885 | if (event->group_leader != event) { | 1098 | if (event->group_leader != event) { |
886 | n = collect_events(event->group_leader, | 1099 | n = collect_events(event->group_leader, |
887 | perf_max_events - 1, | 1100 | perf_max_events - 1, |
888 | evts, events); | 1101 | evts, events, current_idx_dmy); |
889 | if (n < 0) | 1102 | if (n < 0) |
890 | return -EINVAL; | 1103 | return -EINVAL; |
891 | } | 1104 | } |
@@ -895,9 +1108,11 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
895 | if (check_excludes(evts, n, 1)) | 1108 | if (check_excludes(evts, n, 1)) |
896 | return -EINVAL; | 1109 | return -EINVAL; |
897 | 1110 | ||
898 | if (sparc_check_constraints(events, n + 1)) | 1111 | if (sparc_check_constraints(evts, events, n + 1)) |
899 | return -EINVAL; | 1112 | return -EINVAL; |
900 | 1113 | ||
1114 | hwc->idx = PIC_NO_INDEX; | ||
1115 | |||
901 | /* Try to do all error checking before this point, as unwinding | 1116 | /* Try to do all error checking before this point, as unwinding |
902 | * state after grabbing the PMC is difficult. | 1117 | * state after grabbing the PMC is difficult. |
903 | */ | 1118 | */ |
@@ -910,15 +1125,6 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
910 | atomic64_set(&hwc->period_left, hwc->sample_period); | 1125 | atomic64_set(&hwc->period_left, hwc->sample_period); |
911 | } | 1126 | } |
912 | 1127 | ||
913 | if (pmap->pic_mask & PIC_UPPER) { | ||
914 | hwc->idx = PIC_UPPER_INDEX; | ||
915 | enc <<= sparc_pmu->upper_shift; | ||
916 | } else { | ||
917 | hwc->idx = PIC_LOWER_INDEX; | ||
918 | enc <<= sparc_pmu->lower_shift; | ||
919 | } | ||
920 | |||
921 | hwc->config |= enc; | ||
922 | return 0; | 1128 | return 0; |
923 | } | 1129 | } |
924 | 1130 | ||
@@ -968,7 +1174,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self, | |||
968 | struct perf_sample_data data; | 1174 | struct perf_sample_data data; |
969 | struct cpu_hw_events *cpuc; | 1175 | struct cpu_hw_events *cpuc; |
970 | struct pt_regs *regs; | 1176 | struct pt_regs *regs; |
971 | int idx; | 1177 | int i; |
972 | 1178 | ||
973 | if (!atomic_read(&active_events)) | 1179 | if (!atomic_read(&active_events)) |
974 | return NOTIFY_DONE; | 1180 | return NOTIFY_DONE; |
@@ -986,13 +1192,23 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self, | |||
986 | data.addr = 0; | 1192 | data.addr = 0; |
987 | 1193 | ||
988 | cpuc = &__get_cpu_var(cpu_hw_events); | 1194 | cpuc = &__get_cpu_var(cpu_hw_events); |
989 | for (idx = 0; idx < MAX_HWEVENTS; idx++) { | 1195 | |
990 | struct perf_event *event = cpuc->events[idx]; | 1196 | /* If the PMU has the TOE IRQ enable bits, we need to do a |
1197 | * dummy write to the %pcr to clear the overflow bits and thus | ||
1198 | * the interrupt. | ||
1199 | * | ||
1200 | * Do this before we peek at the counters to determine | ||
1201 | * overflow so we don't lose any events. | ||
1202 | */ | ||
1203 | if (sparc_pmu->irq_bit) | ||
1204 | pcr_ops->write(cpuc->pcr); | ||
1205 | |||
1206 | for (i = 0; i < cpuc->n_events; i++) { | ||
1207 | struct perf_event *event = cpuc->event[i]; | ||
1208 | int idx = cpuc->current_idx[i]; | ||
991 | struct hw_perf_event *hwc; | 1209 | struct hw_perf_event *hwc; |
992 | u64 val; | 1210 | u64 val; |
993 | 1211 | ||
994 | if (!test_bit(idx, cpuc->active_mask)) | ||
995 | continue; | ||
996 | hwc = &event->hw; | 1212 | hwc = &event->hw; |
997 | val = sparc_perf_event_update(event, hwc, idx); | 1213 | val = sparc_perf_event_update(event, hwc, idx); |
998 | if (val & (1ULL << 31)) | 1214 | if (val & (1ULL << 31)) |
@@ -1044,10 +1260,122 @@ void __init init_hw_perf_events(void) | |||
1044 | 1260 | ||
1045 | pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type); | 1261 | pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type); |
1046 | 1262 | ||
1047 | /* All sparc64 PMUs currently have 2 events. But this simple | 1263 | /* All sparc64 PMUs currently have 2 events. */ |
1048 | * driver only supports one active event at a time. | 1264 | perf_max_events = 2; |
1049 | */ | ||
1050 | perf_max_events = 1; | ||
1051 | 1265 | ||
1052 | register_die_notifier(&perf_event_nmi_notifier); | 1266 | register_die_notifier(&perf_event_nmi_notifier); |
1053 | } | 1267 | } |
1268 | |||
1269 | static inline void callchain_store(struct perf_callchain_entry *entry, u64 ip) | ||
1270 | { | ||
1271 | if (entry->nr < PERF_MAX_STACK_DEPTH) | ||
1272 | entry->ip[entry->nr++] = ip; | ||
1273 | } | ||
1274 | |||
1275 | static void perf_callchain_kernel(struct pt_regs *regs, | ||
1276 | struct perf_callchain_entry *entry) | ||
1277 | { | ||
1278 | unsigned long ksp, fp; | ||
1279 | |||
1280 | callchain_store(entry, PERF_CONTEXT_KERNEL); | ||
1281 | callchain_store(entry, regs->tpc); | ||
1282 | |||
1283 | ksp = regs->u_regs[UREG_I6]; | ||
1284 | fp = ksp + STACK_BIAS; | ||
1285 | do { | ||
1286 | struct sparc_stackf *sf; | ||
1287 | struct pt_regs *regs; | ||
1288 | unsigned long pc; | ||
1289 | |||
1290 | if (!kstack_valid(current_thread_info(), fp)) | ||
1291 | break; | ||
1292 | |||
1293 | sf = (struct sparc_stackf *) fp; | ||
1294 | regs = (struct pt_regs *) (sf + 1); | ||
1295 | |||
1296 | if (kstack_is_trap_frame(current_thread_info(), regs)) { | ||
1297 | if (user_mode(regs)) | ||
1298 | break; | ||
1299 | pc = regs->tpc; | ||
1300 | fp = regs->u_regs[UREG_I6] + STACK_BIAS; | ||
1301 | } else { | ||
1302 | pc = sf->callers_pc; | ||
1303 | fp = (unsigned long)sf->fp + STACK_BIAS; | ||
1304 | } | ||
1305 | callchain_store(entry, pc); | ||
1306 | } while (entry->nr < PERF_MAX_STACK_DEPTH); | ||
1307 | } | ||
1308 | |||
1309 | static void perf_callchain_user_64(struct pt_regs *regs, | ||
1310 | struct perf_callchain_entry *entry) | ||
1311 | { | ||
1312 | unsigned long ufp; | ||
1313 | |||
1314 | callchain_store(entry, PERF_CONTEXT_USER); | ||
1315 | callchain_store(entry, regs->tpc); | ||
1316 | |||
1317 | ufp = regs->u_regs[UREG_I6] + STACK_BIAS; | ||
1318 | do { | ||
1319 | struct sparc_stackf *usf, sf; | ||
1320 | unsigned long pc; | ||
1321 | |||
1322 | usf = (struct sparc_stackf *) ufp; | ||
1323 | if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) | ||
1324 | break; | ||
1325 | |||
1326 | pc = sf.callers_pc; | ||
1327 | ufp = (unsigned long)sf.fp + STACK_BIAS; | ||
1328 | callchain_store(entry, pc); | ||
1329 | } while (entry->nr < PERF_MAX_STACK_DEPTH); | ||
1330 | } | ||
1331 | |||
1332 | static void perf_callchain_user_32(struct pt_regs *regs, | ||
1333 | struct perf_callchain_entry *entry) | ||
1334 | { | ||
1335 | unsigned long ufp; | ||
1336 | |||
1337 | callchain_store(entry, PERF_CONTEXT_USER); | ||
1338 | callchain_store(entry, regs->tpc); | ||
1339 | |||
1340 | ufp = regs->u_regs[UREG_I6]; | ||
1341 | do { | ||
1342 | struct sparc_stackf32 *usf, sf; | ||
1343 | unsigned long pc; | ||
1344 | |||
1345 | usf = (struct sparc_stackf32 *) ufp; | ||
1346 | if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) | ||
1347 | break; | ||
1348 | |||
1349 | pc = sf.callers_pc; | ||
1350 | ufp = (unsigned long)sf.fp; | ||
1351 | callchain_store(entry, pc); | ||
1352 | } while (entry->nr < PERF_MAX_STACK_DEPTH); | ||
1353 | } | ||
1354 | |||
1355 | /* Like powerpc we can't get PMU interrupts within the PMU handler, | ||
1356 | * so no need for seperate NMI and IRQ chains as on x86. | ||
1357 | */ | ||
1358 | static DEFINE_PER_CPU(struct perf_callchain_entry, callchain); | ||
1359 | |||
1360 | struct perf_callchain_entry *perf_callchain(struct pt_regs *regs) | ||
1361 | { | ||
1362 | struct perf_callchain_entry *entry = &__get_cpu_var(callchain); | ||
1363 | |||
1364 | entry->nr = 0; | ||
1365 | if (!user_mode(regs)) { | ||
1366 | stack_trace_flush(); | ||
1367 | perf_callchain_kernel(regs, entry); | ||
1368 | if (current->mm) | ||
1369 | regs = task_pt_regs(current); | ||
1370 | else | ||
1371 | regs = NULL; | ||
1372 | } | ||
1373 | if (regs) { | ||
1374 | flushw_user(); | ||
1375 | if (test_thread_flag(TIF_32BIT)) | ||
1376 | perf_callchain_user_32(regs, entry); | ||
1377 | else | ||
1378 | perf_callchain_user_64(regs, entry); | ||
1379 | } | ||
1380 | return entry; | ||
1381 | } | ||
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index 18d67854a1b8..c3f1cce0e95e 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c | |||
@@ -365,14 +365,6 @@ void flush_thread(void) | |||
365 | struct thread_info *t = current_thread_info(); | 365 | struct thread_info *t = current_thread_info(); |
366 | struct mm_struct *mm; | 366 | struct mm_struct *mm; |
367 | 367 | ||
368 | if (test_ti_thread_flag(t, TIF_ABI_PENDING)) { | ||
369 | clear_ti_thread_flag(t, TIF_ABI_PENDING); | ||
370 | if (test_ti_thread_flag(t, TIF_32BIT)) | ||
371 | clear_ti_thread_flag(t, TIF_32BIT); | ||
372 | else | ||
373 | set_ti_thread_flag(t, TIF_32BIT); | ||
374 | } | ||
375 | |||
376 | mm = t->task->mm; | 368 | mm = t->task->mm; |
377 | if (mm) | 369 | if (mm) |
378 | tsb_context_switch(mm); | 370 | tsb_context_switch(mm); |
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c index cfa0e19abe3b..d77f54316948 100644 --- a/arch/sparc/kernel/sys_sparc_64.c +++ b/arch/sparc/kernel/sys_sparc_64.c | |||
@@ -365,6 +365,7 @@ EXPORT_SYMBOL(get_fb_unmapped_area); | |||
365 | void arch_pick_mmap_layout(struct mm_struct *mm) | 365 | void arch_pick_mmap_layout(struct mm_struct *mm) |
366 | { | 366 | { |
367 | unsigned long random_factor = 0UL; | 367 | unsigned long random_factor = 0UL; |
368 | unsigned long gap; | ||
368 | 369 | ||
369 | if (current->flags & PF_RANDOMIZE) { | 370 | if (current->flags & PF_RANDOMIZE) { |
370 | random_factor = get_random_int(); | 371 | random_factor = get_random_int(); |
@@ -379,9 +380,10 @@ void arch_pick_mmap_layout(struct mm_struct *mm) | |||
379 | * Fall back to the standard layout if the personality | 380 | * Fall back to the standard layout if the personality |
380 | * bit is set, or if the expected stack growth is unlimited: | 381 | * bit is set, or if the expected stack growth is unlimited: |
381 | */ | 382 | */ |
383 | gap = rlimit(RLIMIT_STACK); | ||
382 | if (!test_thread_flag(TIF_32BIT) || | 384 | if (!test_thread_flag(TIF_32BIT) || |
383 | (current->personality & ADDR_COMPAT_LAYOUT) || | 385 | (current->personality & ADDR_COMPAT_LAYOUT) || |
384 | current->signal->rlim[RLIMIT_STACK].rlim_cur == RLIM_INFINITY || | 386 | gap == RLIM_INFINITY || |
385 | sysctl_legacy_va_layout) { | 387 | sysctl_legacy_va_layout) { |
386 | mm->mmap_base = TASK_UNMAPPED_BASE + random_factor; | 388 | mm->mmap_base = TASK_UNMAPPED_BASE + random_factor; |
387 | mm->get_unmapped_area = arch_get_unmapped_area; | 389 | mm->get_unmapped_area = arch_get_unmapped_area; |
@@ -389,9 +391,7 @@ void arch_pick_mmap_layout(struct mm_struct *mm) | |||
389 | } else { | 391 | } else { |
390 | /* We know it's 32-bit */ | 392 | /* We know it's 32-bit */ |
391 | unsigned long task_size = STACK_TOP32; | 393 | unsigned long task_size = STACK_TOP32; |
392 | unsigned long gap; | ||
393 | 394 | ||
394 | gap = current->signal->rlim[RLIMIT_STACK].rlim_cur; | ||
395 | if (gap < 128 * 1024 * 1024) | 395 | if (gap < 128 * 1024 * 1024) |
396 | gap = 128 * 1024 * 1024; | 396 | gap = 128 * 1024 * 1024; |
397 | if (gap > (task_size / 6 * 5)) | 397 | if (gap > (task_size / 6 * 5)) |
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c index 5b2f595fe65b..0d4c09b15efc 100644 --- a/arch/sparc/kernel/time_32.c +++ b/arch/sparc/kernel/time_32.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <linux/platform_device.h> | 35 | #include <linux/platform_device.h> |
36 | 36 | ||
37 | #include <asm/oplib.h> | 37 | #include <asm/oplib.h> |
38 | #include <asm/timex.h> | ||
38 | #include <asm/timer.h> | 39 | #include <asm/timer.h> |
39 | #include <asm/system.h> | 40 | #include <asm/system.h> |
40 | #include <asm/irq.h> | 41 | #include <asm/irq.h> |
@@ -51,7 +52,6 @@ DEFINE_SPINLOCK(rtc_lock); | |||
51 | EXPORT_SYMBOL(rtc_lock); | 52 | EXPORT_SYMBOL(rtc_lock); |
52 | 53 | ||
53 | static int set_rtc_mmss(unsigned long); | 54 | static int set_rtc_mmss(unsigned long); |
54 | static int sbus_do_settimeofday(struct timespec *tv); | ||
55 | 55 | ||
56 | unsigned long profile_pc(struct pt_regs *regs) | 56 | unsigned long profile_pc(struct pt_regs *regs) |
57 | { | 57 | { |
@@ -76,6 +76,8 @@ EXPORT_SYMBOL(profile_pc); | |||
76 | 76 | ||
77 | __volatile__ unsigned int *master_l10_counter; | 77 | __volatile__ unsigned int *master_l10_counter; |
78 | 78 | ||
79 | u32 (*do_arch_gettimeoffset)(void); | ||
80 | |||
79 | /* | 81 | /* |
80 | * timer_interrupt() needs to keep up the real-time clock, | 82 | * timer_interrupt() needs to keep up the real-time clock, |
81 | * as well as call the "do_timer()" routine every clocktick | 83 | * as well as call the "do_timer()" routine every clocktick |
@@ -196,35 +198,14 @@ static int __init clock_init(void) | |||
196 | { | 198 | { |
197 | return of_register_driver(&clock_driver, &of_platform_bus_type); | 199 | return of_register_driver(&clock_driver, &of_platform_bus_type); |
198 | } | 200 | } |
199 | |||
200 | /* Must be after subsys_initcall() so that busses are probed. Must | 201 | /* Must be after subsys_initcall() so that busses are probed. Must |
201 | * be before device_initcall() because things like the RTC driver | 202 | * be before device_initcall() because things like the RTC driver |
202 | * need to see the clock registers. | 203 | * need to see the clock registers. |
203 | */ | 204 | */ |
204 | fs_initcall(clock_init); | 205 | fs_initcall(clock_init); |
205 | 206 | ||
206 | static void __init sbus_time_init(void) | ||
207 | { | ||
208 | |||
209 | BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM); | ||
210 | btfixup(); | ||
211 | |||
212 | sparc_init_timers(timer_interrupt); | ||
213 | } | ||
214 | |||
215 | void __init time_init(void) | ||
216 | { | ||
217 | #ifdef CONFIG_PCI | ||
218 | extern void pci_time_init(void); | ||
219 | if (pcic_present()) { | ||
220 | pci_time_init(); | ||
221 | return; | ||
222 | } | ||
223 | #endif | ||
224 | sbus_time_init(); | ||
225 | } | ||
226 | 207 | ||
227 | static inline unsigned long do_gettimeoffset(void) | 208 | u32 sbus_do_gettimeoffset(void) |
228 | { | 209 | { |
229 | unsigned long val = *master_l10_counter; | 210 | unsigned long val = *master_l10_counter; |
230 | unsigned long usec = (val >> 10) & 0x1fffff; | 211 | unsigned long usec = (val >> 10) & 0x1fffff; |
@@ -233,86 +214,39 @@ static inline unsigned long do_gettimeoffset(void) | |||
233 | if (val & 0x80000000) | 214 | if (val & 0x80000000) |
234 | usec += 1000000 / HZ; | 215 | usec += 1000000 / HZ; |
235 | 216 | ||
236 | return usec; | 217 | return usec * 1000; |
237 | } | 218 | } |
238 | 219 | ||
239 | /* Ok, my cute asm atomicity trick doesn't work anymore. | ||
240 | * There are just too many variables that need to be protected | ||
241 | * now (both members of xtime, et al.) | ||
242 | */ | ||
243 | void do_gettimeofday(struct timeval *tv) | ||
244 | { | ||
245 | unsigned long flags; | ||
246 | unsigned long seq; | ||
247 | unsigned long usec, sec; | ||
248 | unsigned long max_ntp_tick = tick_usec - tickadj; | ||
249 | |||
250 | do { | ||
251 | seq = read_seqbegin_irqsave(&xtime_lock, flags); | ||
252 | usec = do_gettimeoffset(); | ||
253 | |||
254 | /* | ||
255 | * If time_adjust is negative then NTP is slowing the clock | ||
256 | * so make sure not to go into next possible interval. | ||
257 | * Better to lose some accuracy than have time go backwards.. | ||
258 | */ | ||
259 | if (unlikely(time_adjust < 0)) | ||
260 | usec = min(usec, max_ntp_tick); | ||
261 | |||
262 | sec = xtime.tv_sec; | ||
263 | usec += (xtime.tv_nsec / 1000); | ||
264 | } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); | ||
265 | |||
266 | while (usec >= 1000000) { | ||
267 | usec -= 1000000; | ||
268 | sec++; | ||
269 | } | ||
270 | 220 | ||
271 | tv->tv_sec = sec; | 221 | u32 arch_gettimeoffset(void) |
272 | tv->tv_usec = usec; | ||
273 | } | ||
274 | |||
275 | EXPORT_SYMBOL(do_gettimeofday); | ||
276 | |||
277 | int do_settimeofday(struct timespec *tv) | ||
278 | { | 222 | { |
279 | int ret; | 223 | if (unlikely(!do_arch_gettimeoffset)) |
280 | 224 | return 0; | |
281 | write_seqlock_irq(&xtime_lock); | 225 | return do_arch_gettimeoffset(); |
282 | ret = bus_do_settimeofday(tv); | ||
283 | write_sequnlock_irq(&xtime_lock); | ||
284 | clock_was_set(); | ||
285 | return ret; | ||
286 | } | 226 | } |
287 | 227 | ||
288 | EXPORT_SYMBOL(do_settimeofday); | 228 | static void __init sbus_time_init(void) |
289 | |||
290 | static int sbus_do_settimeofday(struct timespec *tv) | ||
291 | { | 229 | { |
292 | time_t wtm_sec, sec = tv->tv_sec; | 230 | do_arch_gettimeoffset = sbus_do_gettimeoffset; |
293 | long wtm_nsec, nsec = tv->tv_nsec; | ||
294 | 231 | ||
295 | if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) | 232 | btfixup(); |
296 | return -EINVAL; | ||
297 | |||
298 | /* | ||
299 | * This is revolting. We need to set "xtime" correctly. However, the | ||
300 | * value in this location is the value at the most recent update of | ||
301 | * wall time. Discover what correction gettimeofday() would have | ||
302 | * made, and then undo it! | ||
303 | */ | ||
304 | nsec -= 1000 * do_gettimeoffset(); | ||
305 | |||
306 | wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); | ||
307 | wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); | ||
308 | 233 | ||
309 | set_normalized_timespec(&xtime, sec, nsec); | 234 | sparc_init_timers(timer_interrupt); |
310 | set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); | 235 | } |
311 | 236 | ||
312 | ntp_clear(); | 237 | void __init time_init(void) |
313 | return 0; | 238 | { |
239 | #ifdef CONFIG_PCI | ||
240 | extern void pci_time_init(void); | ||
241 | if (pcic_present()) { | ||
242 | pci_time_init(); | ||
243 | return; | ||
244 | } | ||
245 | #endif | ||
246 | sbus_time_init(); | ||
314 | } | 247 | } |
315 | 248 | ||
249 | |||
316 | static int set_rtc_mmss(unsigned long secs) | 250 | static int set_rtc_mmss(unsigned long secs) |
317 | { | 251 | { |
318 | struct rtc_device *rtc = rtc_class_open("rtc0"); | 252 | struct rtc_device *rtc = rtc_class_open("rtc0"); |
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c index b99f81c4906f..a3413acb8f12 100644 --- a/arch/sparc/mm/fault_32.c +++ b/arch/sparc/mm/fault_32.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/signal.h> | 18 | #include <linux/signal.h> |
19 | #include <linux/mm.h> | 19 | #include <linux/mm.h> |
20 | #include <linux/smp.h> | 20 | #include <linux/smp.h> |
21 | #include <linux/perf_event.h> | ||
21 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
22 | #include <linux/module.h> | 23 | #include <linux/module.h> |
23 | #include <linux/kdebug.h> | 24 | #include <linux/kdebug.h> |
@@ -203,6 +204,8 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write, | |||
203 | if (in_atomic() || !mm) | 204 | if (in_atomic() || !mm) |
204 | goto no_context; | 205 | goto no_context; |
205 | 206 | ||
207 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); | ||
208 | |||
206 | down_read(&mm->mmap_sem); | 209 | down_read(&mm->mmap_sem); |
207 | 210 | ||
208 | /* | 211 | /* |
@@ -249,10 +252,15 @@ good_area: | |||
249 | goto do_sigbus; | 252 | goto do_sigbus; |
250 | BUG(); | 253 | BUG(); |
251 | } | 254 | } |
252 | if (fault & VM_FAULT_MAJOR) | 255 | if (fault & VM_FAULT_MAJOR) { |
253 | current->maj_flt++; | 256 | current->maj_flt++; |
254 | else | 257 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, |
258 | regs, address); | ||
259 | } else { | ||
255 | current->min_flt++; | 260 | current->min_flt++; |
261 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, | ||
262 | regs, address); | ||
263 | } | ||
256 | up_read(&mm->mmap_sem); | 264 | up_read(&mm->mmap_sem); |
257 | return; | 265 | return; |
258 | 266 | ||
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c index 6081936bf03b..b9d4ff02b8fc 100644 --- a/arch/sparc/mm/fault_64.c +++ b/arch/sparc/mm/fault_64.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/perf_event.h> | ||
19 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
20 | #include <linux/kprobes.h> | 21 | #include <linux/kprobes.h> |
21 | #include <linux/kdebug.h> | 22 | #include <linux/kdebug.h> |
@@ -296,6 +297,8 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs) | |||
296 | if (in_atomic() || !mm) | 297 | if (in_atomic() || !mm) |
297 | goto intr_or_no_mm; | 298 | goto intr_or_no_mm; |
298 | 299 | ||
300 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); | ||
301 | |||
299 | if (!down_read_trylock(&mm->mmap_sem)) { | 302 | if (!down_read_trylock(&mm->mmap_sem)) { |
300 | if ((regs->tstate & TSTATE_PRIV) && | 303 | if ((regs->tstate & TSTATE_PRIV) && |
301 | !search_exception_tables(regs->tpc)) { | 304 | !search_exception_tables(regs->tpc)) { |
@@ -400,11 +403,15 @@ good_area: | |||
400 | goto do_sigbus; | 403 | goto do_sigbus; |
401 | BUG(); | 404 | BUG(); |
402 | } | 405 | } |
403 | if (fault & VM_FAULT_MAJOR) | 406 | if (fault & VM_FAULT_MAJOR) { |
404 | current->maj_flt++; | 407 | current->maj_flt++; |
405 | else | 408 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, |
409 | regs, address); | ||
410 | } else { | ||
406 | current->min_flt++; | 411 | current->min_flt++; |
407 | 412 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, | |
413 | regs, address); | ||
414 | } | ||
408 | up_read(&mm->mmap_sem); | 415 | up_read(&mm->mmap_sem); |
409 | 416 | ||
410 | mm_rss = get_mm_rss(mm); | 417 | mm_rss = get_mm_rss(mm); |